CMOS image sensors for sensor networks

We report on two generations of CMOS image sensors with digital output fabricated in a 0.6 μm CMOS process. The imagers embed an ALOHA MAC interface for unfettered self-timed pixel read-out targeted to energy-aware sensor network applications. Collision on the output is monitored using contention detector circuits. The image sensors present very high dynamic range and ultra-low power operation. This characteristics allow the sensor to operate in different lighting conditions and for years on the sensor network node power budget. Eugenio Culurciello (S’97–M’99) received the Ph.D. degree in Electrical and Computer Engineering in 2004 from Johns Hopkins University, Baltimore, MD. In July 2004 he joined the department of Electrical Engineering at Yale University, where he is currently an assistant professor. He founded and instrumented the E-Lab laboratory in 2004. His research interest is in analog and mixed-mode integrated circuits for biomedical applications, sensors and networks, biological sensors, Silicon on Insulator design and bio-inspired systems. Andreas G. Andreou received his Ph.D. in electrical engineering and computer science in 1986 from Johns Hopkins University. Between 1986 and 1989 he held post-doctoral fellow and associate research scientist positions in the Electrical and Computer engineering department while also a member of the professional staff at the Johns Hopkins Applied Physics Laboratory. Andreou became an assistant professor of Electrical and Computer engineering in 1989, associate professor in 1993 and professor in 1996. He is also a professor of Computer Science and of the Whitaker Biomedical Engineering Institute and director of the Institute’s Fabrication and Lithography Facility in Clark Hall. He is the co-founder of the Johns Hopkins University Center for Language and Speech Processing. Between 2001 and 2003 he was the founding director of the ABET accredited undergraduate Computer Engineering program. In 1996 and 1997 he was a visiting professor of the computation and neural systems program at the California Institute of Technology. In 1989 and 1991 he was awarded the R.W. Hart Prize for his work on mixed analog/digital integrated circuits for space applications. He is the recipient of the 1995 and 1997 Myril B. Reed Best Paper Award and the 2000 IEEE Circuits and Systems Society, Darlington Best Paper Award. During the summer of 2001 he was a visiting professor in the department of systems engineering and machine intelligence at Tohoku University. In 2006, Prof. Andreou was elected as an IEEE Fellow and a distinguished lecturer of the IEEE EDS society. Andreou’s research interests include sensors, micropower electronics, heterogeneous microsystems, and information processing in biological systems. He is a co-editor of the IEEE Press book: Low-Voltage/Low-Power Integrated Circuits and Systems, 1998 (translated in Japanese) and the Kluwer Academic Publishers book: Adaptive Resonance Theory Microchips, 1998. He is an associate editor of IEEE Transactions on Circuits and Systems I.     

A Cross-Layer Approach for Concurrent Delay and Throughput Assurances in Multihop Wireless Hotspots

Next generation Wireless Local Area Networks (WLAN’s) are likely to require multihop wireless connections between mobile nodes and Internet gateways to achieve high data rates from larger distances. The paper addresses the challenges in concurrently providing a wide range of end-to-end throughput and delay assurances in such mobile multihop WLAN hotspots. The proposed solution is based on the Neighborhood Proportional Delay Differentiation (NPDD) service model. With NPDD, Transmission Control Protocol (TCP) based applications achieve their desired throughputs using a dynamic class selection mechanism. This approach integrates well with the NPDD-based end-to-end delay assurance mechanism proposed earlier. To better model the node mobility in a multihop hotspot in our simulation studies, the Public Hotspot Mobility (PHM) model is proposed. Simulation results show that the proposed solution is better in meeting the desired throughputs and delays as compared with best effort and strict priority approaches. Recent theoretical analyses show that the NPDD model with a continuous range of classes can guarantee convergence to desirable QoS through dynamic class selection. However, the overhead of realizing the continuous class scheduler is high. We propose two continuous NPDD schedulers, the Single Queue Continuous NPDD (SQ-CNPDD) scheduler and the Multiple Queue Continuous NPDD (MQ-CNPDD) scheduler, to realize the continuous NPDD model. With simulations, the performance of SQ-CNPDD and MQ-CNPDD are compared to that of NPDD. Kuang-Ching Wang received the B. S. and M. S. degrees in electrical engineering from the National Taiwan University, Taipei, Taiwan, in 1997 and 1999, and the M. S. and Ph. D. degrees in electrical and computer engineering from the University of Wisconsin, Madison, in 2001 and 2003, respectively. Dr. Wang is currently with the Department of Electrical and Computer Engineering, Clemson University, Clemson, SC, as an Assistant Professor. From 2000 to 2003, he participated in the DARPA Sensor Information Technology (SensIT) Program as the leading developer of its network protocols and collaborative signal processing applications. His research interests include wireless networks, mobile computing, distributed protocols, and embedded systems. Dr. Wang is a member of the IEEE Computer, Communication, and Biomedical Engineering Societies and the Association for Computing Machinery. Parameswaran Ramanathan received the B. Tech degree from the Indian Institute of Technology, Bombay, India, in 1984, and the M. S. E. and Ph. D. degrees from the University of Michigan, Ann Arbor, in 1986 and 1989, respectively. Since 1989, Dr. Ramanathan has been faculty member in the Department of Electrical & Computer Engineering, University of Wisconsin, Madison, where is presently a Full Professor. He leads research projects in the areas of sensor networks and next generation cellular technology. In 1997–98, he took a sabbatical leave to visit research groups at AT&T Laboratories and Telcordia Technologies. Dr. Ramanathan’s research interests include wireless and wireline networking, real-time systems, fault-tolerant computing, and distributed systems. He is presently an Associate Editor for IEEE Transactions on Mobile Computing and Elsevier AdHoc Networks Journal. He served as an Associate Editor for IEEE Transactions on Parallel and Distributed Computing from 1996–1999. He has also served on program committees of conferences such as Mobicom, Mobihoc, International Conferences on Distributed Systems and Networks, Distributed Computing Systems, Fault-tolerant Computing Symposium, Real-time Systems Symposium, Conference on Local Computer Networks, and International Conference on Engineering Complex Computer Systems. He was the Finance and Registration Chair for the Fault-tolerant Computing Symposium (1999). He was the program co-chairman of the Workshop on Sensor Networks and Applications (2003), Broadband Wireless (2004), Workshop on Architectures for Real-time Applications, 1994 and the program vice-chair for the International Workshop on Parallel and Distributed Real-time Systems, 1996. He is a member of Association of Computing Machinery and a senior member of IEEE.This revised version was published online in August 2005 with a corrected cover date.     

A 1.8 V CMOS fourth-order Gm-C bandpass sigma-delta modulator dedicated to front-end ultrasonic receivers

A 4th order bandpass sigma-delta modulator for ultrasound applications is presented. By cascading two second-order identical Gm-C bandpass filters, a 4th-order modulator was designed with high power-efficiency, stability, tunability and programmability. The modulator is dedicated for application with intermediate frequency of 3 MHz and bandwidth of 200 kHz. Implemented in a standard 0.18 μm CMOS technology, the post-layout simulation of the modulator gives a dynamic range of 78 dB. Chip measurements are reported after successfully tuning the modulator to operate at four-time of its folded specifications. The final SNR achieves 58 dB at 0.75 MHz with 50 kHz bandwidth. The modulator consumes 2.5 mW from 1.8 V power supply. Moreover, a programming method is introduced and corresponding circuit is designed to change the central frequency of the modulator between 3 and 20 MHz for scanning different regions of the body. However the 200 kHz bandwidth limits the modulator only for Dobbler mode applications, the effective facilities of programmability are valuable property to expand this application to other wide band applications in future. Lisheng Qin received the B.Sc. degree in electrical engineering from Tianjin University, China in 1992. He was with Polystim Neurotechnologies Laboratory from 2001 to 2005 and received the M.Sc. degree in electronics engineering from Ecole Polytechnique de Montreal, Canada in 2005. He is now with Apexone Microelectronics Inc. as Analog/Mixed-Signal Design Engineer. Kamal El-Sankary received the B.Sc. degree in electrical engineering from the Lebanese University, Lebanon in 1997 and the M.Sc. degree in electronics engineering from University of Quebec in Trois Rivieres, Canada, in 2001. He is currently pursuing the Ph.D. degree in microelectronics at Ecole Polytechnique de Montreal, Canada. His research interests include analog/mixed-signal circuits design and signal processing. Mohamad Sawan received the B.Sc. degree in electrical engineering from Université Laval, Canada in 1984, the M.Sc. and Ph.D. degrees, both in electrical engineering, from Université de Sherbrooke, Canada, in 1986 and 1990 respectively, and postdoctorate training from McGill University, Canada in 1991. He joined Ecole Polytechnique de Montréal in 1991 where he is currently a Professor in Microelectronics. His scientific interests are the design and test of mixed-signal (analog, digital and RF) circuits and systems, the digital and analog signal processing, the modeling, design, integration, assembly and validation of advanced wirelessly powered and controlled monitoring and measurement techniques. These topics are oriented toward the biomedical implantable devices and telecommunications applications. Dr. Sawan is a holder of a Canadian Research Chair in Smart Medical Devices. He is leading the Microelectronics Strategic Alliance of Quebec (Regroupement stratégique en microélectronique du Québec - ReSMiQ). He is founder of the Eastern Canadian IEEE-Solid State Circuits Society Chapter, the International IEEE-NEWCAS conference, and Polystim neurotechnologies laboratory at the Ecole Polytechnique de Montreal. He is cofounder of the International Functional Electrical Stimulation Society (IFESS), and the IEEE International conference on Electronics, Circuits and Systems (ICECS). Dr. Sawan is involved in the committees of many national and international conferences and other scientific events. He published more than 300 papers in peer reviewed journals and conference proceedings and is awarded 6 patents. He is editor of the Springer Mixed-signal Letters, Distinguished Lecturer for the IEEE CAS Society, President of the biomedical circuits and systems (BioCAS) technical committee of the IEEE CAS Society, and he is representative of IEEE-CAS in the International Biotechnology council. He received the Barbara Turnbull 2003 award for spinal cord research, the Medal of Merit from Lebanon, and the Bombardier Medal from the French Association for the advancement of sciences. Dr. Sawan is Fellow of the Canadian Academy of Engineering, and Fellow of the IEEE.     

Test Planning and Test Resource Optimization for Droplet-Based Microfluidic Systems

Recent years have seen the emergence of droplet-based microfluidic systems for safety-critical biomedical applications. In order to ensure reliability, microsystems incorporating microfluidic components must be tested adequately. In this paper, we investigate test planning and test resource optimization for droplet-based microfluidic arrays. We first formulate the test planning problem and prove that it is NP-hard. We then describe an optimization method based on integer linear programming (ILP) that yields optimal solutions. Due to the NP-hard nature of the problem, we develop heuristic approaches for optimization. Experimental results indicate that for large array sizes, the heuristic methods yield solutions that are close to provable lower bounds. These heuristics ensure scalability and low computation cost. This research was supported in part by the National Science Foundation under grant number IIS-0312352. A preliminary version of this paper appeared in Proc. European Test Symposium. pp. 72–77, 2004 Fei Su received the B.E. and the M.S. degrees in automation from Tsinghua University, Beijing, China, in 1999 and 2001, respectively, and the M.S. degree in electrical and computer engineering from Duke University, Durham, NC, in 2003. He is now a Ph.D. candidate in electrical and computer engineering at Duke University. His research interests include design and testing of mixed-technology microsystems, electronic design automation, mixed-signal VLSI design, MEMS modeling and simulation. Sule Ozev received her B.S. degree in Electrical Engineering at Bogazici University in 1995, and her M.S. and Ph.D. degrees in Computer Science and Engineering at University of California, San Diego in 1998 and 2002 respectively. Since 2002, she has been a faculty member at Duke University, Electrical and Computer Engineering Department. Her research interests include RF circuit analysis and testing, process variability analysis, and mixed-signal testing. Krishnendu Chakrabarty received the B. Tech. degree from the Indian Institute of Technology, Kharagpur, in 1990, and the M.S.E. and Ph.D. degrees from the University of Michigan, Ann Arbor, in 1992 and 1995, respectively, all in Computer Science and Engineering. He is now Associate Professor of Electrical and Computer Engineering at Duke University. Dr Chakrabarty is a recipient of the National Science Foundation Early Faculty (CAREER) award and the Office of Naval Research Young Investigator award. His current research projects include: design and testing of system-on-chip integrated circuits; design automation of microfluidics-based biochips; microfluidics-based chip cooling; distributed sensor networks. Dr Chakrabarty has authored three books Microelectrofluidic Systems: Modeling and Simulation (CRC Press, 2002), Test Resource Partitioning for System-on-a-Chip (Kluwer, 2002), and Scalable Infrastructure for Distributed Sensor Networks (Springer, 2005) 3/4 and edited the book volume SOC (System-on-a-Chip) Testing for Plug and Play Test Automation (Kluwer 2002). He has published over 200 papers in journals and refereed conference proceedings, and he holds a US patent in built-in self-test. He is a recipient of best paper awards at the 2005 IEEE International Conference on Computer Design and 2001 IEEE Design, Automation and Test in Europe (DATE) Conference. He is also a recipient of the Humboldt Research Fellowship, awarded by the Alexander von Humboldt Foundation, Germany. Dr Chakrabarty is an Associate Editor of IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on VLSI Systems, IEEE Transactions on Circuits and System I, ACM Journal on Emerging Technologies in Computing Systems, and an Editor of Journal of Electronic Testing: Theory and Applications (JETTA). He a member of the editorial board for Sensor Letters and Journal of Embedded Computing and he serves as a subject area editor for the International Journal of Distributed Sensor Networks. He has also served as an Associate Editor of IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing. He is a senior member of IEEE, a member of ACM and ACM SIGDA, and a member of Sigma Xi. He serves as Vice Chair of Technical Activities in IEEE’s Test Technology Technical Council, and is a member of the program committees of several IEEE/ACM conferences and workshops. He served as the Program Co-Chair for the 2005 IEEE Asian Test Symposium.     

Complex Infomax: Convergence and Approximation of Infomax with Complex Nonlinearities

Independent component analysis (ICA) for separating complex-valued sources is needed for convolutive source-separation in the frequency domain, or for performing source separation on complex-valued data, such as functional magnetic resonance imaging or radar data. Previous complex Infomax approaches that use nonlinear functions in the updates have proposed using bounded (and hence non-analytic) nonlinearities. In this paper, we propose using an analytic (and hence unbounded) complex nonlinearity for Infomax for processing complex-valued sources. We show by simulation examples that using an analytic nonlinearity for processing complex data has a number of advantages. First, when compared to split-complex approaches (i.e., approaches that split the real and imaginary data into separate channels), the shape of the performance surface is improved resulting in better convergence characteristics. We also show that using an analytic complex-valued function for the nonlinearity is more effective in generating the higher order statistics required to establish independence when compared to complex nonlinear functions, i.e., functions that are ℂ → ℂ This work was supported in part by the National Science Foundation Career Award, NSF NCR-9703161 (to TA) and the National Institutes of Health 1 R01 EB 000840-01 (to VC). Vince Calhoun received a bachelor’s degree in Electrical Engineering from the University of Kansas, Lawrence, Kansas, in 1991, master’s degrees in Biomedical Engineering and Information Systems from Johns Hopkins University, Baltimore, in 1993 and 1996, respectively, and the Ph.D. degree in electrical engineering from the University of Maryland Baltimore County, Baltimore, in 2002. He worked as a Senior Research Engineer in Psychiatric Neuro-Imaging at Johns Hopkins from 1993 until 2002. He is currently the Director of the Medical Image Analysis Laboratory and an associate adjunct professor at Yale University. He is associate editor of the IEEE signal processing letters and on the editorial board for the Journal of Human Brain Mapping. Dr. Calhoun is a member of the IEEE, the American Scientific Affiliation, the Organization for Human Brain Mapping, and the International Society for Magnetic Resonance in Medicine. He has organized workshops for human brain mapping (HBM), the society of biological psychiatry (SOBP), and the international conference of independent component analysis and blind source separation (ICA). He is currently serving on the IEEE Machine Learning for Signal Processing (MLSP) Technical Committee and was the general chair for MLSP 2005 in Mystic, CT. He works primarily with magnetic resonance imaging (functional imaging, diffusion tensor imaging, and structural imaging) and electroencephalography (EEG) data and is the author of more than 70 refereed articles in journals and conference proceedings in the areas of image processing, data fusion, adaptive signal processing, neural networks, statistical signal processing, and pattern recognition. Tülay Adalı received the B.S. degree from Middle East Technical University, Ankara, Turkey, in 1987 and the M.S. and Ph.D. degrees from North Carolina State University, Raleigh, in 1988 and 1992 respectively, all in electrical engineering. In 1992, she joined the Department of Electrical Engineering at the University of Maryland Baltimore County, Baltimore, where she currently is a professor. She has worked in the organization of a number of international conference and workshops including the IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP) and the IEEE International Workshop on Machine Learning for Signal Processing (MLSP). She was the general co-chair for the NNSP workshops 2001-2003. She is the past chair and a current member of the IEEE Machine Learning for Signal Processing Technical Committee and is serving on the IEEE Signal Processing Society conference board. She is an associate editor for the IEEE Transactions on Signal Processing and the Journal of VLSI Signal Processing Systems. She has also guest-edited a number of special issues for the IEEE Transactions on Neural Networks and the VLSI Signal Processing Systems on biomedical, multimedia, and data mining applications of neural networks. She has authored or co-authored more than 175 refereed publications in the areas of statistical signal processing, neural computation, adaptive signal processing, biomedical data analysis, bioinformatics, and communications. Dr. Adalı is the recipient of a 1997 National Science Foundation CAREER Award.     

Future goals of engineering in biology and medicine

In early September an international conference was held in Washington, D.C., to assess the rapidly changing and vigorous interaction between the engineering sciences and biology and medicine. Leaders from these fields discussed ways and means of broadening the scientific base for the biomedical field, expressed their dissatisfactions with present support mechanisms, explored the difficulties in bringing computers into the clinical and hospital situations, emphasized the need for training the right kind of people for biomedical endeavors, saw the emergence of the ``whole systems approach' as a healthy symptom, predicted greater multidisciplinary teamwork, greater use of computers, and a far deeper impact of biomedical engineering in the years ahead. One major hindrance to more rapid advances was said to be not science-centered but society-centered, rooted in our expression of social values. This article highlights this unusual and unusually productive conference.     

The IEEE Systems, Man, and Cybernetics Society: historical development, current status, and future perspectives

In the evolution of any professional organization, it is informative and desirable to take stock of what has occurred, and to use this assessment to consider and plan for the future. The IEEE Systems, Man, and Cybernetics (SMC) Society is considered to be the leading professional society in the transdisciplinary area of systems engineering, cybernetics, and human machine systems, and has an international reputation for our efforts in developing and presenting innovative research results related to this area. In this paper, we - group of five current and former SMC Society presidents - consider the past, present, and future of the IEEE SMC Society; we are also doing this to commemorate the Society's 30th anniversary. In particular, we address our auspicious beginning; our transition from an incubatee to an incubator society; the breadth of our transactions; the international character of our membership; the appropriateness of our name; the move toward an "intelligent" systems-oriented umbrella organization; the evolving array of research areas; and the challenges and opportunities we face in the future.     

微纳米分子系统研究领域的最新进展——IEEE NEMS 2021国际会议综述

2021年4月25~29日,由厦门大学、北京大学、电子科技大学联合举办的第十六届IEEE国际纳米/微米工程及分子系统大会(IEEE-NEMS 2021)于福建厦门顺利召开,共有来自全球各地的500多名微纳米科技领域专家学者与会分享最新研究成果。本文从纳米生物技术与纳米医学、微纳米传感器/驱动器和系统、纳米材料、微纳米与分子制造等4个角度介绍本次大会所展现的最新成果,并总结展望未来微纳米技术的发展趋势。     

基于Web的实时信息系统研究与应用

首先对实时信息以及实时信息系统给出定义.在此基础上,进一步提出实时信息价值评估方式以及实时信息系统的性能评估方式.然后结合两个个现有的实时信息系统,实时路况系统以及微博客系统,探讨实时信息系统在设计以及实现过程中面对的挑战,并且针对这些挑战,对现有的实时信息系统设计提出改进思想.根据这些改进思想,设计了INFOCOM LIVE实时会务系统.这个系统已经在国际顶级网络通信学术会议IEEE INFOCOM 2011的会场进行了实地运营.     

An Integrated Power Recovery Module Dedicated to Implantable Electronic Devices

This paper concerns the design and implementation of an inductively coupled RF telemetry for both power and data transferring to implantable microelectronic devices. The major shortcomings of available inductive powering designs are their low power-transfer efficiency and large size of the implantable unit. Therefore, there is a need to fully integrate interfacing module of the implantable unit. The presented power recovery module is dedicated to the biotelemetry application of cortical/nerve stimulation. The proposed strategy allows providing dual regulated output voltages 3.3 V/1.8 V to the electrodes driver and other implantable circuitry, respectively. Its low dropout voltage makes high power efficiency attainable. Fabricated integrated prototype in a CMOS 0.18 m technology has demonstrated its feasibility, providing a load current driving ability of 5 mA for each one of the two supply voltages.Yamu Hu received the B.S. degree in electrical engineering from Huazhong University of Science & Technology (HUST), Wuhan, P. R. China, in 1993, and the M.S. degree in electronics engineering from Ecole Polytechnique of Montreal, Canada, in 2000. He is currently working toward the Ph.D degree in electronics engineering at the same university. His research interest includes low-noise, low-power Analog/Mixed-Signal ICs for biomedical applications, RF front-end for wireless communications.Mohamad Sawan received the B.Sc. degree in electrical engineering from Université Laval, Canada in 1984, the M.Sc. and Ph.D. degrees, both in electrical engineering, from Université de Sherbrooke, Canada, in 1986 and 1990 respectively, and postdoctorate training from McGill University, Canada in 1991. He joined Ecole Polytechnique de Montréal in 1991 where he is currently a Professor in Microelectronics.His scientific interests are the design and test of mixed-signal (analog, digital and RF) circuits and systems, the digital and analog signal processing, the modeling, design, integration, assembly and validation of advanced wirelessly powered and controlled monitoring and measurement techniques. These topics are oriented toward the biomedical implantable devices and telecommunications applications. Dr. Sawan is a holder of a Canadian Research Chair in Smart Medical Devices. He is leading the ReSMiQ (Microelectronics Strategic Alliance of Quebec) research center. He is founder of the Eastern Canadian IEEE-Solid State Circuits Society Chapter and the IEEE-Northeastern workshop on Circuits and Systems (NewCAS). Also, he is cofounder of the International Functional Electrical Stimulation Society, and founder of PolySTIM neurotechnology laboratory at the Ecole Polytechnique de Montreal.He published more than 250 papers in peer reviewed journals and conference proceedings and was awarded 6 patents. He is editor of the Springer Mixed-signal Letters, Distinguished Lecturer for the IEEE CAS Society. He received the Barbara Turnbull 2003 award for spinal cord research. He is Fellow of the Canadian Academy of Engineering, and Fellow of the IEEE.Mourad El-Gamal received the B.Sc. degree with Honours from Ain-Shams University, Cairo, Egypt, in 1987, the M.Sc. degree from Vanderbilt University, Nashville, TN, in 1993, and the Ph.D. degree from McGill University, Montré al, Canada, in 1998, all in electrical engineering.He is currently an Associate Professor and William Dawson Scholar at McGill University. His research interests include integrated circuits and MEMS for communications applications, on which he has published many papers, and most recently contributed to a chapter on low voltage 5-GHz RFIC front-ends, published by the IEE in 2003. He has received several teaching awards and recognitions, and holds one patent. He was on leave of absence from McGill in 2002 to assume the role of Director of Engineering, then Vice President, of the Wireless Business Unit of MEMSCAP, headquartered in France—a 165 employee, publicly trading company specializing in MEMS. He oversaw all the business and technical aspects in different sites around the world related to RF-MEMS devices, RFICs, and millimeter-wave passive circuits. Earlier, he worked for the French telecommunications company ALCATEL and was a Member of the Technical Staff at IBM. He regularly serves as a consultant for leading microelectronics companies in North America and in Europe.Dr. El-Gamal is a member of the Analog Signal Processing Technical Committee of the IEEE Circuits and Systems (CAS) Society, and is a member of the Technical Committee of the Bipolar/BiCMOS Circuits and Technology Meeting (BCTM). He was a Guest Editor for the October 2004 issue of the Journal of Solid-State Circuits. He is the co-recipient of several research awards, the most recent being the 2003 Myril B. Reed Best Paper Award of the IEEE International Midwest Symposium on Circuits and Systems for work on frequency synthesizer covering the lower and upper bands of 5 GHz WLANs.     

Hardware Efficient Fast Computation of the Discrete Fourier Transform

In this paper, a new systolic array for prime N-length DFT is first proposed, and then combined with Winograd Fourier Transform algorithm (WFTA) to control the increase of the hardware cost when the transform length is large. The proposed new DFT design is both fast and hardware efficient. Compared with the recently reported DFT design with computational complexity of O(log N), the proposed design saves the average number of required multiplications by 30 to 60% and reduces the average computation time by more than 2 times, when the transform length changes from 16 to 2048. Chao Cheng received his MSEE degree from Huazhong University of Science and Technology, Wuhan, China, in 2001. With three years industrial experience as a digital communication engineer from VIA Technologies, he is now pursuing his Ph.D. degree at the University of Minnesota, Twin Cities, MN. His present research interest is in VLSI digital signal processing algorithms and their implementation. Keshab K. Parhi received his B.Tech., MSEE, and Ph.D. degrees from the Indian Institute of Technology, Kharagpur, the University of Pennsylvania, Philadelphia, and the University of California at Berkeley, in 1982, 1984, and 1988, respectively. He has been with the University of Minnesota, Minneapolis, since 1988, where he is currently Distinguished McKnight University Professor in the Department of Electrical and Computer Engineering. His research addresses VLSI architecture design and implementation of physical layer aspects of broadband communications systems. He is currently working on error control coders and cryptography architectures, high-speed transceivers, and ultra wideband systems. He has published over 400 papers, has authored the text book VLSI Digital Signal Processing Systems (Wiley, 1999) and coedited the reference book Digital Signal Processing for Multimedia Systems (Marcel Dekker, 1999). Dr. Parhi is the recipient of numerous awards including the 2004 F.E. Terman award by the American Society of Engineering Education, the 2003 IEEE Kiyo Tomiyasu Technical Field Award, the 2001 IEEE W.R.G. Baker prize paper award, and a Golden Jubilee award from the IEEE Circuits and Systems Society in 1999. He has served on the editorial boards of the IEEE TRANSACTIONS ON CAS, CAS-II, VLSI Systems, Signal Processing, Signal Processing Letters, and Signal Processing Magazine, and currently serves as the Editor-in-Chief of the IEEE Trans. on Circuits and Systems---I (2004--2005 term), and serves on the Editorial Board of the Journal of VLSI Signal Processing. He has served as technical program cochair of the 1995 IEEE VLSI Signal Processing workshop and the 1996 ASAP conference, and as the general chair of the 2002 IEEE Workshop on Signal Processing Systems. He was a distinguished lecturer for the IEEE Circuits and Systems society during 1996--1998. He is a Fellow of IEEE (1996). An erratum to this article is available at .     

Special Issue on Flexible Electronics Technology, Part II: Materials and Devices

Presents an introduction to a special issue of Proceedings of the IEEE. Flexible electronics is entering an exciting phase in the technology development cycle. After a decade of fundamental materials and device research, we are now witnessing the first major push toward commercialization. Productization requires device architectures and materials processes that are reliable and suitably qualified for high volume manufacturing. While the focus of the July issue of the Proceedings of the IEEE was on electronic systems and applications, the theme of the current issue is on materials and device technology, process development, and manufacturing technology. The fifteen papers in this issue provide a good overview of the status of flexible electronic materials and manufacturing technology.     

Nanocellulose-Based Functional Materials: From Chiral Photonics to Soft Actuator and Energy Storage

Nanocellulose is currently in the limelight of extensive research from fundamental science to technological applications owing to its renewable and carbon-neutral nature, superior biocompatibility, tailorable surface chemistry, and unprecedented optical and mechanical properties. Herein, an up-to-date account of the recent advancements in nanocellulose-derived functional materials and their emerging applications in areas of chiral photonics, soft actuators, energy storage, and biomedical science is provided. The fundamental design and synthesis strategies for nanocellulose-based functional materials are discussed. Their unique properties, underlying mechanisms, and potential applications are highlighted. Finally, this review provides a brief conclusion and elucidates both the challenges and opportunities of the intriguing nanocellulose-based technologies rooted in materials and chemistry science. This review is expected to provide new insights for nanocellulose-based chiral photonics, soft robotics, advanced energy, and novel biomedical technologies, and promote the rapid development of these highly interdisciplinary fields, including nanotechnology, nanoscience, biology, physics, synthetic chemistry, materials science, and device engineering.     

Key research challenges in network management

Although network management has always played a key role for industry, it only recently received a similar level of attention from many research communities, accelerated by funding opportunities from new initiatives, including the FP7 Program in Europe and GENI/FIND in the United States. Work is ongoing to assess the state of the art and identify the challenges for future research in the field, and this article contributes to this discussion. It presents major findings from a two-day workshop organized jointly by the IRTF/NMRG and the EMANICS Network of Excellence, at which researchers, operators, vendors, and technology developers discussed the research directions to be pursued over the next five years. The workshop identified several topic areas, including management architectures, distributed real-time monitoring, data analysis and visualization, ontologies, economic aspects of management, uncertainty and probabilistic approaches, as well as understanding the behavior of managed systems.     

DNA Hydrogels as Functional Materials and Their Biomedical Applications

With the remarkable development of DNA nanotechnology, interest in DNA molecules has expanded beyond its biological role to building blocks in materials science. As a unique branch of DNA-based materials, DNA hydrogels have exhibited many fascinating characteristics, including broad biocompatibility, precise programmability, convenient modification, and tunable mechanical properties, which make DNA hydrogels ideal biomaterials. Moreover, by combining with functional nucleic acids, such as aptamers, i-motif nanostructures, CpG oligodeoxynucleotides, and DNAzymes, DNA hydrogels can be further tailored to provide additional target recognition, therapeutic potential, and catalytic activities, allowing them to play important roles in biosensing and medical applications. This review, aims to provide readers with an up-to-date overview of the important developments of biomedical DNA hydrogels. First, it introduces different synthetic strategies of hydrogels that utilize DNA as building materials and functional units within the hydrogel networks and discuss their advantages in biomedical applications. Subsequently, new approaches and applications of biomedical DNA hydrogels in the recent years are highlighted, such as therapeutic systems, cell culture platforms, tissue engineering materials, and biosensors. Finally, future perspectives and remaining challenges of DNA hydrogels in biomedicine are presented.     

QoS-driven asynchronous uplink subchannel allocation algorithms for space-time OFDM-CDMA systems in wireless networks

In order to support the diverse Quality of Service (QoS) requirements for differentiated data applications in broadband wireless networks, advanced techniques such as space-time coding (STC) and orthogonal frequency division multiplexing (OFDM) are implemented at the physical layer. However, the employment of such techniques evidently affects the subchannel-allocation algorithms at the medium access control (MAC) layer. In this paper, we propose the QoS-driven cross-layer subchannel-allocation algorithms for data transmissions over asynchronous uplink space-time OFDM-CDMA wireless networks. We mainly focus on QoS requirements of maximizing the best-effort throughput and proportional bandwidth fairness, while minimizing the upper-bound of scheduling delay. Our extensive simulations show that the proposed infrastructure and algorithms can achieve high bandwidth fairness and system throughput while reducing scheduling delay over wireless networks. Xi Zhang (S’89-SM’98) received the B.S. and M.S. degrees from Xidian University, Xi’an, China, the M.S. degree from Lehigh University, Bethlehem, PA, all in electrical engineering and computer science, and the Ph.D. degree in electrical engineering and computer science (Electrical Engineering—Systems) from The University of Michigan, Ann Arbor, USA. He is currently an Assistant Professor and the Founding Director of the Networking and Information Systems Laboratory, Department of Electrical and Computer Engineering, Texas A&M University, College Station, Texas, USA. He was an Assistant Professor and the Founding Director of the Division of Computer Systems Engineering, Department of Electrical Engineering and Computer Science, Beijing Information Technology Engineering Institute, Beijing, China, from 1984 to 1989. He was a Research Fellow with the School of Electrical Engineering, University of Technology, Sydney, Australia, and the Department of Electrical and Computer Engineering, James Cook University, Queensland, Australia, under a Fellowship from the Chinese National Commission of Education. He worked as a Summer Intern with the Networks and Distributed Systems Research Department, Bell Laboratories, Murray Hills, NJ, and with AT&T Laboratories Research, Florham Park, NJ, in 1997. He has published more than 80 technical papers. His current research interests focus on the areas of wireless networks and communications, mobile computing, cross-layer designs and optimizations for QoS guarantees over mobile wireless networks, wireless sensor and Ad Hoc networks, wireless and wireline network security, network protocols design and modeling for QoS guarantees over multicast (and unicast) wireless (and wireline) networks, statistical communications theory, random signal processing, and distributed computer-control systems. Dr. Zhang received the U.S. National Science Foundation CAREER Award in 2004 for his research in the areas of mobile wireless and multicast networking and systems. He is currently serving as an Editor for the IEEE Transactions on Wireless Communications, an Associated Editor for the IEEE Transactions on Vehicular Technology, and and Associated Editor for the IEEE Communications Letters, and is also currently serving as a Guest Editor for the IEEE Wireless Communications Magazine for the Special Issues of “Next Generation of CDMA vs. OFDMA for 4G Wireless Applications”. He has served or is serving as the Panelist on the U.S. National Science Foundation Research-Proposal Review Panel in 2004, the WiFi-Hotspots/WLAN and QoS Panelist at the IEEE QShine 2004, as the Symposium Chair for the IEEE International Cross-Layer Designs and Protocols Symposium within the IEEE International Wireless Communications and Mobile Computing Conference (IWCMC) 2006, the Technical Program Committee Co-Chair for the IEEE IWCMC 2006, the Poster Chair for the IEEE QShine 2006, the Publicity Co-Chair for the IEEE WirelessCom 2005, and as the Technical Program Committee members for IEEE GLOBECOM, IEEE ICC, IEEE WCNC, IEEE VTC, IEEE QShine, IEEE WoWMoM, IEEE WirelessCom, and IEEE EIT. He is a Senior Member of the IEEE and a member of the Association for Computing Machinery (ACM). Jia Tang (S’03) received the B.S. degree in electrical engineering from Xi’an Jiaotong University, Xi’an, China, in 2001. He is currently a Research Assistant working towards the Ph.D. degree in the Networking and Information Systems Laboratory, Department of Electrical and Computer Engineering, Texas A&M University, College Station, Texas, USA. His research interests include mobile wireless communications and networks, with emphasis on cross-layer design and optimizations, wireless quality-of-service (QoS) provisioning for mobile multimedia networks, wireless diversity techniques, and wireless resource allocation. Mr. Tang received the Fouraker Graduate Research Fellowship Award from the Department of Electrical and Computer Engineering, Texas A&M University in 2005.     

Update Propagation Algorithms for Supporting Disconnected Write in Mobile Wireless Systems with Data Broadcasting Capability

We develop and analyze algorithms for propagating updates by mobile hosts in wireless client–server environments that support disconnected write operations, with the goal of minimizing the tuning time for update propagation to the server. These algorithms allow a mobile host to update cached data objects while disconnected and propagate the updates to the server upon reconnection for conflict resolutions. We investigate two algorithms applicable to mobile systems in which invalidation reports/data can be broadcast to mobile hosts periodically. We show that there exists an optimal broadcasting period under which the tuning time is minimized for update propagations. We perform a comparative analysis between these two update propagation algorithms that rely on broadcasting data and an algorithm that does not, and identify conditions under which an algorithm should be applied to reduce the total tuning time for update propagation by the mobile user to save the valuable battery power and avoid high communication cost. For real-time applications, we address the tradeoff between tuning time and access time with the goal to select the best update propagation algorithm that can minimize the tuning time while satisfying the imposed real-time deadline constraint. The analysis result is applicable to file/data objects that mobile users may need to modify while on the move. Ing-Ray Chen received the BS degree from the National Taiwan University, Taipei, Taiwan, and the MS and PhD degrees in computer science from the University of Houston. He is currently an associate professor in the Department of Computer Science at Virginia Tech. His research interests include mobile computing, pervasive computing, multimedia, distributed systems, real-time intelligent systems, and reliability and performance analysis. Dr. Chen has served on the program committee of numerous conferences, including as program chair for 29th IEEE Annual International Computer Software and Application Conference in 2005, 14th IEEE International Conference on Tools with Artificial Intelligence in 2002, and 3rd IEEE Symposium on Application-Specific Systems and Software Engineering Technology in 2000. Dr. Chen currently serves as an Associate Editor for IEEE Transactions on Knowledge and Data Engineering, The Computer Journal, and International Journal on Artificial Intelligence Tools. He is a member of the IEEE/CS and ACM. Ngoc Anh Phan received her Bachelor of Science degree from Moscow Technical University of Communication and Computer Science in 1997, and a Master of Science degree in Computer Science from Virginia Polytechnic Institute and State University (Virginia Tech) in 1999. She is currently a Ph.D student at Virginia Tech and a Senior Software Engineer at America Online Inc. Her research interests include wireless communications, data management, sensor networks, fault tolerance, and mobile computing. I-Ling Yen received her BS degree from Tsing-Hua University, Taiwan, and her MS and PhD degrees in Computer Science from the University of Houston. She is currently an Associate Professor of Computer Science at the University of Texas at Dallas. Dr. Yen's research interests are in distributed systems, fault-tolerant computing, self-stabilization algorithms, and security. She has served as program co-chair for the 1997 IEEE High Assurance Systems Engineering Workshop, the 1999 IEEE Symposium on Application-Specific Systems and Software Engineering Technology, and the 1999 Annual IEEE International Conference on Computer Software and Applications Conference. Dr. Yen is a member of the IEEE/CS.     

VLSI Architecture for Forward Discrete Wavelet Transform Based on B-spline Factorization

Based on B-spline factorization, a new category of architectures for Discrete Wavelet Transform (DWT) is proposed in this paper. The B-spline factorization mainly consists of the B-spline part and the distributed part. The former is proposed to be constructed by use of the direct implementation or Pascal implementation. And the latter is the part introducing multipliers and can be implemented with the Type-I or Type-II polyphase decomposition. Since the degree of the distributed part is usually designed as small as possible, the proposed architectures could use fewer multipliers than previous arts, but more adders would be required. However, many adders can be implemented with smaller area and lower speed because only few adders are on the critical path. Three case studies, including the JPEG2000 default (9, 7) filter, the (6, 10) filter, and the (10, 18) filter, are given to demonstrate the efficiency of the proposed architectures.Chao-Tsung Huang was born in Kaohsiung, Taiwan, R.O.C., in 1979. He received the B.S. degree from the Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan, R.O.C., in 2001. He currently is working toward the Ph.D. degree at the Graduate Institute of Electronics Engineering, National Taiwan University. His major research interests include VLSI design and implementation for signal processing systems.Po-Chih Tseng was born in Tao-Yuan, Taiwan in 1977. He received the B.S. degree in Electrical and Control Engineering from National Chiao Tung University in 1999 and the M.S. degree in Electrical Engineering from National Taiwan University in 2001. He currently is pursuing the Ph.D. degree at the Graduate Institute of Electronics Engineering, Department of Electrical Engineering, National Taiwan University. His research interests include VLSI design and implementation for signal processing systems, energy-efficient reconfigurable computing for multimedia systems, and power-aware image and video coding systems.Liang-Gee Chen received the B.S., M.S., and Ph.D. degrees in electrical engineering from National Cheng Kung University, Tainan, Taiwan, R.O.C., in 1979, 1981, and 1986, respectively.In 1988, he joined the Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan, R.O.C. During 1993–1994, he was a Visiting Consultant in the DSP Research Department, AT&T Bell Labs, Murray Hill, NJ. In 1997, he was a Visiting Scholar of the Department of Electrical Engineering, University of Washington, Seattle. Currently, he is Professor at National Taiwan University, Taipei, Taiwan, R.O.C. His current research interests are DSP architecture design, video processor design, and video coding systems.Dr. Chen has served as an Associate Editor of IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY since 1996, as Associate Editor of the IEEE TRANSACTIONS ON VLSI SYSTEMS since 1999, and as Associate Editor of IEEE TRANSACTIONS CIRCUITS AND SYSTEMS II since 2000. He has been the Associate Editor of the Journal of Circuits, Systems, and Signal Processing since 1999, and a Guest Editor for the Journal of Video Signal Processing Systems. He is also the Associate Editor of the PROCEEDINGS OF THE IEEE. He was the General Chairman of the 7th VLSI Design/CAD Symposium in 1995 and of the 1999 IEEE Workshop on Signal Processing Systems: Design and Implementation. He is the Past-Chair of Taipei Chapter of IEEE Circuits and Systems (CAS) Society, and is a member of the IEEE CAS Technical Committee of VLSI Systems and Applications, the Technical Committee of Visual Signal Processing and Communications, and the IEEE Signal Processing Technical Committee of Design and Implementation of SP Systems. He is the Chair-Elect of the IEEE CAS Technical Committee on Multimedia Systems and Applications, During 2001-2002, he served as a Distinguished Lecturer of the IEEE CAS Society. He received the Best Paper Award from the R.O.C. Computer Society in 1990 and 1994. Annually from 1991 to 1999, he received Long-Term (Acer) Paper Awards. In 1992, he received the Best Paper Award of the 1992 Asia-Pacific Conference on circuits and systems in the VLSI design track. In 1993, he received the Annual Paper Award of the Chinese Engineer Society. In 1996 and 2000, he received the Outstanding Research Award from the National Science Council, and in 2000, the Dragon Excellence Award from Acer. He is a member of Phi Tan Phi.     

Interleaved Trellis Coded Modulation and Decoder Optimizations for 10 Gigabit Ethernet over Copper

There were several modulation and coding proposals for 10GBASE-T (10 Gigabit Ethernet over copper) systems. One of these is based on a 10-level pulse amplitude modulation (PAM-10) combined with a 4D (four-dimensional) 8-state trellis code similar to the one in 1000BASE-T (1000 Megabit Ethernet over copper). The trellis code can be used in a conventional manner as in 1000BASE-T, but the corresponding decoder with a long critical path needs to operate at 833 MHz. It is difficult to meet the critical path requirements of such a decoder. To solve the problem, two interleaved trellis coded modulation schemes are proposed in this paper. The inherent decoding speed requirements can be relaxed by factors of 4 and 2, respectively. Due to intersymbol interference (ISI), the branch metric units in the decoders corresponding to the two interleaved modulation schemes are much more complicated than those in the conventional decoder. Thus this paper also considers the problem of complexity reduction of the decoders for the two proposed interleaved modulation schemes, and presents two novel complexity reduction schemes. Simulation results show that the error-rate performances of the two proposed interleaved schemes are quite close to that of the conventional scheme. It is also shown that the performance loss due to complexity reduction is negligible. This research was supported in part by the National Science Foundation by the grant number CCF-0429979. Yongru Gu received M.S. degree from Duke University, Durham, NC in 2001. Currently, he is working toward the Ph.D. degree at the Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis. His research interests lie in high-speed low-power VLSI implementation of digital signal precessing and communication systems. Keshab K. Parhi (S'85-M'88-SM'91-F'96) received his B.Tech., MSEE, and Ph.D. degrees from the Indian Institute of Technology, Kharagpur, the University of Pennsylvania, Philadelphia, and the University of California at Berkeley, in 1982, 1984, and 1988, respectively. He has been with the University of Minnesota, Minneapolis, since 1988, where he is currently Distinguished McKnight University Professor in the Department of Electrical and Computer Engineering. His research addresses VLSI architecture design and implementation of physical layer aspects of broadband communications systems. He is currently working on error control coders and cryptography architectures, high-speed transceivers, and ultra wideband systems. He has published over 400 papers, has authored the text book VLSI Digital Signal Processing Systems (Wiley, 1999) and coedited the reference book Digital Signal Processing for Multimedia Systems (Marcel Dekker, 1999). Dr. Parhi is the recipient of numerous awards including the 2004 F.E. Terman award by the American Society of Engineering Education, the 2003 IEEE Kiyo Tomiyasu Technical Field Award, the 2001 IEEE W.R.G. Baker prize paper award, and a Golden Jubilee award from the IEEE Circuits and Systems Society in 1999. He has served on the editorial boards of the IEEE TRANSACTIONS ON CAS, CAS-II, VLSI Systems, Signal Processing, Signal Processing Letters, and Signal Processing Magazine, and currently serves as the Editor-in-Chief of the IEEE Trans. on Circuits and Systems - I (2004–2005 term), and serves on the Editorial Board of the Journal of VLSI Signal Processing. He has served as technical program cochair of the 1995 IEEE VLSI Signal Processing workshop and the 1996 ASAP conference, and as the general chair of the 2002 IEEE Workshop on Signal Processing Systems. He was a distinguished lecturer for the IEEE Circuits and Systems society during 1996–1998.     

Provisioning link layer proportional service differentiation in wireless networks with smart antennas

In this paper, we present a collision free MAC protocol for wireless networks with smart antennas that provides proportional service differentiation to various classes of traffic based on their respective bandwidth demand. The proposed protocol works for diverse physical parameters such as number of interfaces at each node, number of communication frequencies, and antenna beamwidth. To the best of our knowledge, this is the first work that provides link layer differentiated services for wireless networks with smart antennas and explores the influence of the physical parameters and network topology on the performance of the MAC layer. Ashish Deopura received his B.Tech degree in Electrical Engineering from the Indian Institute of Technology Delhi, India, in 2003, and he received his M.S. degree in Computer Systems Engineering from the University of Massachusetts Amherst, in 2005. He currently works as a Modeling Engineer for OPNET Technologies located in Bethesda, MD Professor Aura Ganz is the director of the Multimedia Networking Laboratory at the University of Massachusetts at Amherst. She has authored more than 170 journal and conference papers in the areas of multimedia wireless networks, ubiquitous computing, telemedicine, and security. She is a co-author of the book: “Multimedia Wireless Networks”, Prentice Hall, 2003. Some of her recent assignments include: general co-chair of the IEEE UWBNETS workshop, general co-chair of the IEEE BROADMED workshop, general co-chair of the Massachusetts 3rd Annual R&D Conference, keynote speaker at the NSF sponsored workshop in Mobile Computing, and invited speaker at Personal and Local Wireless Network Solutions conference, and Motorola’s Wireless Communications Futures Forum, Wireless Local Area Networks Conference. She has a PhD, MSc and BSc in Computer Science from the Technion in Israel. More details can be found at: dvd1.ecs.umass.edu/wireless.