A novel hybrid WDM/SCM-PON sharing wavelength for up- and down-link using reflective semiconductor optical amplifier

A hybrid wavelength-division multiplexed/subcarrier multiplexed passive optical network (WDM/SCM-PON) which shares the same wavelength both up-link and down-link is presented by using a reflective semiconductor optical amplifier (RSOA) as a modulator. We investigated down-link of 622 Mb/s using distributed feedback laser diode with direct modulation and 100-Mb/s up-link using an RSOA as a modulator with 900-MHz SCM signal. In our scheme, a novel efficient and cost-effective WDM/SCM-PON using the same wavelength for down/up-link at each optical network unit is proposed and experimentally demonstrated.     

The control of channeling phenomenon

The dependence of depth profile on a tilt and twist angle was investigated with a resolution of 0.05/spl deg/ using a stencil mask ion implanter that has less than 0.1/spl deg/ parallelism of ion beam. Angular dependence of depth profiles obtained by secondary ion mass spectrometry (SIMS) shows the channeling phenomenon can be controlled using a highly controlled parallel ion beam. This means that if tilt angle is controlled with a resolution of less than 0.1/spl deg/, the variation caused by channeling phenomenon can be neglected. The threshold voltage data of n-type MOSFETs fabricated using a controlled parallel ion beam with resolution of less than 0.1/spl deg/ indicates that the variation is the same as that in the case of one fabricated using 7/spl deg/ implantation.     

GaAs-based high-gain direct-coupled distributed preamplifier using active feedback topology

A single-chip ultra-high gain distributed amplifier (DA) was developed using commercial GaAs PHEMT foundry for 40-Gb/s base band applications. Two seven-section DAs are directly coupled using a lumped dc level-shift circuit. The dc bias level of the second-stage DA can be tuned using the level-shift circuit for optimum gain. The gain of each DA stage has been optimized using a novel active feedback cascode topology, which allows the gain bandwidth product to be maximized while avoiding instability problems. The fabricated single-chip DA with a size of 2.1 mm /spl times/ 2.3 mm showed a high gain of 28 dB, and an average noise figure of 4.6 dB with a 41 GHz bandwidth. The corresponding transimpedance gain was 62 dB/spl Omega/ and the input noise current density was 14.5 pA//spl radic/Hz. The gain bandwidth product (GBWP) is 1030 GHz, which corresponds to the highest performance using GaAs technology for 40 Gb/s applications.     

Sub-50-nm physical gate length CMOS technology and beyond usingsteep halo

Sub-50-nm CMOS devices are investigated using steep halo and shallow source/drain extensions. By using a high-ramp-rate spike annealing (HRR-SA) process and high-dose halo, 45-nm CMOS devices are fabricated with drive currents of 650 and 300 μA/μm for an off current of less than 10 nA/μm at 1.2 V with T_ox^inv =2.5 nm. For an off current less than 300 nA/μm, 33-nm pMOSFETs have a high drive current of 400 uA/μm. Short-channel effect and reverse short-channel effect are suppressed simultaneously by using the HRR-SA process to activate a source/drain extension (SDE) after forming a deep source/drain (S/D). This process sequence is defined as a reverse-order S/D (R-S/D) formation. By using this formation, 24-nm nMOSFETs are achieved with a high drive current of 800 μA/μm for an off current of less than 300 μA/μm at 1.2 V. This high drive current might be a result of a steep halo structure reducing the spreading resistance of source/drain extensions     

CMOS integrated silicon pressure sensor

The sensor described includes a four-arm piezoresistance bridge circuit, an amplifier, and a bridge excitation circuit. This circuit is used to stabilize changes in sensitivity due to variations in temperature and supply voltage. The sensor was fabricated using a self-aligned double-poly Si gate p-well CMOS process combined with an electrochemical etch-stop technique using N/SUB 2/H/SUB 4/-H/SUB 2/O anisotropic etchant for the thin-square diaphragm formation. The silicon wafer was electrostatically adhered to a glass plate to minimize thermally induced stress. Less than a /spl plusmn/0.5% sensitivity shift and less than a /spl plusmn/5-mV offset shift were obtained in the 0-70/spl deg/C range, with a 1-V/kg/cm/SUP 2/ pressure sensitivity. By using a novel excitation technique, a sensitivity change of less than /spl plusmn/1.5% under a /spl plusmn/10% supply voltage variation was also achieved.     

On using a blackbody source to pump a Cd+photo-ionization laser

We report laser oscillations in Cd II on the 4d⁹ 5s^{2 2}D_5/2-4d¹⁰ 5_p ²P_3/2 transition at 441.6 nm using a laser-produced tungsten plasma as a pumping source. The axial electron density is estimated using a Mach-Zehnder interferometer     

Lateral profiling of trapped charge in SONOS flash EEPROMs programmed using CHE injection

The lateral profile of trapped charge in a silicon-oxide-nitride-oxide-silicon (SONOS) electrically erasable programmable read-only memory programmed using channel-hot-electron injection is determined using current-voltage (I/sub D/-V/sub G/) measurements along with two-dimensional device simulations and is verified using gate-induced-drain-leakage measurements, charge-pumping (CP) measurements, and Monte Carlo simulations. An iterative procedure is used to match simulated I/sub D/-V/sub G/ characteristics with experimental I/sub D/-V/sub G/ characteristics at different stages of programming, by sequentially increasing the trapped electron charge in simulations. Fresh cells are found to contain a high laterally nonuniform trapped charge, which (along with large electron injection during the program) make the conventional CP techniques inadequate for extracting the charge profile. This charge results in a nonmonotonous variation of threshold and flat-band voltages along the channel and makes it impossible to simultaneously determine interface and trapped charge profiles using CP alone. The CP technique is modified for application to SONOS cells and is used to verify the charge profile obtained using I/sub D/-V/sub G/ and to estimate the interface degradation. This paper enhances the study presented in our earlier work.     

High-Permittivity Dielectric Stack on Gallium Nitride Formed by Silane Surface Passivation and Metal–Organic Chemical Vapor Deposition

We report the first demonstration of an in situ surface-passivation technology for a GaN substrate using vacuum anneal (VA) and silane ( SiH₄) treatment in a metal-organic chemical vapor deposition multichamber tool. Excellent electrical properties were obtained for TaN/HfAlO/GaN capacitors. Interface state density D_it was measured from midgap to near-conduction-band edge (E_C) using the conductance method at high temperatures, and the lowest D_it of 1 × 10¹¹ cm^-2 · eV^-1 at the midgap was achieved. Multiple frequency capacitance-voltage (C-V) measurement (10, 400, and 500 kHz) showed little frequency dispersion. Furthermore, the TaN/HfAlO/GaN stack was studied using high-resolution transmission electron microscopy, and the effectiveness of passivation using VA and SiH₄ was evaluated using high-resolution X-ray photoelectron spectroscopy. The method reported here effectively removes the native oxide and passivates the GaN surface during the high-k dielectric-deposition process.     

Frequency responses of graded-bandgap low-noise avalanche photodiodes

Frequency responses of graded-bandgap low-noise avalanche photodiodes using AlcGa1-cAs, GaAS1-cSbc, and IncGa1-cAs have been computed using a novel hybrid computational technique. Response characteristics of nongraded structures have also been computed and a comparison is made.     

Very high speed intra-office optical link experiments for 0.4- and 1.6-Gbit/s trunk lines

Very high speed optical links are studied. Applicable areas for systems using light-emitting diodes (LED'S) or laser diodes (LD's) with short transmission length are clarified. A new type differential mode inversion (DMI) decoder is proposed and it is shown that the DMI code is suitable as the line code for very high speed intra-office optical links. By using DMI code. a 400-Mbit/s information rate optical transmission experiment employing a 1.3-μm InGaAsP LED and a 0.5-km graded-index multimode optical fiber (GIF) as well as a 1.6-Gbit/s information rate optical transmission experiment using a 1.3-μm InGaAsP/InP Fabry-Perot-type LD and a 10-km single-mode optical fiber (SMF) are carried out. These results show that the feasibility of a 400-Mbit/s intra-office optical link using the LED and GIF, as well as a 1.6-Gbit/s intra-office optical link using the LD and SMF, are confirmed and this optical transmission technology has high-speed performance up to 3.2 Gbit/s.     

Fluorine-assisted super-halo for sub-50-nm transistors

The potential of using a fluorine-assisted super-halo for sub-50-nm transistors is analyzed for the first time. The capability of producing a super-sharp halo using fluorine is demonstrated by one-dimensional (1-D) SIMS profiles. The added ability to tailor the halo profile using fluorine for different transistor criteria on junction capacitance, tunneling current, V/sub t/ roll-off, and mobility is demonstrated. The impact of the resulting fluorine-assisted halo dopant profile on the transistor characteristics is evaluated using TCAD simulations. Experimental data show that the fluorine-assisted halo process results in lowered junction capacitance and improved I/sub on/-I/sub off/ characteristics for both nMOS and pMOS.     

Low-noise metamorphic HEMTs with reflowed 0.1-/spl mu/m T-gate

A 0.1-/spl mu/m T-gate fabricated using e-beam lithography and thermally reflow process was developed and applied to the manufacture of the low-noise metamorphic high electron-mobility transistors (MHEMTs). The T-gate developed using the thermally reflowed e-beam resist technique had a gate length of 0.1 /spl mu/m and compatible with the MHEMT fabrication process. The MHEMT manufactured demonstrates a cutoff frequency f/sub T/ of 154 GHz and a maximum frequency f/sub max/ of 300 GHz. The noise figure for the 160 /spl mu/m gate-width device is less than 1 dB and the associated gain is up to 14 dB at 18 GHz. This is the first report of a 0.1 /spl mu/m MHEMT device manufactured using the reflowed e-beam resist process for T-gate formation.     

Small Analog Stripline X-Band Ferrite Phase Shifter (Correspondence)

A small analog X-band stripline phase shifter using commercially available ferrites provides a figure of merit of 300/spl deg/ /dB, average coil drive power of 30 mW and element weight less than 4 oz. Experiments on an element using a new zinc-doped magnesium-manganese ferrite have given a figure of merit of 450/spl deg/ /dB.     

A self-calibrating 15 bit CMOS A/D converter

A self-calibrating analog-to-digital converter using binary weighted capacitors and resistor strings is described. Linearity errors are corrected by a simple digital algorithm. A folded cascode CMOS comparator resolves 30 /spl mu/V in 3 /spl mu/s. An experimental converter fabricated using a 6-/spl mu/m-gate CMOS process demonstrates 15-bit resolution and linearity at a 12-kHz sampling rate.     

Half-VCC sheath-plate capacitor DRAM cell withself-aligned buried plate wiring

A trench-capacitor DRAM cell called a half-V_CC sheath-plate capacitor (HSPC) cell has been developed using 0.6-μm-process technology. It is applicable to DRAMs with capacities of 16 Mb and over. The HSPC cell achieves a storage capacitance of 51 fF in a cell area of 4.2 μm² and excellent immunity (critical charge Q_c<35 fC) against alpha-particle injection. These advantages are achieved using a half-V_CC sheath-plate structure, a 5.5-nm SiO₂-equivalent Si ₃N₄-SiO₂ composite film, and three self-alignment technologies involving buried plate wiring, a sidewall contact and a pad for the bit-line contact. The device performance is evaluated using an experimental 2-kb array     

A low-power CAM using pulsed NAND-NOR match-line and charge-recycling search-line driver

This paper proposes a low-power CAM using pulsed NAND-NOR match-line and charge-recycling search-line. The pulsed NAND-NOR match-line not only significantly reduces the match-line power by activating only a few match-lines by using NAND cells for several bits but also achieves high speed by using NOR cells for most bits. The charge-recycling search-line driver reduces the search-line power by recycling the charge of search-lines without precharging. The CAM chip with 128/spl times/32 bit is fabricated in a 0.25-/spl mu/m CMOS process with 2.5 V. It dissipates 17.2 fJ/bit/search. It consumes 31% power of the dynamic NOR-type CAM.     

Proton-exchanged optical waveguides in LiNbO/sub 3/ using octanoic acid

Low-loss proton-exchanged planar waveguides in z-cut LiNbO/sub 3/ were fabricated and characterized optically using octanoic acid as a proton source. The waveguide exhibited a step-index profile with an index change of 0.118 measured at 0.633 mu m. The lowest waveguide propagation loss measured was 1.2 dB/cm, and it was reduced further to 0.4 dB/cm after annealing. The diffusion rate and the activation energy using this acid were found to be lower than those reported using other acids.<>     

A novel filterless fluorescence detection sensor for DNA analysis

A new method is presented of on-chip optical spectroscopy, functioning without the need for a bandpass filter or grating. The principle of optical spectroscopy is based on the difference of optical absorption coefficients with wavelength. The optical intensity is calculated from the different penetration depths in Si. The key to the new spectrometer is the use of a photogate active pixel providing the selective control of photo-generated charge using the gate voltage. To demonstrate this spectrometer, a novel filterless fluorescence detection sensor has been fabricated in our laboratory, using standard 5-/spl mu/m CMOS silicon integrated circuit technology. The SYBR-Green label fluoresces at 520 nm when exited by 470-nm radiation. In a simulation experiment using two LEDs, the fluorescent intensity detected was 1/300 of the excitation light intensity (intensity of fluorescence was 1 /spl mu/W/cm/sup 2/, while the excitation illumination was 300 /spl mu/W/cm/sup 2/). In an experiment using actual DNA solution containing SYBR-Green, it was confirmed that the fluorescence detection sensor successfully detected the fluorescent label without the need for a filter.     

A TaN-HfO/sub 2/-Ge pMOSFET with NovelSiH/sub 4/ surface passivation

In this letter, we demonstrate a novel surface passivation process for HfO/sub 2/ Ge pMOSFETs using SiH/sub 4/ surface annealing prior to HfO/sub 2/ deposition. By using SiH/sub 4/ passivation, a uniform amorphous interfacial layer is formed after device fabrication. Electrical results show that the HfO/sub 2/ Ge MOSFET with Si-passivation exhibits less frequency dispersion, narrower gate leakage current distribution, and a /spl sim/140% higher peak mobility than that of the device with surface nitridation.     

Proposal to Achieve 1 Tb/s per Wavelength Transmission Using Three-Dimensional LDPC-Coded Modulation

We propose a three-dimensional (3-D) low-density parity check (LDPC)-coded modulation scheme that enables optical transmission beyond 320 Gb/s in aggregate rate using currently available commercial components operating at 40 giga-symbols/s. The proposed scheme introduces significant performance improvement of up to 4.1 dB at a bit-error ratio of 10^-9 over the corresponding two-dimensional scheme. In addition, by using LDPC-coded 1024-3D-constellation it is possible, at least in theory, to achieve beyond a total of 1-Tb/s transmission using transmission equipment operating at 100 giga-symbols/s, once it reaches the maturity of 40-Gb/s systems.