Electrical characteristics of 4.5 kV implanted anode 4H-SiC p-i-njunction rectifiers

4500 V 4H-SiC p-i-n junction rectifiers with low on-state voltage drop (3.3-4.2 V), low reverse leakage current (3×10^-6 A/cm²), and fast switching (30-70 ns) have been fabricated and characterized. Forward current-voltage measurements indicate a minimum ideality factor of 1.2 which confirms a recombination process involving multiple energy levels. Reverse leakage current exhibits a square root dependence on voltage below the punchthrough voltage where leakage currents of less than 3×10^-6 A/cm² are measured. Reverse recovery measurements are presented which indicate the presence of recombination at the junction perimeter where a surface recombination velocity of 2-8×10⁵ cm/s is found. These measurements also indicate drift layer bulk carrier lifetimes ranging from 74 ns at room temperature to 580 ns at 250°C     

3100 V, asymmetrical, gate turn-off (GTO) thyristors in 4H-SiC

A 2-mm×2-mm, 4H-SiC, asymmetrical npnp gate turn-off (GTO) thyristor with a blocking voltage of 3100 V and a forward current of 12 A is reported. This is the highest reported power handling capability of 37 kW for a single device in SiC. The 5-epilayer structure utilized a blocking layer that was 50 μm thick, p-type, doped at about 7-9×10¹⁴ cm^-3. The devices were terminated with a single zone junction termination extension (JTE) region formed by ion-implantation of nitrogen at 650°C. The device was able to reliably turn-on and turn-off 20 A (500 A/cm²) of anode current with a turn-on gain (I_K/I_{G, on}) of 20 and a turn-off gain (I_K/I_{G, off}) of 3.3     

Steady-state and transient forward current-voltage characteristicsof 4H-silicon carbide 5.5 kV diodes at high and superhigh currentdensities

Steady-state and transient forward current-voltage I-V characteristics have been measured in 5.5 kV p⁺-n-n⁺ 4H-SiC rectifier diodes up to a current density j≈5.5×10 ⁴ A/cm². The steady-state data are compared with calculations in the framework of a model, in which the emitter injection coefficient decreases with increasing current density. To compare correctly the experimental and theoretical results, the lifetime of minority carriers for high injection level, τ_ph, has been estimated from transient characteristics. At low injection level, the hole diffusion length L_pl has been measured by photoresponse technique. For a low-doped n-base, the hole diffusion lengths are L_pl≈2 μm and L_ph≈6-10 μm at low and high injection levels respectively. Hole lifetimes for low and high injection levels are τ_pl≈15 ns and τ_ph≈140-400 ns. The calculated and experimental results agree well within the wide range of current densities 10 A/cm ²3 A/cm². At j>5 kA/cm², the experimental values of residual voltage drop V is lower than the calculated ones. In the range of current densities 5×10³ A/cm²4 A/cm², the minimal value of differential resistance R_d =dV/dj is 1.5×10^-4 Ω cm². At j>25 kA/cm², R_d increases with increasing current density manifesting the contribution of other nonlinear mechanisms to the formation steady-state current-voltage characteristic. The possible role of Auger recombination is also discussed     

The planar 6H-SiC ACCUFET: a new high-voltage power MOSFETstructure

A novel planar accumulation channel SiC MOSFET structure is reported in this paper. The problems of gate oxide rupture and poor channel conductance previously reported in SiC UMOSFETs are solved by using a buried P⁺ layer to shield the channel region. The fabricated 6H-SiC unterminated devices had a blocking voltage of 350 V with a specific on-resistance of 18 mΩ.cm² at room temperature for a gate bias of only 5 V. This measured specific on-resistance is within 2.5× of the value calculated for the epitaxial drift region (10¹⁶ cm^-3, 10 μm), which is capable of supporting 1500 V     

Reliability of AlInAs/GaInAs heterojunction bipolar transistors

The reliability of high-performance AlInAs/GaInAs heterojunction bipolar transistors (HBTs) grown by molecular beam epitaxy (MBE) is discussed. Devices with a base Be doping level of 5×10¹⁹ cm^-3 and a base thickness of approximately 50 nm displayed no sign of Be diffusion under applied bias. Excellent stability in DC current gain, device turn-on voltage, and base-emitter junction characteristics was observed. Accelerated life-test experiments were performed under an applied constant collector current density of 7×10⁴ A/cm² at ambient temperatures of 193, 208, and 328°C. Junction temperature and device thermal resistance were determined experimentally. Degradation of the base-collector junction was used as failure criterion to project a mean time to failure in excess of 10⁷ h at 125°C junction temperature with an associated activation energy of 1.92 eV     

A CMOS compatible lateral emitter switched thyristor with enhancedturn-on capability

A new Lateral Emitter Switched Thyristor structure (LEST) is proposed and experimentally verified. The structure differs from the conventional LEST in that it embeds a floating ohmic contact between the n^- drift region and the n⁺ floating emitter. Both simulation and experimental results show that the device has an enhanced turn-on capability compared with the conventional LEST without deteriorating its other characteristics. The device is fabricated using a 3 μm CMOS process to have a 320 V breakdown voltage and a 0.7 V threshold voltage. Thyristor turn-on is observed at an anode voltage below 2 V. The maximum MOS controllable current density is in excess of 200 A/cm² with 5 V gate voltage     

Nitrogen Implantation to Improve Electron Channel Mobility in 4H-SiC MOSFET

Normally off 4H-SiC MOSFET devices have been fabricated on a p-type semiconductor and electrically characterized at different temperatures. A gate oxide obtained by nitrogen ion implantation performed before the thermal oxidation of SiC has been implemented in n-channel MOSFET technology. Two samples with a nitrogen concentration at the SiO₂/SiC interface of 5 X 10¹⁸ and 1.5 X 10¹⁹ cm^-3 and one unimplanted sample have been manufactured. The sample with the highest N concentration at the interface presents the highest channel mobility and the lowest threshold voltage. For increasing temperature, in all the samples, the threshold voltage decreases, and the electron channel mobility increases. The latter case attains a maximum value of about 40 cm²/V ldr s at 200degC for the sample with the highest N concentration. These trends are explained by the reduction of interface electron traps in the upper half of the band gap toward the conduction band edge. These results demonstrate that N implantation can be effectively used to improve the electrical performances of an n-type surface channel 4H-SiC MOSFET.     

A 2.5-kV static induction thyristor having new gate and shorted p-emitter structures

An SI thyristor with new gate and shorted p-emitter structures (DTT-SI thyristor) is proposed to realize a high-voltage high current high-speed device having a low forward voltage drop. Investigations using fabricated 2.5-kV 100-A DTT-SI thyristors and numerical analyses show that the DTT-SI thyristor has a good trade-off between the forward voltage drop and switching characteristics when the channel width is 8-10 µm and the maximum impurity concentration is about 1 × 10¹⁷to 4 × 10¹⁷cm^-3. The typical fabricated DTT-SI thyristor has a 2.5-kV forward blocking voltage with a 58-V reverse gate bias voltage, a 1.4-V forward voltage drop with a 100-A anode current, a 2- µs turn-on time, adi/dtcapability higher than 4000 A/µs, and can interrupt a 900-A anode current with a 3.5-µs turn-off time and a 5.6 gate turn-off gain on application of a 100-V reverse gate bias voltage.     

700-V asymmetrical 4H-SiC gate turn-off thyristors (GTO's)

Silicon Carbide (4H-SiC), asymmetrical gate turn-off thyristors (GTO's) were fabricated and tested with respect to forward voltage drop (V_F), forward blocking voltage, and turn-off characteristics. Devices were tested from room temperature to 350°C in the dc mode. Forward blocking voltages ranged from 600-800 V at room temperature for the devices tested. V_F of a typical device at 350°C was 4.8 V at a current density of 500 A/cm². Turn-off time was less than 1 μs. Although no beveling or advanced edge termination techniques were used, the blocking voltage represented approximately 50% of the theoretical value when tested in an air ambient. Also, four GTO cells were connected in parallel to demonstrate 600-V, 1.4 A (800 A/cm ²) performance     

Process and device characterization of high voltage gallium arsenide P-i-N layers grown by an improved liquid phase epitaxy method

GaAs P-i-N layers with an i-region net doping of less than 10¹² cm⁻³ were grown on P⁺ and N⁺ substrates by a modified liquid phase epitaxy (LPE) method. Doping profiles and structural data obtained by varius characterization techniques are presented and discussed. A P⁺-P-i-N-N⁺ diode with a 25 μm-wide i-region exhibits a breakdown voltage of 1000 V, a t_rr of 50 ns, and reverse current densities (at V_R = 800 V) of − 3 × 10⁻⁶ A/cm² at 25°C and 10⁻² A/cm² at 260° C.     

High performance poly-Si TFTs fabricated using pulsed laserannealing and remote plasma CVD with low temperature processing

Key technologies for fabricating polycrystalline silicon thin film transistors (poly-Si TFTs) at a low temperature are discussed. Hydrogenated amorphous silicon films were crystallized by irradiation of a 30 ns-pulsed XeCl excimer laser. Crystalline grains were smaller than 100 nm. The density of localized trap states in poly-Si films was reduced to 4×10¹⁶ cm^-3 by plasma hydrogenation only for 30 seconds. Remote plasma chemical vapor deposition (CVD) using mesh electrodes realized a good interface of SiO ₂/Si with the interface trap density of 2.0×10¹⁰ cm^-2 eV^-1 at 270°C. Poly-Si TFTs were fabricated at 270°C using laser crystallization, plasma hydrogenation and remote plasma CVD. The carrier mobility was 640 cm²/Vs for n-channel TFTs and 400 cm²/Vs for p-channel TFTs. The threshold voltage was 0.8 V for n-channel TFTs and -1.5 V for p-channel TFTs. The leakage current of n-channel poly-Si TFTs was reduced from 2×10^-10 A/μm to 3×10^-13 A/μm at the gate voltage of -5 V using an offset gate electrode with an offset length of 1 μm     

KrF excimer laser annealed TFT with very high field-effect mobilityof 329 cm2/V-s

A thin-film transistor (TFT) with a maximum field-effect mobility of 320 cm²/V-s, an on/off current ratio of 7.6×10⁷ , a threshold voltage of 6.7 V and a subthreshold slope of 0.37 V/decade was fabricated by using pulse laser annealing processes. Amorphous silicon films (a-Si:H) with a very low impurity concentration of 4×10¹⁸ cm^-3 for oxygen, 1.5×10¹⁸ cm^-3 for carbon, and 2×10¹⁷ cm^-3 for nitrogen were deposited by a plasma chemical vapor deposition (CVD) method and annealed by KrF excimer laser (wavelength of 248 nm). The Raman spectroscopy technique was a useful tool for optimizing laser annealing conditions. Experimental results show that two factors are very important for fabricating very-high mobility TFTs: (1) utilizing high-purity as-deposited a-Si:H film; and (2) performing whole laser annealing processes sequentially in a vacuum container and optimizing illumination conditions     

Power performance of InP-based single and double heterojunctionbipolar transistors

The microwave and power performance of fabricated InP-based single and double heterojunction bipolar transistors (HBTs) is presented. The single heterojunction bipolar transistors (SHBTs), which had a 5000 Å InGaAs collector, had BV_CEO of 7.2 V and J_Cmax of 2×10⁵ A/cm². The resulting HBTs with 2×10 μm² emitters produced up to 1.1 mW/μm2 at 8 GHz with efficiencies over 30%. Double heterojunction bipolar transistors (DHBTs) with a 3000-Å InP collector had a BV_CEO of 9 V and J_{c max} of 1.1×10⁵ A/cm², resulting in power densities up to 1.9 mW/μm² at 8 GHz and a peak efficiency of 46%. Similar DHBTs with a 6000 Å InP collector had a higher BV_CEO of 18 V, but the J _{c max} decreased to 0.4×10⁵ A/cm² due to current blocking at the base-collector junction. Although the 6000 Å InP collector provided higher f_max and gain than the 3000 Å collector, the lower J_{c max} reduced its maximum power density below that of the SHBT wafer. The impact on power performance of various device characteristics, such as knee voltage, breakdown voltage, and maximum current density, are analyzed and discussed     

Preparation of thin-film transistors with chemical bath depositedCdSe and CdS thin films

The authors have fabricated the thin-film transistor (TFT) with CdSe and CdS semiconductor thin films, prepared by a low temperature chemical bath deposition (CBD) method, as an active layer. The ON-current values of the CdSe-TFTs and CdS-TFTs at a gate bias of 10 V and a source-drain voltage of 10 V are about 100 μA and 5 μA, respectively. The OFF-current values of the CdSe-TFTs and CdS-TFTs at the source-drain voltage of 10 V are less than 10 pA. The fabricated CdSe-TFTs exhibited a field effect mobility of 15 cm²/V-s, threshold voltage of 3.5 V, subthreshold slope of 0.5 V/dec., and ON/OFF current ratios exceed 10⁷. A field effect mobility of I cm ²/V-s, a threshold voltage of 2.6 V, a subthreshold slope of 0.6 V/dec., and an ON/OFF current ratios exceed 10⁶ were observed for CdS TFTs     

High voltage 4H-SiC Schottky barrier diodes

Characteristics of 4H-SiC Schottky barrier diodes with breakdown voltages up to 1000 V are reported for the first time. The diodes showed excellent forward I-V characteristics, with a forward voltage drop of 1.06 V at an on-state current density of 100 A/cm². The specific on-resistance for these diodes was found to be low (2×10 ^-3 Ω-cm² at room temperature) and showed a T ^1.6 variation with temperature. Titanium Schottky barrier height was determined to be 0.99 eV independent of the temperature. The breakdown voltage of the diodes was found to decrease with temperature     

Study of bulk and elementary screw dislocation assisted reversebreakdown in low-voltage (<250 V) 4H-SiC p+-n junctiondiodes. II. Dynamic breakdown properties

For Part I see ibid., vol.46, no.3, pp.478-84 (Mar. 1999). This paper outlines the dynamic reverse-breakdown characteristics of low-voltage (<250 V) small-area <5×10^-4 cm² 4H-SiC p⁺-n diodes subjected to nonadiabatic breakdown-bias pulsewidths ranging from 0.1 to 20 μs 4H-SiC diodes with and without elementary screw dislocations exhibited positive temperature coefficient of breakdown voltage and high junction failure power densities approximately five times larger than the average failure power density of reliable silicon pn rectifiers. This result indicates that highly reliable low-voltage SiC rectifiers may be attainable despite the presence of elementary screw dislocations. However, the impact of elementary screw dislocations on other more useful 4H-SiC power device structures, such as high-voltage (>1 kV) pn junction and Schottky rectifiers, and bipolar gain devices (thyristors, ICBT's, etc.) remains to be investigated     

H2/O2 plasma on polysilicon thin-filmtransistor

It is reported for that H₂ plasma followed by O₂ plasma is more effective for passivating grain boundary states in polysilicon thin film. Polysilicon thin-film transistors (TFTs) made after H₂/O₂ plasma treatment can exhibit a turn-on threshold voltage of -0.1 V, a subthreshold swing of 0.154 V/decade, an ON/OFF current ratio I_on/I_off over 1×10⁸, and an electron mobility of 40.2 cm² /V-s     

A high-current and high-temperature 6H-SiC thyristor

A 6H-SiC thyristor has been fabricated and characterized. A forward breakover voltage close to 100 V and a pulse switched current density of 5200 A/cm² have been demonstrated. The thyristor is shown to operate under pulse gate triggering for turn-on and turn-off, with a rise time of 43 ns and a fall time of less than 100 ns. The forward breakover voltage is found to decrease by only 4% when the operating temperature is increased from room temperature to 300°C. It is found that anode ohmic contact resistance dominates the device forward drop at high current densities     

10 A, 2.4 kV Power DiMOSFETs in 4H-SiC

We report the characteristics of large area (3.3 × 3.3 mm ²) high-voltage 4H-SiC DiMOSFETs. The MOSFETs show a peak MOS channel mobility of 22 cm²/V·s and a threshold voltage of 8.5 V at room temperature. The DiMOSFETs exhibit an on-resistance of 4.2 mΩ·cm² at room temperature and 85 mΩ·cm² at 200°C. Stable avalanche characteristics at approximately 2.4 kV are observed. An on-current of 10 A is measured on a 0.103 cm² device. High switching speed is also demonstrated. This suggests that the devices are capable of high-voltage, high-frequency, low-loss switching applications     

Avalanche phenomena in 4H-SiC p-n diodes fabricated by aluminum orboron implantation

Characteristics of p-n junction fabricated by aluminum-ion (Al⁺) or boron-ion (B⁺) implantation and high-dose Al⁺-implantation into 4H-SiC (0001) have been investigated. By the combination of high-dose (4×10¹⁵ cm^-2) Al⁺ implantation at 500°C and subsequent annealing at 1700°C, a minimum sheet resistance of 3.6 kΩ/□ (p-type) has been obtained. Three types of diodes with planar structure were fabricated by employing Al+ or B+ implantation. B ⁺-implanted diodes have shown higher breakdown voltages than Al⁺-implanted diodes. A SiC p-n diode fabricated by deep B+ implantation has exhibited a high breakdown voltage of 2900 V with a low on-resistance of 8.0 mΩcm² at room temperature. The diodes fabricated in this study showed positive temperature coefficients of breakdown voltage, meaning avalanche breakdown. The avalanche breakdown is discussed with observation of luminescence