Thin-gate SiO2 films formed by in situ multiple rapidthermal processing

A reliable method of forming very thin SiO₂ films (<10 nm) has been developed by rapid thermal processing (RTP) in which in situ multiple RTP sequences have been employed. Sub-10-nm-thick SiO₂ films formed by single-step RTP oxidation (RTO) are superior to conventional furnace-grown SiO₂ on the SiO₂ /Si interface characteristics, dielectric strength, and time-dependent dielectric-breakdown (TDDB) characteristics. It has been confirmed that the reliability of SiO₂ film can be improved by pre-oxidation RTP cleaning (RTC) operated at 700-900°C for 20-60 s in a 1%HCl/Ar or H₂ ambient. The authors discuss the dielectric reliability of the SiO₂ films formed by single-step RTO in comparison with conventional furnace-grown SiO₂ films. The effects and optimum conditions of RTC prior to RTO on the TDDB characteristics are demonstrated. The dielectric properties of nitrided SiO₂ films formed via the N₂O-oxynitridation process are described     

High quality SiO2/Si interfaces of poly-crystallinesilicon thin film transistors by annealing in wet atmosphere

A new post-metallization annealing technique was developed to improve the quality of metal-oxide-semiconductor (MOS) devices using SiO ₂ films formed by a parallel-plate remote plasma chemical vapor deposition as gate insulators. The quality of the interface between SiO₂ and crystalline Si was investigated by capacitance-voltage (C-V) measurements. An H₂O vapor annealing at 270°C for 30 min efficiently decreased the interface trap density to 2.0×10¹⁰ cm^-2 eV^-1, and the effective oxide charge density from 1×10 ¹² to 5×10⁹ cm^-2. This annealing process was also applied to the fabrication of Al-gate polycrystalline silicon thin film transistors (poly-Si TFT's) at 270°C. In p-channel poly-Si TFT's, the carrier mobility increased from 60-400 cm² V^-1 s^-1 and the threshold voltage decreased from -5.5 to -1.7 V     

具有SiO2/SiNX/SiO2 复合绝缘层的有机薄膜晶体管

We have investigated a SiO_2/SiN_x/SiO_2 composite insulation layer structured gate dielectric for an organic thin film transistor(OTFT) with the purpose of improving the performance of the SiO_2 gate insulator. The SiO_2/SiN_x/SiO_2 composite insulation layer was prepared by magnetron sputtering.Compared with the same thickness of a SiO_2 insulation layer device,the SiO_2/SiN_x/SiO_2 composite insulation layer is an effective method of fabricating OTFT with improved electric characteristics and decrease...     

MOS characteristics of fluorinated gate dielectrics grown by rapidthermal processing in O2 with diluted NF3

Rapid thermal processing (RTP) was applied to the fabrication of the ultrathin (~10 nm) high-quality fluorinated oxides in O₂+NF₃. NF₃ (diluted in N₂) was used as the F source gas and was introduced either prior to rapid thermal oxidation (RTO) or with O₂ during the initial stage of RTO. The electrical characteristics of MOS capacitors have been studied and correlated with the chemical properties. It was found that SiO₂ with a small amount of F incorporated shows reduced interface state generation under F-N injection, whereas excessive F incorporation is detrimental     

Low-pressure H2/N2 annealing on indium tin oxide film

Annealing of indium tin oxide (ITO) film in low-pressure H₂/N₂ was investigated. On carefully selecting the annealing process window, apparent electrical property improvement as well as good optical property can be obtained. It was found that ITO annealed with 2 Pa, H₂/N₂:6/6 sccm, at 500 °C for an hour can increase its electrical conductivity 60% more than ITO without annealing, 58% more than ITO annealed with pure H₂. An annealed ITO without specially selected recipe can easily possess worse electrical and optical properties than that without annealing. It can be explained that annealing ITO in a hydrogen-contained environment can lead to hydrogen reduction–oxygen vacancy playing a donor role in ITO; however, annealing also provides the energy to remove ITO material defects including donors.     

Novel polycrystalline silicon thin film transistors prepared by deposition from Si2H6 and subsequent annealing by NH3 plasma

This work investigated the channel layer of polycrystalline silicon (poly-Si) thin film transistors (TFTs) prepared by amorphous silicon (a-Si) films deposited using Si₂H₆ gas. The recrystallization of channel layers, source/drain, gate electrodes and post implant anneal were performed at the same time. Due to the larger grain size, the device has higher field effect mobility than SiH₄ deposited devices. These devices were also subsequently passivated by NH₃ plasma. The NH₃ plasma significantly improves the n-channel devices; however, the improvement of p-channel devices is limited. Especially, the threshold voltage of n-channel devices is significantly shifted toward the negative gate voltage than the shift magnitude of p-channel devices. To investigate the band gap width and Fermi level by determining the leakage activation energy, it is found that the channel film is changed slightly from p-type to n-type. These results may be attributed to the donor effect by NH₃ plasma passivation.     

Novel technique for SiO2 formed by liquid-phasedeposition for low-temperature processed polysilicon TFT

A technique for SiO₂ formation by liquid-phase deposition (LPD) at nearly room temperature for low-temperature processed (LTP) polysilicon thin-film transistor (poly-Si TFT) was developed. LPD SiO₂ film with a lower P-etch rate shows a dense structure. LPD SiO₂ also exhibits good electrical characteristics. LTP poly-Si thin-film transistors (TFTs) with LPD SiO ₂ as the gate insulator have been fabricated and investigated. Their characteristics indicate performance adequate for their use as pixel transistors in liquid crystal displays (LCDs)     

Improving low-temperature APCVD SiO2 passivation byrapid thermal annealing for Si devices

The quality of low-temperature (≈400°C) atmospheric pressure chemical vapor deposited (APCVD) silicon dioxide (SiO₂ ) films has been improved by a short time rapid thermal annealing (RTA) step. The RTA step followed by a low temperature (400°C) forming gas anneal (FGA) results in a well-passivated Si-SiO₂ interface, comparable to thermally grown conventional oxides. Efficient and stable surface passivation is obtained by this technique on virgin silicon as well as on photovoltaic devices with diffused (n⁺p) emitter surface while maintaining a very low thermal budget. Device parameters are improved by this APCVD/RTA/FGA passivation process     

O2分压和退火对TiO2/SiO2纳米多层膜结构和光学性能的影响

利用Mass软件设计了TiO2/SiO2纳米多层光学增透膜膜系,并采用高真空电子束蒸发系统在不同O2分压条件下制备了TiO2/SiO2纳米多层膜,TiO2/SiO2薄膜多层膜体系在沉积条件下获得了很好的宽光谱光学透射性能,在可见光谱范围内透射率接近设计值,平均透射率达到90%以上。通过一系列测试方法对多层膜退火前后的透射率、组分结构和退火以后的残余应力以及表面形貌进行了研究。实验结果表明:在较高O2分压条件下,由于多层膜结构中O空位的减少,使得多层膜透射率逐渐增加。在退火条件下,随着退火温度的增加,导致了表面均方根粗糙度(RMS)的增加以及晶粒的聚集长大,500℃时多层膜组分结晶化明显加强,使得缺陷增多;同时受退火温度的影响,残余应力逐渐增加,组分相互扩散加剧使得多层膜界面受到破坏。这些因素最终导致TiO2/SiO2多层膜的透射率逐渐降低。     

不同氧化退火工艺下SiO2/SiC界面特性研究

The effect of the different re-oxidation annealing （ROA） processes on the SiO2/SiC interface charac- teristics has been investigated. With different annealing processes, the flat band voltage, effective dielectric charge density and interface trap density are obtained from the capacitance-voltage curves. It is found that the lowest interface trap density is obtained by the wet-oxidation annealing process at 1050 ℃ for 30 min, while a large num- ber of effective dielectric charges are generated. The components at the SiO2/SiC interface are analyzed by X-ray photoelectron spectroscopy （XPS） testing. It is found that the effective dielectric charges are generated due to the existence of the C and H atoms in the wet-oxidation annealing process.     

在SiO2中掺A1对Au／纳米（SiO2／Si／SiO2）／p—Si结构电致发光的影响

利用射频磁控溅射方法,制成纳米SiO2层厚度一定而纳米Si层厚度不同的纳米（SiO2/Si/SiO2）/p-Si结构和纳米（SiO2:A1/Si/SiO2:A1)/p-Si结构,用磁控溅射制备纳米SiO2:A1时所用的SiO2/A1复合靶中的A1的面积百分比为1%。上述两种结构中Si层厚度均为1-3nm,间隔为0.2nm。为了对比研究,还制备了Si层厚度为零的样品。这两种结构在900℃氮气下退火30min,正面蒸半透明Au膜,背面蒸A1作欧姆接触后,都在正向偏置下观察到电致发光（EL）。在一定的正向偏置下,EL强度和峰位以及电流都随Si层厚度的增加而同步振荡,位相相同。但掺A1结构的发光强度普遍比不掺A1结构强。另外,这两种结构的EL具体振荡特性有明显不同,对这两种结构的电致发光的物理机制和SiO2中掺A1的作用进行了分析和讨论。     

Two-step annealing technique for leakage current reduction inchemical-vapor-deposited Ta2O5 film

A capacitor technology developed to obtain extremely thin Ta₂ O₅ dielectric film with an effective SiO₂ film thickness down to 3 nm (equivalent to 11 fF/μm²) for a 1.5-V, low-power, high-density, 64-Mb DRAM is discussed. The Ta₂ O₅ has low leakage current, low defect density, and excellent step coverage. The key process is two-step annealing after the deposition of the film by thermal chemical vapor deposition (CVD). The first step involves ozone (O₃) annealing with ultraviolet light irradiation, which reduces the leakage current. The second step is dry oxygen (O₂) annealing, which decreases the defect density. A more significant reduction in the leakage current is attained by the combination of the two annealing steps     

脉冲激光对石英基底Ta2O5/SiO2滤光膜的损伤效应研究

随着高能激光系统的发展,对光学薄膜抵抗激光损伤能力的要求越来越高,而激光脉宽是脉冲激光对薄膜损伤行为的重要影响因素。针对Ta₂O₅/SiO₂多层膜,基于1-on-1测试方法,分析其在飞秒、皮秒、纳秒激光作用下的损伤特性。测得800 nm飞秒激光作用下的损伤阈值为1.67 J/cm₂;532 nm和1 064 nm皮秒激光作用下的损伤阈值分别为1.08 J/cm²和1.98 J/cm²;532 nm和1 064 nm纳秒激光作用下的损伤阈值分别为9.39 J/cm₂和21.57 J/cm₂,并使用金相显微镜观察了滤光膜的损伤形貌。实验结果表明：飞秒激光对滤光膜的损伤机理主要是多光子电离效应,而皮秒和纳秒激光对滤光膜的损伤机制主要是热效应。滤光膜在飞秒激光作用下的损伤阈值与皮秒激光作用下的损伤阈值相当,纳秒激光作用下的损伤阈值要高一个数量级,透射通带外损伤阈值约为通带内损伤阈值的2倍。     

Influence of the annealing temperature on the IR properties of SiO2 films grown from SiH4 + O2

Dispersion analysis was performed on low pressure chemically vapor deposited (LPCVD) SiO₂ films grown from SiH₄ + O₂ at 425 °C. The transmission spectra were analyzed using four Lorentz oscillators within the range 900–1400 cm⁻¹. It was found that the distribution of the SiOSi angles is a superposition of two Gaussians; one corresponding to bridges located in the bulk of the film and one corresponding to bridges located close to the boundaries of the film namely the interfaces of the films and the grain boundaries. The ratio between the bulk like SiOSi bridges over the boundary bridges was found equal to 0.61:1 indicating that films grown from SiH₄ + O₂ contain a higher number of boundary SiOSi bridges relative to those located in the bulk of the film. After annealing for 30 min at temperatures in the range from 550 to 950 °C, films were found to have a lower thickness. The calculated ratio of the two distributions after annealing have shown a clear reduction in the concentration of the boundary bridges as the temperature of annealing increases, in advance of the bridges located in the bulk of the film. For the film annealed at 950 °C for 30 min the ratio was found equal to 4.0:1 which is the same to that of thermally grown films at the same temperature.     

TiO_2/SiO_2、ZrO_2/SiO_2多层介质膜光学损耗及激光损伤研究

以TiO_2/SiO_2及ZrO_2/SiO_2多层介质膜为例,测试了不同工艺条件及不同膜系结构下薄膜样品的光学损耗及激光损伤阈值,同时对实验结果作了初步的分析讨论.     

Defect-free silicon film on SiO2 formed by zone meltingrecrystallization with high scanning speed

The recrystallization of polysilicon films on silicon dioxide at high scanning speed, in the range of 5≈15 mm/s, with an RF-induced graphite strip heater system is discussed. The films are in (100) orientation and contain subgrain boundaries (SGBs). Heat-sink and valley structures have been used to localize these SGBs. Defect-free silicon films have been obtained with good uniformity and reproducibility. The differences between the results obtained with fast scanning and the conventional slow scanning is analyzed. n-channel and p-channel MOSFETs have been fabricated in the recrystallized silicon film to characterize electrical properties such as mobilities and leakage currents, and they show very good characteristics     

Hot-carrier injections in SiO2

We review the hot-carrier injection phenomena in gate-oxide and the related degradation in silicon MOSFETs. We discuss the basic degradation mechanisms and the nature of the created defects by carrier injections through the gate-oxide. Emphasis is put on the discussion of dynamic hot-carrier injections in MOSFETs and on the stress induced leakage currents in very thin (< 5 nm) gate-oxide.     

Effects of nitrogen annealing on electron scatterings in SiSiO2 interface

The effective mobility of electrons at Si (100) surfaces was measured as a function of electron density N_s = 5 × 10¹¹?1 × 10¹³ cm^?2 at 4.2K for samples with and without annealing (10 min–2 hr) in nitrogen gas at 1000°C after wet thermal oxidation. A great part of the scattering by Coulomb and short-range potentials was reduced by a short (～10 min) anneal time, although the subsequent annealing resulted in a slight increase in the number of the scatterers. On the other hand, scattering by a surface roughness potential was reduced with increase in the anneal time. These scattering effects associated with N₂ annealing are discussed.     

非晶态SiO2过渡层对生长C轴取向LiNbO3薄膜的影响

采用磁控溅射方法,在Si衬底和LiNbO3薄膜之间引入SiO2过渡层制备LiNbO3薄膜。采用X射线衍射（XRD〉、傅里叶变换红外吸收光谱（FT-IR）和扫描电子显微镜（SEM）对LiNbO3薄膜的结晶取向、组成成分和表面形貌进行了表征,重点研究了非晶态SiO2过渡层对LiNbO3薄膜C轴取向的影响。结果表明,非晶态S...     

热处理对双离子束溅射SiO2薄膜力学及热力学特性的影响

光学薄膜的力学及热力学特性决定了光学系统性能的优劣。采用双离子束溅射的方法在硅110和肖特石英Q1基底上制备了SiO2薄膜,并对制备的膜层进行退火处理。系统研究了热处理前后SiO2薄膜的力学及热力学特性。研究结果表明,750℃退火条件下SiO2薄膜的弹性模量（Er）增加到72 GPa,膜层硬度增加到10 GPa。镀完后未经退火处理的SiO2薄膜表现为压应力,但是应力值在退火温度达到450℃以上时急剧降低,说明热处理有助于改善SiO2薄膜内应力。经退火处理的SiO2薄膜泊松比（vf）为0.18左右。退火前后SiO2薄膜的杨氏模量（Ef）都要比石英块体材料大,并且750℃退火膜层杨氏模量增加了50 GPa以上。550℃退火的SiO2薄膜热膨胀系数（f）从6.7810-7℃-1降到最小值5.2210-7℃-1。