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所谓圆片级封装,是指封装和测试是在未分离的圆片上进行的,并且能在世界范围内被投入生产,主要是建立在薄膜凸点和再分布技术的基础上。采用这些技术的低引线数的硅器件和无源射频集成元件在今天的手持式电信产品中正在兴起。要使这项极具希望的技术获得很好的应用,圆片级老化和测试是必需的。 相似文献
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提出了一种MEMS器件的圆片级封装技术。通过金硅键合和DRIE通孔制备等关键工艺技术,可以实现真空度从102 Pa到2个大气压可调的圆片级封装。作为工艺验证,成功实现了圆片级真空封装MEMS陀螺仪的样品制备。对封装后的陀螺仪样品进行了剪切力和品质因数Q值测试,剪切力测试结果证明封装样品键合强度达到5 kg以上,圆片级真空封装后陀螺的品质因数Q值约为75 000,对该陀螺的品质因数进行了历时1年的跟踪测试,在此期间品质因数Q的最大变化量小于7‰,品质因数测试结果表明封装具有较好的真空特性。 相似文献
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一种新型的封装发展趋势——圆片级封装 总被引:2,自引:0,他引:2
在军用电子元器件和民用消费类电路中,电子封装均起着举足轻重的地位。当今社会,电子技术日新月异,集成电路正向着超大规模、超高速、高密度、大功率、高精度、多功能的方向迅速发展,对集成电路的封装技术提出了愈来愈高的要求,使得新的封装形式不断涌现,新的封装技术层出不穷。文中介绍了一种新型的封装发展趋势——圆片级封装技术,主要详述了圆片级封装的概念、技术驱动力,列举了主要厂家圆片级封装技术的应用情况。 相似文献
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一种基于BCB键合技术的新型MEMS圆片级封装工艺 总被引:2,自引:1,他引:1
苯并环丁烯(BCB)键合技术通过光刻工艺可以直接实现图形化,相对于其他工艺途径具有工艺简单、容易实现图形化的优点。选用4000系列BCB材料进行MEMS传感器的粘接键合工艺试验,解决了圆片级封装问题,采用该技术成功加工出具有三层结构的圆片级封装某种惯性压阻类传感器。依据标准GJB548A对其进行了剪切强度和检漏测试,测得封装样品漏率小于5×10-3Pa.cm3/s,键合强度大于49N,满足考核要求。 相似文献
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圆片级封装的无铅焊料凸点制作技术研究 总被引:1,自引:0,他引:1
对圆片级封装(WLP)的结构设计和关键工艺技术进行了研究;描述了凸点下金属(UBM)层的选择,凸点回流技术,以及凸点的质量控制技术;重点阐述了采用电镀制作无铅焊料凸点的方法. 相似文献
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制作圆片级封装凸焊点的垂直喷镀机研制 总被引:1,自引:0,他引:1
介绍了为满足微电子新颖封装——圆片级封装(WLP)在硅圆片上制作凸焊点的需要,根据有限元分析模拟优化,设计研制了FEP-1垂直喷镀机。该机可用于φ100-φ150mm(φ4-φ6英寸)圆片上电镀Au、PbSn、In等凸焊点。在150mm液晶显示驱动电路硅圆片上,用该电镀机电镀制作出了合格的高度为17μm、间距为20μm的金凸点。 相似文献
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ShellCase公司的圆片级封装技术工艺,采用商用半导体圆片加工设备,把芯片进行封装并包封到分离的腔体中后仍为圆片形式。圆片级芯片尺寸封装(WL-CSP)工艺是在固态芯片尺寸玻璃外壳中装入芯片。玻璃包封防止了硅片的外露,并确保了良好的机械性能及环境保护功能。凸点下面专用的聚合物顺从层提供了板级可靠性。把凸点置于单个接触焊盘上,并进行回流焊,圆片分离形成封装器件成品。WL-CSP封装完全符合JEDEC和SMT标准。这样的芯片规模封装(CSP),其测量厚度为300μm-700μm,这是各种尺寸敏感型电子产品使用的关键因素。 相似文献
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Yangyang Sun Hongjin Jiang Lingbo Zhu Wong C.P. 《Components and Packaging Technologies, IEEE Transactions on》2008,31(1):135-142
A novel nanocomposite photo-curable material which can act both as a photoresist and a stress redistribution layer applied on the wafer level was synthesized and studied. In the experiments, 20-nm silica fillers were modified by a silane coupling agent through a hydrolysis and condensation reaction and then incorporated into the epoxy matrix. A photo-sensitive initiator was added into the formulation which can release cations after ultraviolet exposure and initiate the epoxy crosslinking reaction. The photo-crosslinking reaction of the epoxy made it a negative tone photoresist. The curing reaction of the nanocomposites was monitored by a differential scanning calorimeter with the photo-calorimetric accessory. The thermal mechanical properties of photo-cured nanocomposites thin film were also measured. It was found that the moduli change of the nanocomposites as the filler loading increasing did not follow the Mori-Tanaka model, which indicated that the nanocomposite was not a simple two-phase structure as the composite with micron size filler. The addition of nano-sized silica fillers reduced the thermal expansion and improved the stiffness of the epoxy, with only a minimal effect on the optical transparency of the epoxy, which facilitated the complete photo reaction in the epoxy. 相似文献
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圆片级封装是一种先进的电子封装技术,近年来,圆片级封装技术的发展速度很快,主要应用于系统级芯片、光电器件和MEMS等.凸点制作是圆片级封装工艺的关键工序,目前凸点制作工艺方法有多种,重点介绍常用的电镀法、植球法和蒸发沉积法凸点工艺,分别介绍这三种凸点制作技术的工艺流程、关键技术. 相似文献
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Wafer Level Packages are one of the most advanced packaging concepts. It combines the advantages of flip chip with conventional surface mount technologies. In recent years, we have seen a tremendous growth in the application of Wafer Level Packages, both in quantities as well as in the number of products where they are implemented. The technology is, however, not without it is challenges with 1st and 2nd level reliability issues. For instance, the limit on the size of Wafer Level Packages has to do with the 2nd level, or solder bump, reliability. This paper highlights our major research and development results on understanding and enhancing the 1st and 2nd level reliability of Wafer Level Packages using combined experimental and virtual prototyping (thermal, mechanical and thermo-mechanical) techniques. Typical 1st level reliability problems within Wafer Level Packages are cracking of repassivation materials, fatigue of bond over active pads, and cracks within the Under Bump Metalisation. Typical 2nd level problems concern solder fatigue and brittle fractures within the intermetallics. To investigate the physics of failure for these problems, dedicated parametric finite element models are constructed including the thin IC layers. Two structures are explored to their potential reliability benefits, being the traditionally used repassivation structure and a newly developed Bump on Active structure. This so-called BUMA structure makes use of a thick Al buffer layer. By combining the experimental results with reliability prediction models, both structures in terms of 1st and 2nd level reliability performance are explored. Based on the results we have designed and manufactured an improved construction that significantly outperforms current solutions. 相似文献
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圆片级封装(WLP)具有尺寸小、散热性能好、封测成本低等优点,广泛应用于便携式电子产品,其在跌落、碰撞等环境下的可靠性越来越受到重视。将WLP器件组装到PCB基板上,按照JEDEC电子产品板级跌落实验标准进行实验,研究了WLP元件引脚节距、焊球尺寸、PCB焊盘工艺等因素对样品可靠性的影响。对失效样品进行了切片制样,通过金相显微镜、能量色散X射线光谱(EDX)和扫描电子显微镜进行了分析,研究了WLP器件失效机理及其与器件焊球尺寸、节距之间的关系,讨论了底部填充料对WLP封装可靠性的改进作用。 相似文献