Role of confinement on carrier transport in Ge-Si(x)Ge(1-x) core-shell nanowires

We examine the impact of shell content and the associated hole confinement on carrier transport in Ge-Si(x)Ge(1-x) core-shell nanowires (NWs). Using NWs with different Si(x)Ge(1-x) shell compositions (x = 0.5 and 0.7), we fabricate NW field-effect transistors (FETs) with highly doped source/drain and examine their characteristics dependence on shell content. The results demonstrate a 2-fold higher mobility at room temperature, and a 3-fold higher mobility at 77K in the NW FETs with higher (x = 0.7) Si shell content by comparison to those with lower (x = 0.5) Si shell content. Moreover, the carrier mobility shows a stronger temperature dependence in Ge-Si(x)Ge(1-x) core-shell NWs with high Si content, indicating a reduced charge impurity scattering. The results establish that carrier confinement plays a key role in realizing high mobility core-shell NW FETs.     

Influence of radial stress on the performance of gate-all-around Ge(110) NW FETs with HfO2 dielectric

In this work, a simulation method from strained valence band structures to strained mobility calculation to consider a radial stress at the boundary of HfO2 gate dielectric surrounding Ge(110) nanowire is developed. The simulation implements the radial stress to strain distribution calculation via finite element method and then to valence band calculation. The radial stress at the boundary of gate dielectric pushes the valence subbands downwards in contrast with lattice mismatch strain effects between Ge NW and gate dielectric. The impact of the radial stress on the hole effective masses and density of states of HfO2 gate dielectric surrounding Ge(110) nanowire are also investigated. The potential distribution and holes density distribution are calculated by solving the 2D Poisson equation and Schr?dinger equation self-consistently in NW cross section. Hole mobility is obtained by modified Kubo-Greenwood formula. Based on strained valence band structures, the hole density distribution in cross-sectional Ge(110) NW reduces with larger radial stress value. The phonon scattering-limited hole mobility in NW significantly increases as the radial stress increases.     

Diameter-dependent composition of vapor-liquid-solid grown Si(1-x)Ge(x) nanowires

Diameter-dependent compositions of Si(1-x)Ge(x) nanowires grown by a vapor-liquid-solid mechanism using SiH(4) and GeH(4) precursors are studied by transmission electron microscopy and X-ray energy dispersive spectroscopy. For the growth conditions studied, the Ge concentration in Si(1-x)Ge(x) nanowires shows a strong dependence on nanowire diameter, with the Ge concentration decreasing with decreasing nanowire diameter below approximately 50 nm. The size-dependent nature of Ge concentration in Si(1-x)Ge(x) NWs is strongly suggestive of Gibbs-Thomson effects and highlights another important phenomenon in nanowire growth.     

In(x)Ga(₁-x)As nanowires on silicon: one-dimensional heterogeneous epitaxy, bandgap engineering, and photovoltaics

We report on the one-dimensional (1D) heteroepitaxial growth of In(x)Ga(1-x)As (x = 0.2-1) nanowires (NWs) on silicon (Si) substrates over almost the entire composition range using metalorganic chemical vapor deposition (MOCVD) without catalysts or masks. The epitaxial growth takes place spontaneously producing uniform, nontapered, high aspect ratio NW arrays with a density exceeding 1 × 10(8)/cm(2). NW diameter (～30-250 nm) is inversely proportional to the lattice mismatch between In(x)Ga(1-x)As and Si (～4-11%), and can be further tuned by MOCVD growth condition. Remarkably, no dislocations have been found in all composition In(x)Ga(1-x)As NWs, even though massive stacking faults and twin planes are present. Indium rich NWs show more zinc-blende and Ga-rich NWs exhibit dominantly wurtzite polytype, as confirmed by scanning transmission electron microscopy (STEM) and photoluminescence spectra. Solar cells fabricated using an n-type In(0.3)Ga(0.7)As NW array on a p-type Si(111) substrate with a ～ 2.2% area coverage, operates at an open circuit voltage, V(oc), and a short circuit current density, J(sc), of 0.37 V and 12.9 mA/cm(2), respectively. This work represents the first systematic report on direct 1D heteroepitaxy of ternary In(x)Ga(1-x)As NWs on silicon substrate in a wide composition/bandgap range that can be used for wafer-scale monolithic heterogeneous integration for high performance photovoltaics.     

Electrical characterization of composition modulated In(1-x)Sb(x) nanowire field effect transistors by scanning gate microscopy

In this work high quality crystalline In(1_x)Sb(x) nanowires (NWs) are synthesized via a template-based electrochemistry method. Energy dispersive spectroscopy studies show that composition modulated In(1-x)Sb(x) (x approximately 0.5 or 0.7) nanowires can be attained by selectively controlling the deposition potential during growth. Single In(1-x)Sb(x) nanowire field effect transistors (NW-FETs) are fabricated to study the electrical properties of as-grown NWs. Using scanning gate microscopy (SGM) as a local gate the I(ds)-V(ds) characteristics of the fabricated devices are modulated as a function of the applied gate voltage. Electrical transport measurements show n-type semiconducting behavior for the In0.5Sb0.5 NW-FET, while a p-type behavior is observed for the In0.3Sb0.7 NW-FET device. The ability to grow composition modulated In(1-x)Sb(x) NWs can provide new opportunities for utilizing InSb NWs as building blocks for low-power and high speed nanoscale electronics.     

Metastable Ge1-xCx alloy nanowires

Carbon-containing alloy materials such as Ge(1-x)C(x) are attractive candidates for replacing silicon (Si) in the semiconductor industry. The addition of carbon to diamond lattice not only allows control over the lattice dimensions, but also enhances the electrical properties by enabling variations in strain and compositions. However, extremely low carbon solubility in bulk germanium (Ge) and thermodynamically unfavorable Ge-C bond have hampered the production of crystalline Ge(1-x)C(x) alloy materials in an equilibrium growth system. Here we successfully synthesized high-quality Ge(1-x)C(x) alloy nanowires (NWs) by a nonequilibrium vapor-liquid-solid (VLS) method. The carbon incorporation was controlled by NW growth conditions and the position of carbon atoms in the Ge matrix (at substitutional or interstitial sites) was determined by the carbon concentration. Furthermore, the shrinking of lattice spacing caused by substitutional carbon offered the promising possibility of band gap engineering for photovoltaic and optoelectronic applications.     

Composition controlled synthesis and Raman analysis of Ge-rich Si(x)Ge(1-x) nanowires

Here, we report the synthesis of Si(x)Ge(1-x) nanowires with x values ranging from 0 to 0.5 using bulk nucleation and growth from larger Ga droplets. Room temperature Raman spectroscopy is shown to determine the composition of the as-synthesized Si(x)Ge(1-x) nanowires. Analysis of peak intensities observed for Ge (near 300 cm(-1)) and the Si-Ge alloy (near 400 cm(-1)) allowed accurate estimation of composition compared to that based on the absolute peak positions. The results showed that the fraction of Ge in the resulting Si(x)Ge(1-x) alloy nanowires is controlled by the vapor phase composition of Ge.     

Layer-by-layer assembly of nanowires for three-dimensional, multifunctional electronics

We report a general approach for three-dimensional (3D) multifunctional electronics based on the layer-by-layer assembly of nanowire (NW) building blocks. Using germanium/silicon (Ge/Si) core/shell NWs as a representative example, ten vertically stacked layers of multi-NW field-effect transistors (FETs) were fabricated. Transport measurements demonstrate that the Ge/Si NW FETs have reproducible high-performance device characteristics within a given device layer, that the FET characteristics are not affected by sequential stacking, and importantly, that uniform performance is achieved in sequential layers 1 through 10 of the 3D structure. Five-layer single-NW FET structures were also prepared by printing Ge/Si NWs from lower density growth substrates, and transport measurements showed similar high-performance characteristics for the FETs in layers 1 and 5. In addition, 3D multifunctional circuitry was demonstrated on plastic substrates with sequential layers of inverter logical gates and floating gate memory elements. Notably, electrical characterization studies show stable writing and erasing of the NW floating gate memory elements and demonstrate signal inversion with larger than unity gain for frequencies up to at least 50 MHz. The ability to assemble reproducibly sequential layers of distinct types of NW-based devices coupled with the breadth of NW building blocks should enable the assembly of increasing complex multilayer and multifunctional 3D electronics in the future.     

Tuning the Electrical Properties of Si Nanowire Field‐Effect Transistors by Molecular Engineering

Exposed facets of n‐type silicon nanowires (Si NWs) fabricated by a top‐down approach are successfully terminated with different organic functionalities, including 1,3‐dioxan‐2‐ethyl, butyl, allyl, and propyl‐alcohol, using a two‐step chlorination/alkylation method. X‐ray photoemission spectroscopy and spectroscopic ellipsometry establish the bonding and the coverage of these molecular layers. Field‐effect transistors fabricated from these Si NWs displayed characteristics that depended critically on the type of molecular termination. Without molecules the source–drain conduction is unable to be turned off by negative gate voltages as large as ?20 V. Upon adsorption of organic molecules there is an observed increase in the “on” current at large positive gate voltages and also a reduction, by several orders of magnitude, of the “off” current at large negative gate voltages. The zero‐gate voltage transconductance of molecule‐terminated Si NW correlates with the type of organic molecule. Adsorption of butyl and 1,3‐dioxan‐2‐ethyl molecules improves the channel conductance over that of the original SiO₂? Si NW, while adsorption of molecules with propyl‐alcohol leads to a reduction. It is shown that a simple assumption based on the possible creation of surface states alongside the attachment of molecules may lead to a qualitative explanation of these electrical characteristics. The possibility and potential implications of modifying semiconductor devices by tuning the distribution of surface states via the functionality of attached molecules are discussed.     

Synthesis and raman scattering from Zn(1-x)Mn(x)S diluted magnetic semiconductor nanowires

The growth of Diluted Magnetic Semiconducting (DMS) Zn(1-x)Mn(x)S (0 < or = x < 0.6) nanowires (NWs) using a three-zone furnace and two solid sources is reported. The approach is generally applicable to many binary and ternary NW systems that grow by the Vapor-Liquid-Solid growth mechanism. Mn concentration was controlled by the temperature of the Mn source. The Zn/Mn ratio was found to determine the crystalline structure, i.e., wurtzite or zinc blende. High-resolution transmission electron microscopy measurements revealed highly crystalline single phase NWs. The vibrational properties of the DMS NWs with different Zn/Mn ratios were studied by correlating their Raman scattering spectra with the composition measured by Energy Dispersive X-Ray Spectroscopy (EDS). We find that the transverse optical (TO) phonon band disappears at the lowest Mn concentrations, while the longitudinal optical (LO) phonon band position was found insensitive to x. Three additional Raman bands were observed between the ZnS q = 0 TO and LO phonons when Mn atoms were present in the NWs. These bands are similar to those reported previously for bulk Zn(1-x)Mn(x)S and their origin is still controversial.     

Growth of SiO(x) nanowires by laser ablation

Amorphous SiO(x) nanowires (NWs) were synthesized using laser ablation of silicon-containing targets. The influence of various parameters such as target composition, substrate type, substrate temperature and carrier gas on the growth process was studied. The NWs were characterized using high resolution scanning and transmission electron microscopes (HRSEM and HRTEM) with their attachments: electron dispersive spectroscopy (EDS) and energy electron loss spectroscopy (EELS). A metal catalyst was found essential for the NW growth. A growth temperature higher than 1000?°C was necessary for the NW formation using an Ar-based carrier gas at 500?Torr. The use of Ar-5%H(2) instead of pure Ar resulted in a higher yield and longer NWs. Application of a diffusion barrier on top of the Si substrate guaranteed the availability of metal catalyst droplets on the surface, essential for the NW growth. Ni was found to be a better catalyst than Au in terms of the NW yield and length. Two alternative sequences for the evolution of the amorphous SiO(x) NWs were considered: (a)?the formation of Si NWs first and their complete oxidation afterwards, which seems to be doubtful, (b)?the direct formation of SiO(x) NWs, which is more likely to occur. The direct formation mechanism was proposed to advance in three stages: preferential adsorption of SiO(x) clusters on the catalyst surface first, a successive surface diffusion to the catalyst droplet lower hemisphere, and finally the formation and growth of the NW between the catalyst and the substrate.     

On the formation and photoluminescence of Si(1-x)Ge(x) nanoparticles

Si(1-x)Ge(x) nanoparticles were prepared from two annealed alloy ingots at the compositions of Si:Ge = 9.5:0.5 and 9:1 using a vapor condensation technique under Ar atmosphere. These nanoparticles are all spherical, and increasing the working pressure leads to an increased particle size and size dispersion. Comparing to the alloy ingots, the nanoparticles have a higher average content of Ge. In addition, increasing the working pressure also causes the Si(1-x)Ge(x) nanoparticles to become more Ge-rich. This can be ascribed to the lower melting point and higher kinetic energy of Ge than Si during the evaporation process. The photoluminescence of Si(1-x)Ge(x) nanoparticles ranges from visible light to infrared region, and the luminescence peak exhibits a red shift as the Ge content in the nanoparticles increases. This indicates that the incorporation of Ge into Si has a dominant effect in the radiative recombination process, in comparison with the constant luminescence peak position in the case of pure Si nanoparticles with similar size distribution.     

Silicon-nanowire transistors with intruded nickel-silicide contacts

Schottky barrier field effect transistors based on individual catalytically-grown and undoped Si-nanowires (NW) have been fabricated and characterized with respect to their gate lengths. The gate length was shortened by the axial, self-aligned formation of nickel-silicide source and drain segments along the NW. The transistors with 10-30 nm NW diameters displayed p-type behaviour, sustained current densities of up to 0.5 MA/cm2, and exhibited on/off current ratios of up to 10(7). The on-currents were limited and kept constant by the Schottky contacts for gate lengths below 1 microm, and decreased exponentially for gate lengths exceeding 1 microm.     

High-performance single CdS nanowire (nanobelt) Schottky junction solar cells with Au/graphene Schottky electrodes

High-performance single CdS nanowire (NW) as well as nanobelt (NB) Schottky junction solar cells were fabricated. Au (5 nm)/graphene combined layers were used as the Schottky contact electrodes to the NWs (NBs). Typical as-fabricated NW solar cell shows excellent photovoltaic behavior with an open circuit voltage of ～0.15 V, a short circuit current of ～275.0 pA, and an energy conversion efficiency of up to ～1.65%. The physical mechanism of the combined Schottky electrode was discussed. We attribute the prominent capability of the devices to the high-performance Schottky combined electrode, which has the merits of low series resistance, high transparency, and good Schottky contact to the CdS NW (NB). Besides, a promising site-controllable patterned graphene transfer method, which has the advantages of economizing graphene material and free from additional etching process, was demonstrated in this work. Our results suggest that semiconductor NWs (NBs) are promising materials for novel solar cells, which have potential application in integrated nano-optoelectronic systems.     

Ge oxidation in the remaining cores of Si(1-x)Ge(x) nanowires after prolonged oxidation

For this investigation of the Ge behavior of condensed Si(1-y)Ge(y) (y > x) cores during the oxidation of Si(1-x)Ge(x) nanowires, Si(1-x)Ge(x) nanowires were grown in a tube furnace by the vapor-liquid-solid method and thermally oxidized. The test results were characterized using several techniques of transmission electron microscopy. The two types of Ge condensation are related to the diameter and Ge content of the nanowires. The consumption of Si atoms in prolonged oxidation caused the condensed SiGe cores to become Ge-only cores; and the continuous oxidation resulted in the oxidation of the Ge cores. The oxidation of Ge atoms was confirmed by scanning transmission electron microscopy.     

Composition and local strain mapping in Au-catalyzed axial Si/Ge nanowires

For most applications, heterostructures in nanowires (NWs) with lattice mismatched materials are required and promise certain advantages thanks to lateral strain relaxation. The formation of Si/Ge axial heterojunctions is a challenging task to obtain straight, defect free and extended NWs. And the control of the interface will determine the future device properties. This paper reports the growth and analysis of NWs consisting of an axial Si/Ge heterostructure grown by a vapor-liquid-solid process. The composition gradient and the strain distribution at the heterointerface were measured by advanced quantitative electron microscopy methods with a resolution at the nanometer scale. The transition from pure Ge to pure Si shows an exponential slope with a transition width of 21?nm for a NW diameter of 31?nm. Although diffuse, the heterointerface makes possible strain engineering along the axis of the NW. The interface is dislocation-free and a tensile out-of-plane strain is noticeable in the Ge section of the NW, indicating a lattice accommodation. Experimental results were compared to finite element calculations.     

Lateral, Ge, nanowire growth on SiO2

Vapor-liquid-solid (VLS) nanowires (NWs) typically grow in [111] directions. Previously, the authors have demonstrated guided Si NW growth, engineering the VLS NWs to grow in a [110] direction against a SiO(2) surface. In this work, the authors demonstrate guided high-quality Ge nanowire growth against a SiO(2) surface in the substrate plane to bridge between two Si mesas. The authors explore the interfaces between a Ge NW and the two Si device-layer mesas and report high-quality, epitaxial interfaces between the Ge NW and both Si mesas.     

Growth of Ge-Si nanowire heterostructures via chemical vapor deposition

The growth of Ge-Si and Ge-Si nanowire (NW) heterostructures was demonstrated via chemical vapor deposition. Due to the influence of interface energy, differing topographies of the heterostructures were observed. On initially grown Ge NWs, numerous Si NW branches were grown near the tip due to Au migration. However, on initially grown Si NWs, high-density Ge nanodots were observed.     

Directed synthesis of germanium oxide nanowires by vapor-liquid-solid oxidation

We report on the directed synthesis of germanium oxide (GeO(x)) nanowires (NWs) by locally catalyzed thermal oxidation of aligned arrays of gold catalyst-tipped germanium NWs. During oxygen anneals conducted above the Au-Ge binary eutectic temperature (T?>?361?°C), one-dimensional oxidation of as-grown Ge NWs occurs by diffusion of Ge through the Au-Ge catalyst droplet, in the presence of an oxygen containing ambient. Elongated GeO(x) wires grow from the liquid catalyst tip, consuming the adjoining Ge NWs as they grow. The oxide NWs' diameter is dictated by the catalyst diameter and their alignment generally parallels that of the growth direction of the initial Ge NWs. Growth rate comparisons reveal a substantial oxidation rate enhancement in the presence of the Au catalyst. Statistical analysis of GeO(x) nanowire growth by ex?situ transmission electron microscopy and scanning electron microscopy suggests a transition from an initial, diameter-dependent kinetic regime, to diameter-independent wire growth. This behavior suggests the existence of an incubation time for GeO(x) NW nucleation at the start of vapor-liquid-solid oxidation.     

Sub-100 nanometer channel length Ge/Si nanowire transistors with potential for 2 THz switching speed

Ge/Si core/shell nanowires (NWs) are attractive and flexible building blocks for nanoelectronics ranging from field-effect transistors (FETs) to low-temperature quantum devices. Here we report the first studies of the size-dependent performance limits of Ge/Si NWFETs in the sub-100 nm channel length regime. Metallic nanoscale electrical contacts were made and used to define sub-100 nm Ge/Si channels by controlled solid-state conversion of Ge/Si NWs to NiSixGe y alloys. Electrical transport measurements and modeling studies demonstrate that the nanoscale metallic contacts overcome deleterious short-channel effects present in lithographically defined sub-100 nm channels. Data acquired on 70 and 40 nm channel length Ge/Si NWFETs with a drain-source bias of 0.5 V yield transconductance values of 78 and 91 microS, respectively, and maximum on-currents of 121 and 152 microA. The scaled transconductance and on-current values for a gate and bias voltage window of 0.5 V were 6.2 mS/microm and 2.1 mA/microm, respectively, for the 40 nm device and exceed the best reported values for planar Si and NW p-type FETs. In addition, analysis of the intrinsic switching delay shows that terahertz intrinsic operation speed is possible when channel length is reduced to 70 nm and that an intrinsic delay of 0.5 ps is achievable in our 40 nm device. Comparison of the experimental data with simulations based on a semiclassical, ballistic transport model suggests that these sub-100 nm Ge/Si NWFETs with integrated high-kappa gate dielectric operate near the ballistic limit.