带有电流监控的1.25Gbit/s CMOS跨阻放大器

文章提出一种速率为1.25 Gbit/s、具有可控电流监控的光纤通信用跨阻放大器(TIA)电路,该放大器可以通过拉电流和灌电流两种方式来检测电流监控的电流流向.设计使用的是0.18 μm的标准互补型金属氧化物半导体(CMOS)工艺.仿真结果表明,光电流在1 μA～1 mA范围内时,各种工艺条件下检测到的光电流误差均小于...     

2.5Gb/s CMOS低噪声有源电感反馈跨阻放大器

分析各种结构前置放大器性能的基础上,给出了一个应用于2.5 Gbit/s光纤通信系统的,基于CMOS工艺的共栅结构跨阻放大器。为了减小输入等效噪声电流和提高带宽,采用了有源反馈和有源电感代替传统结构中的电阻反馈。测试结果表明,该电路具有61.8 dB的跨阻增益,2.01 GHz的带宽,输入等效噪声电流为9.5 pA/Hz～(1/2),核心电路功耗仅为3.02 mW。     

高速BiCMOS运算跨导放大器的设计

基于全差分结构提出一种高速BiCMOS运算跨导放大器.该放大器采用两级放大结构实现,可用于8位250 Msps流水线结构模数转换器的采样/保持电路中.电路使用0.35μmBiCMOS工艺实现,由3.3 V单电源供电,经优化设计后,实现了2.1 GHz的单位增益带宽,直流开环增益61 dB,相位裕度50°,功耗16 mw,输出摆幅达到2 V;在2 pF的负载电容下,建立时间小于0.6 ns,转换速率1 200 V/μs.该放大器完全符合设计要求的性能指标.     

一种低噪声大动态范围跨阻放大器的设计

基于CMOS反相器结构跨阻放大器,提出了一种低噪声大动态范围跨阻放大器电路结构。对电路进行跨阻分析和噪声分析,从而指导电路设计。采用XFAB 0.6μm CMOS工艺提供的PDK,在Cadence SpectreS环境下进行电路设计、版图设计、仿真验证等。测试结果表明,该电路静态功耗为112 mW,最大跨阻增益为91.2 kΩ,带宽为146.7 MHz（-端）及168.4 MHz（＋端）,波形失真小。该电路已经运用到光接收机中,性能良好。     

光通信系统中前置跨阻放大器的研究和设计

本文介绍了前置跨阻放大器在光通信中光接收机上的应用及其发展方向，提出了一种新型的前置跨阻放大器电路结构，即在普通跨阻结构上适当地加了有源反馈的电路结构，并对它们进行了理论分析，最后用BSIM3v3模型，0．35μm工艺，Cadence仿真器工具对它们进行仿真，结果很好，带宽从lGHz增加到2．15GHz。     

应用于车载激光雷达的宽带AGC跨阻放大器

针对车载激光雷达接收端脉冲信号脉宽窄、动态范围大等特点,提出了一种新型宽带、宽动态范围和高增益的自动增益控制(AGC)跨阻放大器。采用改进型调节型共源共栅结构作为输入级,拓展了带宽。使用改进型吉尔伯特单元作为可变增益放大器,进一步提高了带宽和增益。增加了AGC环路,提高了输入动态范围。基于标准 0.18 μm CMOS工艺进行设计与仿真,整体版图尺寸为760 μm×650 μm。仿真结果表明,该电路的-3 dB带宽为1.06 GHz,跨阻增益为80.79 dBΩ,输入动态范围为60 dB(1 μA~1 mA),功耗为47.6 mW,满足车载激光雷达接收机的要求。     

高速跨阻放大器设计综述

介绍了高速光纤系统中超宽带跨阻型前置放大器所采用的工艺以及最新研究进展.利用仿真技术对高速跨阻放大器设计中常采用的各种高性能技术包括峰化技术和匹配网络技术进行了详细的对比分析.最后总结了目前流行的基于CMOS工艺设计的高速跨阻放大器电路结构并展望了高速跨阻放大器的发展趋势.     

用于PDIC的跨阻放大器的优化设计

提出了一种用于PDIC的跨阻放大器.电路由三级相同的推挽放大器级联而成,每级均采用一动态电阻对负载进行补偿,以提高放大器的相位裕度.反馈电阻由一栅极受控的PMOS管替代,避免了大尺寸多晶硅电阻引入的附加相移,增加了电路的稳定性.采用XFAB 0.6μm CMOS工艺提供的PDK,在Cadence Spectre环境下进行电路设计、仿真验证.仿真结果表明,电路的增益、带宽及稳定性均得到满意结果.

Abstract：

Presented is a transimpedance amplifier for PDIC.The designed amplifier is configured on three identical push-pull amplifier stages that use an active load compensated by an active resistor to improve the phase margin of the amplifier.The feedback resistor is replaced by a PMOS transistor which is biased by the gate voltage.The replacement not only avoids the phase-shift introduced by the large ploy-resistor but improves the stability performance of the transimpedance amplifier.Based on XFAB's 0.6 μm CMOS,circuit design and simulation were performed by using Cadence Spectre.The simulation results show that the gain,bandwidth and stability of the amplifier all achieve good performance.     

一种跨阻放大器的设计

文章提出了一种基于调节型共源共栅电路结构（RGC）的跨阻放大器,采用0.5μm的标准互补型金属氧化物半导体（CMOS）工艺进行设计,仿真。测试结果表明,该电路具有69.93dB的跨阻增益,830MHz的-3dB带宽。在输入电流为1μA时,其输出电压的动态摆幅达到4.5mV,在5V电源电压下功耗仅为63.16mW。     

跨阻放大器的带宽扩展技术

提出了一种针对CMOS跨阻放大器的带宽扩展技术.基于此技术,采用应用于0.18μm 1.8V CMOS工艺,设计了一个RGC结构的跨阻放大器.仿真结果表明,该放大器具有66dB的跨阻增益,4.49GHz的带宽,输入等效噪声电流平均值为11.5pA/(Hz)～(1/2),该电路的功耗仅为15.4mW.     

应用于千兆以太网的1-Gb/s 零极点对消CMOS跨阻放大器

A zero-pole cancellation transimpedance amplifier（TIA）has been realized in 0.35μm RF CMOS technology for Gigabit Ethernet applications.The TIA exploits a zero-pole cancellation configuration to isolate the input parasitic capacitance including photodiode capacitance from bandwidth deterioration.Simulation results show that the proposed TIA has a bandwidth of 1.9 GHz and a transimpedance gain of 65 dB·Ωfor 1.5 pF photodiode capaci- tance,with a gain-bandwidth product of 3.4 THz·Ω.Even with 2 pF photodiode capacitance,the bandwidth exhibits a decline of only 300 MHz,confirming the mechanism of the zero-pole cancellation configuration.The input resis- tance is 50Ω,and the average input noise current spectral density is 9.7 pA/√ Hz.Testing results shows that the eye diagram at 1 Gb/s is wide open.The chip dissipates 17 mW under a single 3.3 V supply.     

1-Gb/s zero-pole cancellation CMOS transimpedance amplifier for Gigabit Ethernet applications

A zero-pole cancellation transimpedance amplifier (TIA) has been realized in 0.35 μm RF CMOS tech nology for Gigabit Ethernet applications. The TIA exploits a zero-pole cancellation configuration to isolate the input parasitic capacitance including photodiode capacitance from bandwidth deterioration. Simulation results show that the proposed TIA has a bandwidth of 1.9 GHz and a transimpedance gain of 65 dB·Ω for 1.5 pF photodiode capaci tance, with a gain-bandwidth product of 3.4 THz·Ω. Even with 2 pF photodiode capacitance, the bandwidth exhibits a decline of only 300 MHz, confirming the mechanism of the zero-pole cancellation configuration. The input resis tance is 50 Ω, and the average input noise current spectral density is 9.7 pA/(Hz)~(1/2). Testing results shows that the eye diagram at 1 Gb/s is wide open. The chip dissipates 17 mW under a single 3.3 V supply.     

应用于10Gb/s光接收机的全差分CMOS跨阻前置电路设计

设计了一种的低成本、低功耗的10 Gb/s光接收机全差跨阻前置放大电路。该电路由跨阻放大器、限幅放大器和输出缓冲电路组成,其可将微弱的光电流信号转换为摆幅为400 mVpp的差分电压信号。该全差分前置放大电路采用0.18 m CMOS工艺进行设计,当光电二极管电容为250 fF时,该光接收机前置放大电路的跨阻增益为92 dB,-3 dB带宽为7.9 GHz,平均等效输入噪声电流谱密度约为23 pA/(0~8 GHz)。该电路采用电源电压为1.8 V时,跨阻放大器功耗为28 mW,限幅放大器功耗为80 mW,输出缓冲器功耗为40 mW,其芯片面积为800 m1 700 m。     

A RGC-based,low-power,CMOS transimpedance amplifier for 10Gb/s optical receivers

ABSTRACT

In this paper, a new low-power transimpedance amplifier (TIA) based on a modified Regulated Cascode (RGC) circuit structure followed by a closed-loop post-amplifier is proposed for 10 Gb/s applications. The main objective of this work is to reduce the power consumption while, the frequency bandwidth of the proposed amplifier is increased considerably. The booster of a conventional RGC is modified by a cascoded transistor and its effect on the performance of the circuit is studied mathematically, which are verified by simulations. The bandwidth extension is occurred due to increasing the gain of the booster amplifier in the RGC stage, which isolates further the input capacitance and results in a reduced input resistance value hence, a higher input pole frequency is obtained in comparison with other conventional RGC structures. On the other hand, by using an active inductive peaking technique, the frequency of the output pole is also increased which results in a further extension of the frequency bandwidth for the proposed circuit. The proposed TIA is simulated using 90 nm CMOS technology parameters, which shows a 50.5 dBΩ transimpedance gain, 7.3 GHz frequency bandwidth and 1.22 µA_rms input referred noise value for only 1 mW of power consumption at 1.2 V supply voltage.     

低功耗CMOS限幅放大器设计

利用0.18μm CMOS工艺设计了应用于光接收机中的10Gb/s限幅放大器.此限幅放大器由输入缓冲,4级放大单元,一级用于驱动50Ω传输线的输出缓冲和失调电压补偿回路构成.输入动态范围为38dB(10mV～800mV),负载上的输出限幅在400mV,在3.3V电源电压下,功耗仅为99mW.整个芯片面积为0.8×1.3mm2.     

一种光接收机中的高增益宽动态范围跨阻放大器

As the front-end preamplifiers in optical receivers, transimpedance amplifiers （TIAs） are commonly required to have a high gain and low input noise to amplify the weak and susceptible input signal. At the same time, the TIAs should possess a wide dynamic range （DR） to prevent the circuit from becoming saturated by high input currents. Based on the above, this paper presents a CMOS transimpedance amplifier with high gain and a wide DR for 2.5 Gbit/s communications. The TIA proposed consists of a three-stage cascade pull push inverter, an automatic gain control circuit, and a shunt transistor controlled by the resistive divider. The inductive-series peaking technique is used to further extend the bandwidth. The TIA proposed displays a maximum transimpedance gain of 88.3 dBΩ with the -3 dB bandwidth of 1.8 GHz, exhibits an input current dynamic range from 100 nA to 10 mA. The output voltage noise is less than 48.23 nV/√Hz within the -3 dB bandwidth. The circuit is fabricated using an SMIC 0.18 μm 1P6M RFCMOS process and dissipates a dc power of 9.4 mW with 1.8 V supply voltage.     

跨阻放大器低温性能及其对THz光电信号的放大应用

随着太赫兹技术、低温电子学和射电天文学的发展,对可低温环境下工作的集成封装式跨阻放大芯片的需求增加。本文针对一种Ge-Si基底型跨阻放大器,主要研究了其深低温环境下的电学性能,获得了8 K温度下放大器芯片的典型端口电流-电压特性曲线和增益曲线,得到了在0.1～3 GHz频带内较为平坦的增益效果;为了验证其对太赫兹光电信号的放大功能,将该跨阻放大器与太赫兹量子阱探测器集成封装,并搭建了太赫兹脉冲激光探测系统,在8 K温度下实现了对脉宽2μs太赫兹光电探测信号的有效放大,跨阻增益约560Ω,电流放大增益为1.78 mA/V。上述研究成果首次验证了商用跨阻放大器在深低温环境下应用的可行性,为太赫兹高速探测与高频通信领域的集成跨阻放大提供了一种有效技术手段。     

2.5Gb/s 0.35μm CMOS光接收机前置放大器设计

采用0.35 μm CMOS工艺设计并实现了用于SDH系统STM-16(2.5 Gb/s)速率级光接收机前置放大器.此放大器采用+5 V电源电压,中频增益为73 dBΩ,3 dB带宽为2.2 GHz.核面积为0.15 mm×0.20 mm.     

2.5Gb/Scmos光接收机跨阻前置放大器

给出了一种利用0.35μm CMOS工艺实现的2.5Gb/s跨阻前置放大器。此跨阻放大器的增益为59 dB*Ω,3dB带宽为2GHz,2GHz处的等效输入电流噪声为0.8×10-22 A2/Hz。在标准的5V电源电压下,功耗为250mW。PCML单端输出信号电压摆幅为200mVp-p。整个芯片面积为1.0mm×1.1mm。