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1.
    
High‐order log‐domain filters could be easily designed by using the functional block diagram (FBD) representation of the corresponding linear prototype and a set of complementary operators. For this purpose, lossy and lossless integrator blocks have been already introduced in the literature. Novel first‐order log‐domain highpass and allpass filter configurations, which are fully compatible with the already published integrator blocks, are introduced in this paper. These are realized using integration and subtraction blocks or a novel differentiation configuration. As a result, a complete set of first‐order building blocks would be available for synthesizing any arbitrary high‐order transfer function. In order to verify the correct operation of the proposed structures, the performance of the introduced highpass filters was evaluated through simulation results. In addition, a fifth‐order log‐domain bandpass filter was designed and simulated using one of the introduced first‐order highpass filter configurations. Copyright © 2006 John Wiley & Sons, Ltd.  相似文献   

2.
    
A new systematic method for designing Sinh‐Domain filters is introduced in this paper. This is achieved by employing an appropriate set of complementary operators, in order to transpose the conventional functional block diagram representation of each linear operation to the corresponding one into the Sinh‐Domain. The proposed method offers the benefits of facilitating the design procedure of high‐order Sinh‐Domain filters and of the absence of any restriction concerning the type and/or the order of the realized filter function. As an example, a third‐order Sinh‐Domain leapfrog filter is designed by employing the proposed set of operators. Two possible realizations are given and their performance has been evaluated and compared through simulation results. Copyright © 2011 John Wiley & Sons, Ltd.  相似文献   

3.
    
This paper introduces and applies practical area‐reduction techniques on the analogue, externally linear‐internally nonlinear, complementary metal‐oxide semiconductor (CMOS) implementation of a cochlear channel. This channel is constructed on the basis of the biomimetic auditory filter called One‐Zero Gammatone Filter, and it has been synthesised using ultra‐low power Class‐AB biquadratic filters, which employ MOS transistors that operate in their weak inversion regime. The realisation of linear capacitors with appropriately configured MOS transistors, the order reduction of the One‐Zero Gammatone Filter transfer function and the employment of hyperbolic sine companding filters can lead to area reductions that range from 61.8% up to 91.9% of the original size. Comparative simulation results highlight the trade‐offs between performance, linearity, noise and power consumption of the designs. Copyright © 2016 John Wiley & Sons, Ltd.  相似文献   

4.
    
Square‐root domain universal biquad topologies are introduced in this paper. One of them is single input multiple output, while the other one is multiple input single output biquad. Important benefits offered by the proposed topologies are the electronic adjustment of the resonant frequency and the capability for operating in a low‐voltage environment; also, the resonant frequency could be adjusted without disturbing the Q factor and vice‐versa. Simulation results using the Spectre simulator of the Analog Design Environment of Cadence software validate the correct operation of the proposed topologies and provide important performance characteristics. Copyright © 2011 John Wiley & Sons, Ltd.  相似文献   

5.
    
A method for designing high‐order log‐domain filters has already been proposed in the literature based on the concept of the classical linear transformation (LT) filters. For this purpose, a substitution table containing the log‐domain LT equivalent of each passive element has been introduced. Drawbacks of the log‐domain filter topologies derived according to this table are the following: (a) a dc offset current appears at the output of all pole filters and (b) dc instability is observed in the case of the substitution of LC resonators. In addition, an alternative technique already proposed for simulating filters with LC resonators is valid only under small‐signal conditions. In order to overcome the aforementioned problems, new log‐domain LT equivalents of a number of passive elements are introduced in this paper. The correct operation of the novel blocks has been verified through simulation results. Also, a comparison concerning the behaviour of the log‐domain LT filters and that of the filters derived according to the leapfrog and the wave methods has also been performed. Copyright © 2007 John Wiley & Sons, Ltd.  相似文献   

6.
    
A new systematic method for designing square‐root domain (SRD) linear transformation (LT) filter is introduced in this paper. For this purpose, a substitution table containing the SRD LT equivalent of each passive element has been introduced. The proposed equivalents have been realized by employing appropriate SRD building blocks with low‐voltage operation capability. As a design example, a 3rd‐order SRD LT filter has been realized and its performance has been evaluated through simulation results. In addition, the most important performance factors of the SRD filter have been compared with those achieved by the SRD filters derived according to the leapfrog, wave, and topological emulation methods. Copyright © 2010 John Wiley & Sons, Ltd.  相似文献   

7.
    
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8.
    
Full‐wave time‐domain electromagnetic methods are usually effective in rigorously modeling and evaluating ultra‐wideband (UWB) wireless channels. However, their computational expenditures are expensive, when they are used to deal with electrically large‐size problems consisting of fine structures. In order to reduce computational time, the unconditionally stable leapfrog alternating‐direction implicit finite‐difference time‐domain (leapfrog ADI‐FDTD) method has been proposed recently. In this paper, the leapfrog ADI‐FDTD algorithm is developed for simulating lossy objects, such as office walls, floors, and ceilings, for UWB communication channel characterization. It leads to effective UWB channel characterization with power‐decay time constant, path loss exponent, and probability distribution of power gain. In comparison with the conventional FDTD, the proposed method can achieve 60% saving in computational time while retaining good accuracy. Copyright © 2014 John Wiley & Sons, Ltd.  相似文献   

9.
    
Complementary single‐ended‐input operational transconductance amplifier (OTA)‐based filter structures are introduced in this paper. Through two analytical synthesis methods and two transformations, one of which is to convert a differential‐input OTA to two complementary single‐ended‐input OTAs, and the other to convert a single‐ended‐input OTA and grounded capacitor‐based one to a fully differential OTA‐based one, four distinct kinds of voltage‐mode nth‐order OTA‐C universal filter structures are proposed. TSMC H‐Spice simulations with 0.35µm process validate that the new complementary single‐ended‐input OTA‐based one holds the superiority in output precision, dynamic and linear ranges than other kinds of filter structures. Moreover, the new voltage‐mode band‐pass, band‐reject and all‐pass (except the fully differential one) biquad structures, all enjoy very low sensitivities. Both direct sixth‐order universal filter structures and their equivalent three biquad stage ones are also simulated and validated that the former is not absolutely larger in sensitivity than the latter. Finally, a very sharp increment of the transconductance of an OTA is discovered as the operating frequency is very high and leads to a modified frequency‐dependent transconductance. Copyright © 2010 John Wiley & Sons, Ltd.  相似文献   

10.
    
Serial communications systems suffer from channel bandwidth limitations that result in eye closure and inter‐symbol interference. Adaptive equalization at the receiver is widely implemented to alleviate this, and a number of continuous‐time techniques aiming multi‐gigabit operation have been proposed. The operation of adaptive equalizers is based on signal filtering carried out by loop filters whose characteristics are usually given ad‐hoc after a trial and error process. This paper presents a unified analysis of the operation of continuous‐time adaptive equalizers that results in a general design methodology to select the frequency characteristics of the filters implemented in the adaptation loop. Using the proposed methodology, a novel adaptation loop filter combination incorporating two low‐pass filters is presented. Copyright © 2016 John Wiley & Sons, Ltd.  相似文献   

11.
    
This paper presents an ultra‐low‐power fourth‐order bandpass operational transconductance amplifier‐C (OTA‐C) filter for an implantable cardiac microstimulator used to detect the R‐wave of intracardiac electrograms. The OTA‐C filter fabricated by TSMC 0.35‐µm complementary metal–oxide–semiconductor (CMOS) technology is operated in the subthreshold region to save power under a supply voltage of 1 V. The current cancellation technique is adopted to reduce the transconductance of the amplifier. Through this, the low‐frequency OTA‐C filter can be realized by ultra‐low transconductance with on‐chip capacitors. Direct comparison to conventional RLC ladders replaced by OTA‐C circuits shows that the method of reducing the number of OTAs further diminishes power consumption. Design issues, including ultra‐low transconductance, linearity, and noise, are also discussed. Measurement results show that the low‐voltage, low‐power filter has a bandwidth between 10 and 50 Hz, third inter‐modulation distortion of ?40 dB, dynamic range of 43 dB, and power consumption of only 12 nW. The real electrocardiography signal is fed into the bandpass filter to verify the function of signal processing with the distribution of the R‐wave. Copyright © 2012 John Wiley & Sons, Ltd.  相似文献   

12.
    
A modal finite‐difference time‐domain (FDTD) method is extended for the analysis of ridged cavities, which are uniform in the z‐direction. Assuming that the end surfaces of cavity are the perfect conductor, thus, the fields along the z‐axis can be described by kz. Therefore, three‐dimensional (3‐D) problems can be simulated by the use of a two‐dimensional model. Besides, to achieve a faster computation, the field components are expressed by two pairs of equations—sine and cosine. To validate the utility and efficiency of proposed method, we analyzed two ridged cavities. Numerical results show that less than one‐tenth memory and CPU requirements are needed by the modal FDTD as compared with conventional 3‐D FDTD method. Copyright © 2012 John Wiley & Sons, Ltd.  相似文献   

13.
In this paper, representations of a perfectly conducting thin wire and an imperfectly conducting medium in the transmission line modeling (TLM) calculation are briefly explained. Then, the method is applied to analyzing surge responses of a vertical parallelepiped grounding electrode and a square‐loop grounding electrode. Surge responses calculated using the TLM method agree reasonably well with the corresponding responses measured and calculated using the finite‐difference time‐domain method. It is probably the first time that surge responses of grounding electrodes have been analyzed reasonably accurately using the TLM method.  相似文献   

14.
    
Because the permittivity, permeability, and chirality parameters of chiral metamaterials (CMMs) are frequency dependent, the wave equations that describe the characters of electromagnetic wave propagation in CMMs are presented and discretized on the basis of auxiliary differential equation technique in finite‐difference time‐domain method. The total‐field/scattered‐field, Mur's first‐order absorbing and dielectric boundary conditions for CMMs slab are discussed in the paper. Numerical results show that the cross‐polarized reflected coefficient of the CMMs slab is zero. Negative index of refraction phenomenon and optical property of giant optical activity in CMMs slabs are illustrated with 1D auxiliary differential equation–finite‐difference time‐domain method. The effects to positive or negative phase velocity caused by media parameters of CMMs are studied. Copyright © 2013 John Wiley & Sons, Ltd.  相似文献   

15.
    
In this paper, we discuss three different models for the simulation of integer‐N charge‐pump phase‐locked loops (PLLs), namely the continuous‐time s‐domain and discrete time z‐domain approximations and the exact semi‐analytical time‐domain model. The limitations of the two approximated models are analyzed in terms of error in the computed settling time as a function of loop parameters, deriving practical conditions under which the different models are reliable for fast settling PLLs up to fourth order. Besides, output spectral purity analysis methods based upon the time‐domain model are introduced and the results are compared with those obtained by means of the s‐domain model in terms of phase noise and reference spur estimation. As a case study, we use the three models to analyze a fast switching PLL to be integrated in a frequency synthesizer for WiMedia MB‐OFDM UWB systems. Copyright © 2010 John Wiley & Sons, Ltd.  相似文献   

16.
    
This paper describes circuit design considerations for realization of low power dissipation successive approximation register (SAR) analog‐to‐digital converter (ADC) with a time‐mode comparator. A number of design issues related to time‐mode SAR ADC are discussed. Also, noise and offset models describing the impact of the noise and offset on the timing error of time‐domain comparator are presented. The results are verified by comparison to simulations. The design considerations mentioned in this paper are useful for the initial design and the improvements of time‐mode SAR ADC. Then, a number of practical design aspects are illustrated with discussion of an experimental 12‐bit SAR ADC that incorporates a highly dynamic voltage‐to‐time converter and a symmetrical input time‐to‐digital converter. Prototyped in a 0.18‐µm six‐metal one‐polysilicon Complementary Metal‐Oxide‐Semiconductor (CMOS) process, the ADC, at 12 bit, 500 kS/s, achieves a Nyquist signal‐to‐noise‐and‐distortion ratio of 53.24 dB (8.55 effective number of bits) and a spurious‐free dynamic range of 70.73 dB, while dissipating 27.17 μW from a 1.3‐V supply, giving a figure of merit of 145 fJ/conversion‐step. Copyright © 2013 John Wiley & Sons, Ltd.  相似文献   

17.
    
A new class of continuous‐time low‐pass filter using a set of Jacobi polynomials, with all transmission zeros at infinity, is described. The Jacobi polynomial has been adapted by using the parity relation for Jacobi polynomials in order to be used as a filter approximating function. The resulting class of polynomials is referred to as a pseudo Jacobi polynomials, because they are not orthogonal. The obtained magnitude response of these filters is more general than the magnitude response of the classical ultraspherical filter, because of one additional degree of freedom available in pseudo Jacobi polynomials. This additional parameter may be used to obtain a magnitude response having either smaller passband ripples or sharper cutoff slope. Monotonic, critical monotonic, or nearly monotonic passband filter approximating functions can be also generated. It is shown that proposed pseudo Jacobi polynomial filter approximation also includes the Chebyshev filter of the first kind, the Chebyshev filter of the second kind, the Legendre filter, and many transitional filter approximations, as its special cases. Several examples are presented, and detailed formulas including the practical suggestions for their efficient implementation are also provided. The proposed nearly monotonic filter is compared with the least‐square‐monotonic filters, designed as critical monotonic, in details. The advantages of the new filters are discussed. Copyright © 2017 John Wiley & Sons, Ltd.  相似文献   

18.
    
A novel implementation of the perfectly matched layer (PML) absorbing boundary condition (ABC) to terminate the finite‐difference time‐domain (FDTD) algorithm for general dispersive and negative index materials is presented. The proposed formulation also adopts the complex frequency‐shifted (CFS) approach, involves simple FDTD expressions and avoids complex arithmetic. Several FDTD‐PML simulations with different parameters are conducted for the termination of various dispersive media validating the stability, accuracy and effectiveness of the schemes and indicating the advantage of the CFS‐PML. Copyright © 2008 John Wiley & Sons, Ltd.  相似文献   

19.
    
An auxiliary‐differential equation perfectly matched layer formulation is developed for the first time for truncating radial point interpolation method meshless domains. Absorption parameters are optimized, producing maximum relative reflection error of −84.14 dB when 10 layers are used. The developed formulation is also validated by calculating the radar cross section of a metallic cylindrical scatterer, which has a known analytical solution.  相似文献   

20.
    
This paper presents a technique for mitigating two well‐known DAC non‐idealities in continuous‐time delta‐sigma modulators (CTDSMs), particularly in wide‐band and low over‐sampling‐ratio (OSR) cases. This technique employs a special digital‐to‐analog convertor (DAC) waveform, called modified return‐to‐zero (MRZ), to reduce the time uncertainty effect because of the jittered clock at the sampling time instances and eliminate the effect of inter‐symbol‐interference (ISI) which degrades the modulator performance, especially when non‐return‐to‐zero (NRZ) DAC waveform is chosen in the modulator design. A third‐order single‐bit CTDSM is designed based on the proposed technique and step‐by‐step design procedure at circuit and system levels, considering clock jitter and ISI, is explained. Circuit simulations in 180‐nm CMOS technology show that in the presence of circuit non‐idealities which generate jitter and asymmetrical rise and fall times in the DAC current pulse, signal‐to‐noise‐distortion‐ratio (SNDR) of the proposed modulator is higher than the conventional modulator with NRZ waveform by about 10 dB. In these simulations, clock jitter standard deviation is 0.3% of the sampling period (TS) and the difference between fall/rise times in the DAC current pulse is 4%TS. Simulated at 600‐MHz sampling frequency (fS) with an oversampling ratio (OSR) of 24, SNDR figure of merit (FOMSNDR) of the proposed modulator in 180‐nm CMOS is 300 fj/conversion. Copyright © 2016 John Wiley & Sons, Ltd.  相似文献   

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