A new MEMS gyroscope drift suppression method for the low‐cost untwisting spin platform

The microelectromechanical system (MEMS ) gyroscope provides a new method to design a low‐cost untwisting spin platform to be used in a single‐axis, stable strap‐down inertial navigation system. However, the MEMS gyroscope's drift reduces the effectiveness of the closed‐loop feedback control. Thus, a new method of drift suppression is proposed in this paper based on phase space reconstruction in order to improve the platform's performance. The feasibility of the MEMS gyroscope's drift suppression is analyzed using linear decomposition based on phase space. The system drift is estimated by phase space reconstruction. The optimal embedding dimension is found through a grid search. The number of dimensions for dimension reduction analysis is selected according to the minimum eigenvalue. The mapping from the high‐dimensional phase space onto the low‐dimensional phase space is obtained by minimizing the variance. A Kalman filter is used to compensate the residual sequence further. The proposed method is applied to an untwisting spin platform based on the MEMS gyroscope L3G4200D . The experimental results show that it can reduce the platform drift rate effectively.     

FPGA‐based implementation for improved control scheme of grid‐connected PV system with 3‐phase 3‐level NPC‐VSI

The large scale penetration of renewable energy resources has boosted the need of using improved control technique and modular power electronic converter structures for efficient and reliable operation of grid‐connected systems. This study investigates the performance of a grid‐connected 3‐phase 3‐level neutral‐point clamped voltage source inverter for renewable energy integration by using improved current control technique. For medium or high‐voltage grid interfacing, the multilevel inverter structure is generally used to reduce the voltage stress across the switching device as well as the harmonic distortion. The neutral‐point clamped voltage source inverter is controlled by using decoupling technique along with the proper grid synchronization via moving average filter–based phase‐locked loop. The moving average filter–based phase‐locked loop is used to reduce the delay in grid angle estimation under balanced as well as distorted grid conditions. A Lyapunov‐based approach for analysing the stability of the system has also been discussed. In this study, the hardware‐in‐loop (HIL) simulation of the control algorithm and the grid synchronization technique is realized using Virtex‐6 FPGA ML605 evaluation kit. The performance of the system is analyzed by conducting a time‐domain simulation in the Matlab/Simulink platform and its performance is examined in the HIL environment. The simulation and the hardware cosimulation results are presented to validate the effectiveness of the proposed control scheme.     

An efficient paradigm for wavelet‐based image processing using cellular neural networks

We propose a novel paradigm for cellular neural networks (CNNs), which enables the user to simultaneously calculate up to four subband images and to implement the integrated wavelet decomposition and a subsequent function into a single CNN. Two sets of experiments were designated to test the performance of the paradigm. In the first set of experiments, the effects of seven different wavelet filters and five feature extractors were studied in the extraction of critical features from the down‐sampled low‐low subband image using the paradigm. Among them, the combination of DB53 wavelet filter and the r=2 halftoning processor was determined to be most appropriate for low‐resolution applications. The second set of experiments demonstrated the capacity of the paradigm in the extraction of features from multi‐subband images. CNN edge detectors were embedded in a two‐subband digital wavelet transformation processor to extract the horizontal and vertical line features from the LH and HL subband images, respectively. A CNN logic OR operator proceeds to combine the results from the two subband line‐edge detectors. The proposed edge detector is capable of delineating more subtle details than using typical CNN edge detector alone, and is more robust in dealing with low‐contrast images than traditional edge detectors. The results demonstrate the proposed paradigm as a powerful and efficient scheme for image processing using CNN. Copyright © 2008 John Wiley & Sons, Ltd.     

A high‐speed RSD‐based flexible ECC processor for arbitrary curves over general prime field

This workpresents a novel high‐speed redundant‐signed‐digit (RSD)‐based elliptic curve cryptographic (ECC) processor for arbitrary curves over a general prime field. The proposed ECC processor works for any value of the prime number and curve parameters. It is based on a new high speed Montgomery multiplier architecture which uses different parallel computation techniques at both circuit level and architectural level. At the circuit level, RSD and carry save techniques are adopted while pre‐computation logic is incorporated at the architectural level. As a result of these optimization strategies, the proposed Montgomery multiplier offers a significant reduction in computation time over the state‐of‐the‐art. At the system level, to further enhance the overall performance of the proposed ECC processor, Montgomery ladder algorithm with (X,Y)‐only common Z coordinate (co‐Z) arithmetic is adopted. The proposed ECC processor is synthesized and implemented on different Xilinx Virtex (V) FPGA families for field sizes of 256 to 521 bits. On V‐6 platform, it computes a single 256 to 521 bits scalar point multiplication operation in 0.65 to 2.6 ms which is up to 9 times speed‐up over the state‐of‐the‐art.     

An adaptive noise reduction filter for discrete signal by use of sandglass‐type neural network

An adaptive noise reduction filter composed of a sandglass‐type neural network (SNN) noise reduction filter (RF) is proposed in this paper. SNN was originally devised to work effectively for information compression. It is a hierarchial network and is symmetrically structured. SNN consists of the same number of units in the input and output layers and a smaller number of units in the hidden layer. It is known that SNN has signal processing performance which is equivalent to Karhunen–Loeve expansion after learning. We proved the theoretical suitability of SNN for an adaptive noise reduction filter for discrete signals. The SNNRF behaves optimally when the number of units in the hidden layer is equal to the rank of the covariance matrix of the signal components included in the input signal. Further we show by applying the recursive least squares method to learning of the SNNRF that the filter can process signals for on‐line adaptive noise reduction. This is an extremely desirable feature for practical application. In order to verify the validity of SNNRF, we performed computer experiments examining how the noise reduction ability of SNNRF is affected by altering the properties of the input pattern, learning algorithm, and SNN. The results confirm that the SNNRF acquired appropriate characteristics for noise reduction from the input signals, and markedly improved the SNR of the signals. © 1999 Scripta Technica, Electr Eng Jpn, 127(4): 39–51, 1999