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对于制造集成电路芯片的多片生产设备而言,圆片间均匀性是评价工艺优劣的重要指标,可以利用正交试验方法来优化均匀性工艺.使用装载容量为18个150 mm圆片的AME8110干法蚀刻设备,利用正交试验方法进行干法蚀刻二氧化硅试验.通过直观分析,得到影响干法蚀刻均匀性的较优因素组合;通过方差分析,得到各因素对均匀性影响的显著性和可信度;通过工艺综合分析,得到各因素水平的选择原则和满足圆片间均匀性指标要求的优化工艺.按照优化工艺测试的圆片间蚀刻均匀性为3.93%.正交试验分析方法同样适用于其他多片生产设备和单片生产设备的工艺优化. 相似文献
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(利用部分要因试验设计与数据转换表征微电路工艺设备)。因为试验数据的尺度效应和测量的固有属性,试验数据常违反模型误差的正态和一致性假设。通过BOX-COX数据转换分析,确定热氧化工艺目标值的最优转换形式,针对转换后数据建立的回归模型满足上述假设。结果表明:数据转换的建模方法能满足方差分析的假设(违反度减轻),并且能更多发掘数据信息,氧化膜厚的模型拟合修正判定系数R2由93.54%增加到98.64%。所得模型用于优化工艺条件,在满足膜厚目标下,非均匀性由0.2%减小到0.08%。文中讨论的基于数据转换的建模方法可以用于半导体制造其他工艺。 相似文献
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通过双面抛光工艺研究了抛光盘转速、抛光盘压力及抛光垫材质与厚度等对AT切型石英晶圆材料去除速率(MRR)与厚度非均匀性(TNU)的影响。实验结果表明,抛光盘压力越大、转速越高,材料去除速率越高;晶圆厚度非均匀性随抛光盘压力增加先减小后增加,随抛光盘转速增加而增加;杨氏模量越大、厚度越薄的抛光垫在晶圆表面产生的压力分布越均匀,有助于提高抛光均匀性。最后基于上述实验结果对抛光工艺参数进行了优化,优化后晶圆的材料去除速率为0.9μm/h、单片晶圆厚度非均匀性小于1.5‰、表面粗糙度为0.6 nm。该研究结果适用于石英晶圆的批量抛光工艺,对石英晶圆加工企业的抛光工艺优化有较高的参考价值。 相似文献
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通过化学气相沉积法,采用不同生长工艺在4°偏角4H-SiC衬底上制备p型4H-SiC同质外延片。提出了p型4H-SiC同质外延中有效层厚度的概念,研究发现导致外延有效层厚度减少的直接原因是自掺杂效应的存在。采用傅里叶红外光谱仪(FT-IR)、汞探针电容电压(Hg-CV)和表面缺陷测试仪对p型4H-SiC同质外延片进行表征,讨论了不同工艺对外延有效层厚度的影响。结果表明,采用隔离法和阻挡层法均能提高外延有效层厚度,且掺杂浓度随距表面深度变化斜率值由1.323减小到0.073。然而,阻挡层法斜率值能进一步优化至0.050,是由于有效抑制了外延中固相和气相自掺杂。对比于优化前工艺,采用阻挡层法制备的p型4H-SiC同质外延片厚度不均匀性和表面总缺陷数量处于同一水平,掺杂浓度不均匀性由2.95%改善到2.67%。综上,采用阻挡层法能够制备出高有效层厚度、高一致性和高质量的p型4H-SiC同质外延片。 相似文献
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对于 <2的欠采样成像红外搜索和追踪系统,点目标能量集中在单像素内。由于焦平面阵列像素内灵敏度(IPS:Intra-Pixel Sensitivity)存在空间非均匀性,会降低目标的能量和质心测量精度。传统的光点扫描实验测试和数值仿真方法可有效表征和分析IPS,但系统和模型复杂度高、效率低,且实验测试无法分析IPS空间非均匀性与探测器参数的关系。针对上述问题,提出基于蒙特卡洛方法的HgCdTe红外焦平面阵列IPS仿真模型,分析了IPS空间非均匀性的影响因素。结果表明,减小像素中心距或增大吸收层厚度,IPS的空间非均匀性减小;随波长增大,IPS的空间非均匀性增大。该仿真和分析对高能量集中点目标测量精度的提升具有重要参考意义。 相似文献
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为了定量评价两种技术在视觉研究实验中的适用性,本文根据文献分析和视觉研究需求设计了显示器性能测试系统与测试流程,对一台阴极射线管(CRT)显示器和两台通用液晶显示器作为视觉刺激显示设备的关键性能进行测试。结合心理物理学理论,特别是韦伯定律,详细地分析和比较了各项测试结果。实验结果显示所有的显示器有不同的Gamma特性,需要进行相应的Gamma校正之后才能线性呈现图像的灰度级;CRT显示器在响应时间上具有绝对优势,但屏幕空间均匀性和独立性较差;相比于CRT显示器,LCD显示器具有较高的亮度和较好的空间均匀性和独立性,但是响应时间偏慢,而且相邻两帧图像之间独立性较差。这些测试结果表明,CRT显示器仍然是高动态特性视觉刺激显示的首选,而LCD显示器可以用于呈现对空间亮度一致性和空间的独立性要求高,但对响应速度要求不高的视觉刺激。 相似文献
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为了预测分析不同工况下烟叶加料的均匀性,文中提出一种基于神经网络MIV算法的烟叶加料工艺参数优化方法。通过对烟叶加料的工艺参数进行神经网络训练,利用MIV计算出各参数与加料均匀性的相关性,确定影响加料均匀性的关键工艺指标。文中进行了相应的试验证明,结果显示相对误差被控制在5%以内。由此结果推出影响加料均匀性的关键工艺指标为:排潮开度、工艺流量、气体压力及料液流量。其中,排潮开度、工业流量及料液流量与加料均匀性负相关,气体压力与加料均匀性正相关;经过MIV进行变量剔除的神经网络的预测性较好。 相似文献
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A nitrogen (N)-doped diamond-based electron emitter has been fabricated by the sintering technique prior to the chemical vapor deposition process in order to improve the uniformity. There are no spatial differences in reflective electron energy loss spectra (REELS) from the diamond-based electron emitter, suggesting that uniform surface conditions are obtained. The uniform electron emission from the obtained electron emitter is confirmed through emission current vs anode voltage characteristics measurements. It seems that the uniformity of the emitter surface results in uniform electron emission from the diamond electron emitter 相似文献
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Neural network based uniformity profile control of linear chemical-mechanical planarization 总被引:1,自引:0,他引:1
In this paper, a neural network based uniformity controller is developed for the linear chemical-mechanical planarization (CMP) process. The control law utilizes the metrology measurements of the wafer uniformity profile and tunes the pressures of different air-bearing zones on Lam linear CMP polishers. A feedforward neural network is used to self-learn the CMP process model and a direct inverse control with neural network is utilized to regulate the process to the target. Simulation and experimental results are presented to illustrate the control system performance. Compared with the results by using statistical surface response methods (SRM), the proposed control system can give more accurate uniformity profiles and more flexibility. 相似文献
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White D.A. Boning D. Butler S.W. Barna G.G. 《Semiconductor Manufacturing, IEEE Transactions on》1997,10(1):52-61
Optical emission spectroscopy (OES) is often used to obtain in-situ estimates of process parameters and conditions in plasma etch processes. Two barriers must be overcome to enable the use of such information for real-time process diagnosis and control. The first barrier is the large number of measurements in wide-spectrum scans, which hinders real-time processing. The second barrier is the need to understand and estimate not only process conditions, but also what is happening on the surface of wafer, particularly the spatial uniformity of the etch. This paper presents a diagnostic method that utilizes multivariable OES data collected during plasma etch to estimate spatial asymmetries in commercially available reactor technology. Key elements of this method are: first, the use of principal component analysis (PCA) for dimensionality reduction, and second, regression and function approximation to correlate observed spatial wafer information (i.e., line width reduction) with these reduced measurements. Here we compare principal component regression (PCR), partial least squares (PLS), and principal components combined with multilayer perceptron neural networks (PCA/MLP) for this in-situ estimation of spatial uniformity. This approach has been verified for a 0.35-μm aluminum etch process using a Lam 9600 TCP etcher. Models of metal line width reduction across the wafer are constructed and compared: the root mean square prediction errors on a test set withheld from training are 0.0134 μm for PCR, 0.014 μm for PLS, and 0.016 μm for PCA/MLP. These results demonstrate that in-situ spatially resolved OES in conjunction with principal component analysis and linear or nonlinear function approximation can be effective in predicting important product characteristics across the wafer 相似文献
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Brett Z. Nosho John A. Roth John E. Jensen Le Pham 《Journal of Electronic Materials》2005,34(6):779-785
The fabrication of high-quality focal plane arrays from HgCdTe layers grown by molecular beam epitaxy (MBE) requires a high
degree of lateral uniformity in material properties such as the alloy composition, doping concentration, and defect density.
While it is well known that MBE source flux nonuniformity can lead to radial compositional variation for rotating substrates,
we have also found that composition can be affected significantly by lateral variations in substrate temperature during growth.
In diagnostic experiments, we systematically varied the substrate temperature during MBE and quantified the dependence of
HgCdTe alloy composition on substrate temperature. Based on these results, we developed a methodology to quickly and nondestructively
characterize MBE-grown layers using postgrowth spatial mapping of the cutoff wavelength from the Fourier transform infrared
(FTIR) transmission at 300 K, and we were able to obtain a quantitative relationship between the measured spatial variations
in cutoff and the substrate temperature lateral distribution during growth. We refined this methodology by more directly inferring
the substrate temperature distribution from secondary ion mass spectroscopy (SIMS) measurements of the As concentration across
a wafer, using the fact that the As incorporation rate in MBE-grown p-type layers is highly sensitive to substrate temperature.
Combining this multiple-point SIMS analysis with FTIR spatial mapping, we demonstrate how the relative contributions from
flux nonuniformity and temperature variations on the lateral composition uniformity can be separated. This capability to accurately
map the lateral variations in the substrate temperature has been valuable in optimizing the mounting and bonding of large
substrates for MBE growth, and can also be valuable for other aspects of MBE process development. 相似文献
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For correlation of coded waveforms, the nonlinear interaction process in a SAW convolver should ideally give an amplitude and phase independent of position. A new experimental method of measuring this spatial uniformity used CW test waveforms and gave a resolution of 25 ns?a considerably higher resolution than previously attained. 相似文献
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Ju T.H. Lin W. Lee Y.C. McKnight D.J. Johnson K.M. 《Photonics Technology Letters, IEEE》1995,7(9):1010-1012
A self-pulling soldering technology has been demonstrated for assembling liquid crystal on silicon (LCOS) spatial light modulators (SLMs). Solder joints with different profiles and sizes are designed to provide vertical surface tension forces to control the gap accommodating the ferroelectric liquid crystal (FLC) layer in the range of a micron with sub-micron uniformity. This technology provides an automatic, batch assembly process for a LCOS SLM through one reflow process. The component designs and process optimization are described, and the first operational results are presented 相似文献
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An effective approach to improve silicon nitride thickness uniformity has been demonstrated on a batch LPCVD furnace platform. Implementation of adaptive real-time temperature control provides accurate, real-time estimation of substrate temperature profiles that enables model-based optimization of process temperature. Optimization of a 200-nm silicon nitride deposition yielded long-term, overall nitride thickness uniformity of 0.79% 1/spl sigma/ over a seven-week period, compared to 1.24% for an equivalent PID-tuned process. Three sequential silicon nitride deposition iterations were implemented in the process recipe to enable increased temperature ramp rates for more efficient optimization of within-wafer uniformity. The optimized process requalified quickly after major and minor equipment maintenance, and is suitable for use in a manufacturing environment. The ART-optimized temperature ramp intervals used in this study are comparable to temperature deltas often used to offset dichlorosilane depletion effects encountered in some large-batch vertical furnace depositions. SIMS depth profiling of ART-optimized silicon nitride does reveal small oxygen and chlorine peaks, indicating slight interface formation between deposition steps. 相似文献