高介电常数材料在半导体存储器件中的应用

高介电常数材料是当前微电子行业最热门的研究课题之一。它的应用为解决当前半导体器件尺寸缩小导致的栅氧层厚度极限问题提供了可能性 ,同时利用一些高介电常数材料具有的特殊物理特性 ,可实现具有特殊性能的新型器件。文中主要介绍几类常用的高介电常数材料的特性和制备方法 ,及其在半导体存储器件中的应用和前沿课题     

Improvement of Interpoly Dielectric Characteristics by Plasma Nitridation and Oxidation for Future nand Flash Memory

In this letter, plasma nitridation and oxidation on interpoly dielectric (IPD; $hbox{SiO}_{2}hbox{-}hbox{SiN}hbox{-}hbox{SiO}_{2}$ ) for cell programming speed and reliabilities are investigated. Nitrided top oxide with $hbox{N}_{2}$ plasma shows excellent physical and electrical properties in terms of edge profile on IPD and fast programming voltage. However, plasma nitridation on a floating gate suffers from data retention problems that result from nitridelike residue along the word line. A method to densify and reoxidize bottom oxide with $hbox{O}_{2}$ plasma oxidation is proposed for leakage path inhibition and data retention improvement.      

Systematic Design and Demonstration of Multi-Bit Generation in Layered Materials Heterostructures Floating-Gate Memory

Van der Waals (vdW) heterostructures with 2D materials have shown that atomically thin non-volatile memories are advantageous in terms of integration, while offering high performance and excellent stability. The non-volatile memory behavior of 2D materials has mainly been studied for single-bit operation, and there is growing interest in expanding to multi-bit operation to enhance the storage capacities of memory devices. However, the conditions or rules for generating the desired number of bits in 2D-based multi-bit memory remain to be identified. In this study, multiple bits are successfully created on non-volatile memory based on vdW heterostructure floating-gate memory (FGM) by systematically tuning the dimensions of the 2D materials. In particular, a fingerprint mechanism is established that links the bit number and dimensions of 2D crystals on vdW heterostructures. This approach could enable the precise generation of the desired number of bits in layered-material-based vdW FGMs.     

薄膜绝缘层对陶瓷厚膜电致发光显示器件的影响

采用丝网印刷技术，在Al2O3陶瓷板上印刷、高温烧结内电极及绝缘层制备出陶瓷厚膜基板，进而制备了新型厚膜电致发光显示器（TDEL），整个器件结构为陶瓷基板／内电极／厚膜绝缘层／发光层／薄膜绝缘层／ITO透明电极。对用不同薄膜绝缘材料制备的显示器件的特性进行测试、比较、分析，结果表明薄膜绝缘介质层对器件的阈值电压、发光亮度均有一定的影响，以复合绝缘层的性能最优。最后对器件的衰减特性进行了初步分析。     

Voltage-Controlled Relaxation Oscillations in Phase-Change Memory Devices

A new oscillation behavior in a phase-change memory device is presented and analyzed. The device consists in a chalcogenide resistor with a parallel capacitance and no inductance. Biasing the device immediately after a proper trigger pulse leads to damped relaxation oscillations, which can be controlled in frequency by the bias voltage. The oscillation mechanism is explained by repetitive cycles of threshold switching and recovery of the high-resistance (off) state of the amorphous chalcogenide region in the device. Damping is explained by oscillation-induced phase change in the chalcogenide layer.     

Investigation of Time–Dependent Resistive Switching Behaviors of Unipolar Nonvolatile Organic Memory Devices

Organic resistive memory devices are one of the promising next‐generation data storage technologies which can potentially enable low‐cost printable and flexible memory devices. Despite a substantial development of the field, the mechanism of the resistive switching phenomenon in organic resistive memory devices has not been clearly understood. Here, the time–dependent current behavior of unipolar organic resistive memory devices under a constant voltage stress to investigate the turn‐on process is studied. The turn‐on process is discovered to occur probabilistically through a series of abrupt increases in the current, each of which can be associated with new conducting paths formation. The measured turn‐on time values can be collectively described with the Weibull distribution which reveals the properties of the percolated conducting paths. Both the shape of the network and the current path formation rate are significantly affected by the stress voltage. A general probabilistic nature of the percolated conducting path formation during the turn‐on process is demonstrated among unipolar memory devices made of various materials. The results of this study are also highly relevant for practical operations of the resistive memory devices since the guidelines for time‐widths and magnitudes of voltage pulses required for writing and reading operation can be potentially set.     

Radiation Effects of Proton Particles in Memory Devices

In this letter, we study the impact of single event upsets (SEUs) in space or defense electronic systems which use memory devices such as EEPROM, and SRAM. We built a microcontroller test board to measure the effects of protons on electronic devices at various radiation levels. We tested radiation hardening at beam current, and energy levels, measured the phenomenon of SEUs, and addressed possible reasons for SEUs.     

基于锗硅异质纳米晶的非易失浮栅存储器的存储特性

利用自组织生长和选择化学刻蚀方法在超薄SiO2隧穿氧化层上制备了渐变锗硅异质纳米晶,并通过电容.电压特性和电容-时间特性研究了该纳米结构浮栅存储器的存储特性.测试结果表明,该异质纳米晶非易失浮栅存储器具有良好的空穴存储特性,这是由于渐变锗硅异质纳米晶中Ge的价带高于Si的价带形成了复合势垒,空穴有效地存储在复合势垒的Ge的一侧.     

CCD栅介质工艺对多晶硅层间介质的影响

CCD多晶硅交叠区域绝缘介质对成品率和器件可靠性具有重要的影响.采用扫描电子显微镜和电学测试系统研究了CCD栅介质工艺对多晶硅层间介质的影响.研究结果表明:栅介质工艺对多晶硅层间介质形貌具有显著的影响.栅介质氮化硅淀积后进行氧化,随着氧化时间延长,靠近栅介质氮化硅区域的多晶硅层间介质层厚度增大.增加氮化硅氧化时间到320 min,多晶硅层间薄弱区氧化层厚度增加到227 nm.在前一次多晶硅氧化后淀积一层15 nm厚氮化硅,能够很好地填充多晶硅层间介质空隙区,不会对CCD工作电压产生不利的影响.     

基于锗硅异质纳米晶的非易失浮栅存储器的存储特性

利用自组织生长和选择化学刻蚀方法在超薄SiO2隧穿氧化层上制备了渐变锗硅异质纳米晶,并通过电容.电压特性和电容-时间特性研究了该纳米结构浮栅存储器的存储特性.测试结果表明,该异质纳米晶非易失浮栅存储器具有良好的空穴存储特性,这是由于渐变锗硅异质纳米晶中Ge的价带高于Si的价带形成了复合势垒,空穴有效地存储在复合势垒的Ge的一侧.     

嵌入式闪存器件技术进展

首先介绍了嵌入式闪存器件的基本工作原理,并根据具体的技术特点和应用整理归纳出了嵌入式闪存器件的三种主流单元结构:单晶体管器件结构、分裂栅器件结构和选择晶体管加存储晶体管的两管器件结构,然后详细分析和比较了这三种器件结构的优缺点。接着进一步重点介绍嵌入式闪存器件近年来的最新发展,列举了传统浮栅器件在65 nm技术代的先进解决方案,并讨论了融合分立电荷陷阱存储概念的新型SONOS和纳米晶存储技术,介绍了该类型技术较之传统浮栅结构的突出优势以及目前的研究进展。最后,对嵌入式闪存技术在32 nm以下节点将遭遇的瓶颈以及进一步发展方向进行分析和展望,给出了可能的解决方案。     

Charge Storage in Pentacene/Polymethylmethacrylate Memory Devices

The electrical behavior of organic metal–insulator–semiconductor (MIS) structures incorporating a layer of self-assembled metallic nanoparticles is described. These have been based on thermally evaporated pentacene (semiconductor) and spin-coated polymethylmethacrylate (insulator). The MIS devices containing the nanoparticles exhibited significant hysteresis in their capacitance-versus-voltage and conductance-versus-voltage characteristics, which was attributed to the charging and discharging of the nanoparticles. The memory structure reported here offers a useful advance in the development of flexible organic memory structures.      

Nonvolatile Multilevel Conductance and Memory Effect in Molecule-Based Devices

Electrical characteristics of a single-layer organic device using 2-(hexahydropyrimidin-2-ylidene)-malononitrile (HPYM) that is interposed between Al/Al₂O₃ (cathode) and Ag (anode) electrodes were investigated. The application of different positive voltages produced different high-conductance currents, resulting in the multilevel memory capability of the device. The high-conductance states could be erased back to the low-conductance state by the application of a negative bias. The formation of an aluminum oxide layer between Al and HPYM layer could be one effective method to increase the data-retention time but could be irrelevant with the electric-field-induced conductance-state transition of the device.     

The Impact of Thermal Boundary Resistance in Phase-Change Memory Devices

Thermal conduction governs the writing time and energy of phase-change memory (PCM) devices. Recent measurements demonstrated large thermal resistances at the interfaces of phase-change materials with neighboring electrode and passivation materials. In this letter, electrothermal simulations quantify the impact of these resistances on the set to reset transition. The programming current decreases strongly with increasing boundary resistance due to increased lateral temperature uniformity, which cannot be captured using a reduced effective conductivity in the phase-change material. Reductions in programming current from 20% to 30% occur for an interface resistance of 50 m²middotK/GW. The precise spatial distribution of thermal properties is critical for the simulation of PCM devices.     

介质损耗在线监测设备的研制

对电容型设备进行定期检修是变电站的重要任务，但传统的方法存在试验周期长、强度大、成本高等缺点，也不适应现代信息化管理的发展，目前在线监测是一个研究热点。本文描述了实际介质损耗在线监测设备研制的过程，实践比较了数字化介损测量的各种软硬件方法。在原理上采取综合相对比较法，系统设计上采取网络化统一监控和现场监控相结合的方案。现场运行表明，该方案能有效克服干扰，提高在线监测的稳定度。     

CCD多晶硅层间复合绝缘介质研究

电荷耦合器件(CCD)多晶硅交叠区域绝缘介质对成品率和器件可靠性具有重要的影响。将氮化硅和二氧化硅作为CCD多晶硅层间复合绝缘介质,采用扫描电子显微镜(SEM)和电学测试系统研究了多晶硅层间氮化硅和二氧化硅复合绝缘介质对CCD多晶硅栅间距和多晶硅层间击穿电压的影响。研究结果表明,多晶硅层间复合绝缘介质中的氮化硅填充了多晶硅热氧化层的微小空隙,可以明显改善绝缘介质质量。多晶硅层间击穿电压随着氮化硅厚度的增加而增大,但太厚的氮化硅会导致CCD暗电流明显增大。由于复合绝缘介质质量好,可以减小CCD多晶硅的氧化厚度。     

陶瓷厚膜介质电致发光器件特点和最新进展

总结了陶瓷厚膜介质电致发光器件(TDEL)的发展历程和近期进展.介绍和比较了TDEL器件的特殊结构和优异的显示特性,以及陶瓷厚膜介质的工艺特点及器件的成本.重点阐述了iFire技术公司的新颖的颜色转换彩色显示实现方案,并对其产业化前景作了展望.     

Elimination of Forming Process for TiOx Nonvolatile Memory Devices

This letter studies the physical mechanism for the high-voltage forming process that is required before a TiOx resistance-change memory device can be set and reset repeatedly. A new in situ fabrication process has been developed and demonstrated to eliminate the high-voltage forming.      

Modeling of Set/Reset Operations in NiO-Based Resistive-Switching Memory Devices

Resistive-switching memory (RRAM) devices are attracting a considerable interest in view of their back-end integration, fast programming, and high scalability. Prediction of the programming voltages and currents as a function of the operating conditions is an essential task for developing compact and numerical models able to handle a large number ($hbox{10}^{6}$– $hbox{10}^{9}$) of cells within an array. Based on recent experimental findings on the set and reset processes, we have developed physics-based analytical models for the set and reset operations in NiO-based RRAMs. Simulation results obtained by the analytical models were compared with experimental data for variable pulse conditions and were found consistent with data. The set transition is described by a threshold switching process at the broken conductive filament (CF), while the reset transition is viewed as a thermally driven dissolution and/or oxidation of the CF. Set and reset models are finally used for reliability predictions of failure times under constant-voltage stress (read disturb) and elevated-temperature bake (data retention).      

Direct Observation of Ag Filamentary Paths in Organic Resistive Memory Devices

We demonstrate bipolar switching of organic resistive memory devices consisting of Ag/polymer/heavily‐doped p‐type poly Si junctions in an 8 × 8 cross‐bar array structure. The bistable switching mechanism appears to be related to the formation and rupture of highly conductive paths, as shown by a direct observation of Ag metallic bridges using transmission electron microscopy and energy‐dispersive X‐ray spectroscopy. Current images of high‐ and low‐conducting states acquired by conducting atomic force microscopy also support this filamentary switching mechanism. The filamentary formation can be described by an electrochemical redox reaction model of Ag. Our results may also be applied to other kinds of organic materials presenting similar switching properties, contributing to the optimization of device scaling or memory performance improvement.