U-Boot在s3c2410上的移植及功能扩展

考虑到Bootloader在嵌入式系统开发及产品升级方面的重要性及近年来NAND Flash闪存在嵌入式系统应用中的广泛性,提出了U-Boot从NAND Flash闪存设备启动的方法.详细地介绍了U-Boot源码结构及其启动流程,并分析了NAND Flash闪存工作原理及操作方法,实现了U-Boot从NAND Flash闪存启动以及U-Boot以命令行形式操作NAND Flash的功能.最后,实验结果表明了U-Boot在s3c2410处理器上成功的移植.     

支持Yaffs2文件系统的U-Boot的实现

为了在大容量NAND Flash存储器中运行Yaffs2(yet another flash file system)文件系统,分析了Yaffs2文件系统的结构、原理、性能和嵌入式系统中启动代码U-Boot的功能.在此基础上对U-Boot进行了改进.实现了在嵌入式系统的开发过程中用U-Boot向大容量NAND Flash中写入Yaffs2文件系统,并将其成功应用在正在开发的嵌入式手持设备中,从而可以方便地使用大容量的NAND Flash存储器.     

Yaffs2文件系统中对NAND Flash磨损均衡的改进

针对以NAND Flash为存储介质时Yaffs2文件系统存在磨损均衡的缺陷,通过改进回收块选择机制,并在数据更新中引入冷热数据分离策略,从而改善NAND Flash的磨损均衡性能.实验借助Qemu软件建立Linux嵌入式仿真平台,从总擦除次数、最大最小擦除次数差值和块擦除次数标准差等方面进行对比.实验结果表明,在改进后的Yaffs2文件系统下NAND Flash的磨损均衡效果有明显提升,这有益于延长NAND Flash的使用寿命.     

嵌入式设备NAND Flash存储系统的设计与实现

为了实现一种嵌入式设备存储系统的解决方案,对嵌入式设备广泛采用的大容量存储设备NAND Flash进行了深入的研究.设计了一种嵌入式设备中NAND Flash存储系统的解决方案,介绍了其功能用途和系统结构,分层介绍了系统的具体设计,重点介绍了比较独特的块设备驱动层和FTL层的设计方法以及对驱动初始化的优化.通过实际设计NAND Flash存储系统Linux驱动,说明了该系统设计实际应用时的出色效果.     

高性能NAND Flash控制器在SoC平台中的设计与应用

NAND Flash在现代数码产品中得到了广泛的应用,在片上系统芯片中集成NAND Flash控制器已成为一种趋势。分析SoC平台中高性能NAND Flash控制器的实现方案,提出两种改进NAND Flash控制器数据读写速度的技术,在面积增加很小的情况下,有效地改善了控制器的性能。该设计方法已通过了仿真测试和FGPA验证,在SMIC 0.18μm工艺库下的综合速度能够达到121MHz。     

基于PXA3xx处理器的NAND闪存DMA方案

针对PXA3xx处理器的特性,提出一种DMA控制器系统架构方案,并在此架构上结合嵌入式Linux操作系统实现NAND Flash的底层驱动程序.重点设计了基于JFFS2文件系统的读操作测试方案,测试结果表明,DMA方式能够有效降低CPU处理负载,缓解NAND Flash性能瓶颈.     

支持多种闪存启动的U-Boot的实现

分析U-Boot 在 S3C2440A处理器上的引导过程,根据S3C2440A处理器支持Bootloader从NOR Flash和NAND Flash启动的特性和U-Boot从NOR Flash和NAND Flash启动过程的差异,提出一种同时支持NOR Flash和NAND Flash双启动的U-Boot的实现方法。实现的源代码在ARM-Linux交叉编译环境中编译通过,并在基于S3C2440A处理器的开发板上稳定运行。     

嵌入式Linux中NAND Flash设备驱动研究

NAND Flash作为一种非易失性的存储介质,它具有速度快、体积小、存储密度高和容量大等优点,适用于大量数据的存储,因此在嵌入式领域中的应用也越来越广泛。分析了MTD(内存技术设备)与NAND Flash驱动的关系,总结了典型的NAND Flash驱动程序的总体架构。针对PXA270RP平台,设计和实现了嵌入式Linux下的NAND Flash驱动程序。为编写基于嵌入式Linux系统下的NAND Flash设备驱动程序提供了技术指导。     

一种适用FADEC的NAND Flash文件存储系统

NAND Flash具有容量大、存取数据快的优点.但是,在使用过程中NAND Flash会产生坏块,且坏块是随机分布的.因此,操作NAND Flash需要相当的技巧,不能往坏块里写入数据.同时,NAND Flash更容易发生位翻转,需要使用ECC算法确保信息的正确性.在航空发动机上NAND Flash主要用来记录发动机控制(FADEC)的历史数据.FADEC的历史数据记录要求大容量、实时性和正确性.提出的适用FADEC的NAND Flash的文件存储系统(FFS_N)可以有效地解决NAND Flash使用上的问题,同时满足航空发动机控制历史数据记录要求.     

支持多种NAND Flash的驱动程序研究与实现

NAND Flash具有存储密度高、成本低等优点,非常适合于手持设备的数据存储。该文介绍了在WINCE平台如何实现支持多种类型的NAND Flash的驱动程序,采取分层驱动的体系架构,提高代码复用的程度,便于维护和扩展。添加一种新的类型的NAND Flash,只需用加入很少的代码。     

Design and implementation of MLC NAND flash-based DBMS for mobile devices

Recently, Multi-Level Cell (MLC) NAND flash memory is becoming widely used as storage media for mobile devices such as mobile phones, MP3 players, PDAs and digital cameras. MLC NAND flash memory, however, has some restrictions that hard disk or Single-Level Cell (SLC) NAND flash memory do not have. Since most traditional database techniques assume hard disk, they may not provide the best attainable performance on MLC NAND flash memory. In this paper, we design and implement an MLC NAND flash-based DBMS for mobile devices, called AceDB Flashlight, which fully exploits the unique characteristics of MLC NAND flash memory. Our performance evaluations on an MLC NAND flash-based device show that the proposed DBMS significantly outperforms the existing ones.     

Next High Performance and Low Power Flash Memory Package Structure

In general, NAND flash memory has advantages in low power consumption, storage capacity, and fast erase/write performance in contrast to NOR flash. But, main drawback of the NAND flash memory is the slow access time for random read operations. Therefore, we proposed the new NAND flash memory package for overcoming this major drawback. We present a high performance and low power NAND flash memory system with a dual cache memory. The proposed NAND flash package consists of two parts, i.e., an NAND flash memory module, and a dual cache module. The new NAND flash memory system can achieve dramatically higher performance and lower power consumption compared with any conventionM NAND-type flash memory module. Our results show that the proposed system can reduce about 78% of write operations into the flash memory cell and about 70% of read operations from the flash memory cell by using only additional 3KB cache space. This value represents high potential to achieve low power consumption and high performance gain.     

A high performance NAND array file system based on multiple NAND flash memories

The existing NAND flash memory file systems have not taken into account multiple NAND flash memories for large-capacity storage. In addition, since large-capacity NAND flash memory is much more expensive than the same capacity hard disk drive, it is cost wise infeasible to build large-capacity flash drives. To resolve these problems, this paper suggests a new file system called NAFS for large-capacity storage with multiple small-capacity and low-cost NAND flash memories. It adopts a new cache policy, mount scheme, and garbage collection scheme in order to improve read and write performance, to reduce the mount time, and to improve the wear-leveling effectiveness. Our performance results show that NAFS is more suitable for large-capacity storage than conventional NAND file systems such as YAFFS2 and JFFS2 and a disk-based file system for Linux such as HDD-RAID5-EXT3 in terms of the read and write transfer rate using a double cache policy and the mount time using metadata stored on a separate partition. We also demonstrate that the wear-leveling effectiveness of NAFS can be improved by our adaptive garbage collection scheme.     

A user-visible solid-state storage system with software-defined fusion methods for PCM and NAND flash

Existing SSD technology exploits the properties of NAND flash and leverages NAND flash with a controller running FTL algorithms to improve system performance. On one hand, however, in this black-box-modeled structure, data semantic information is hard to be transferred and interpreted by conventional interfaces. Hence, SSD firmware fails to make full use of the performance potential of SSD by utilizing semantic information. Moreover, the host cannot obtain physical characteristics and statistical information about SSD, failing to be used by the file system or I/O scheduling algorithm designed for the disks. On the other hand, in SSD-based storage systems, persistent data are stored in the NAND flash and however manipulated in DRAM, causing the decoupled inefficiency. The data being closer to the processors are much easier to be lost due to the volatile property of DRAM, leading to serious data reliability problems. What’s more, restrictive read/program granularity and out-of-place updates limit the performance while flash suffers from small size operations.In order to address these problems, we propose a user-visible solid-state storage system with software-defined fusion methods for PCM and NAND flash. PCM is used for improving data reliability and reducing the write amplification of NAND flash as PCM shows some outstanding features, such as in-place updates, byte-addressable, non-volatile properties and better endurance. In this system, we manage the storage device as user-visible structure rather than black-box-modeled structure. In detail, we expose the number of channels, erase counts and data distribution of PCM/NAND flash to the host and design FTL algorithm closer to file system to obtain more semantic information of data accessing. PCM can be software-defined as the same level storage or buffer of NAND flash to reduce the WA (Write Amplification) of NAND flash and improve the data reliability. Moreover, some key software components (such as FTL, I/O scheduling and buffer management) are also reconfigurable and operated easily combined with physical characteristics. To achieve these design goals, we implement a Host Fusion Storage Layer (HFSL) and redesign the lengthy I/O path. Applications or filesystem can access PCM/flash directly via provided interfaces by HFSL without passing traditional I/O subsystem. Moreover, we provide the system management software to make the storage system can be easily software-defined by the upper-level system. We implement our software-defined fusion storage system in our actual hardware prototype and extensive experimental results demonstrate the efficiency of the proposed schemes.     

NAND闪存存储文件系统

NAND闪存已经成为便携式设备的主要存储介质。由于闪存自身的物理特性,需要在现有文件系统层与闪存的存储物理层之间引入闪存转换层。但是,现有文件系统主要针对磁盘存储系统设计的,没有考虑NAND闪存物理特性。这种方法效率低、影响便携式设备的性能。本文概述了NAND闪存的存储文件系统,分析比较了其中三种主要文件系统,为基于NAND闪存存储介质的便携式系统设计提供了参考意见。     

A workload-aware flash translation layer enhancing performance and lifespan of TLC/SLC dual-mode flash memory in embedded systems

Similar to traditional NAND flash memory, triple-level cell (TLC) flash memory is used as secondary storage to meet the fast growing demands on storage capacity. TLC flash memory exhibits attractive features such as shock resistance, high density, low cost, non-volatility and low access latency natures. However, TLC flash memory also has some extra limitations, such as write disturbance, low performances and very limited cycles compared to single-level cell (SLC) flash memory.In this paper, we propose a workload-aware flash translation layer, named Balloon-FTL, for the TLC/SLC dual-mode flash memory, to improve performance and lifespan of the system. We first build a workload identifier module with genetic algorithm to dynamically allocate TLC/SLC capacity based on different workloads, and produce the suitable data allocation to achieve a balanced write distribution in flash memory with low memory access cost. The basic idea is to classify metadata/userdata according to their access pattern, and allocate low-latency SLC and high-density TLC mode blocks for write-intensive metadata and a large quantities userdata, respectively. We then propose a special hybrid mapping strategy for the TLC/SLC dual-mode flash memory to improve the performance. Experimental results show that Balloon-FTL can effectively improve the performance and lifespan of the TLC/SLC dual-mode flash memory in embedded systems.     

非易失存储器NAND Flash及其在嵌入式系统中的应用

文中介绍了NAND Flash的芯片内部组织结构、主要的外部引脚及其功能、NAND Flash的类型、NAND Flash所支持的文件系统、与微处理器的连接和NAND Flash的固有特性,并对比了NAND和NOR Flash的异同。最后简述了闪存固件程序架构和如何在Linux操作系统中加入对NAND Flash的支持。     

WinCE系统中MLC型闪存的编程支持研究

基于WinCE6．0操作系统,以实现WinCE下驱动程序对MLCNAND闪存的支持及其驱动程序性能的提高为目的。介绍了NAND闪存驱动程序的整体架构;对Fish抽象层的功能及地址映射关系的建立进行分析,讨论了引用版本号的概念为MLCNAND闪存建立地址映射关系的过程,使Flash抽象层程序可以支持MLCNAND;对Flash介质驱动层进行分析,介绍了采用两片编程技术提高驱动性能的原理与实现,及4位EOC校验的步骤;经对两片编程与单片编程方式的写速度测试,结果表明前者比后者速度提高了92．2％。     

A hybrid flash translation layer design for SLC-MLC flash memory based multibank solid state disk

This paper presents the design of a NAND flash based solid state disk (SSD), which can support various storage access patterns commonly observed in a PC environment. It is based on a hybrid model of high-performance SLC (single-level cell) NAND and low cost MLC (multi-level cell) NAND flash memories. Typically, SLC NAND has a higher transfer rate and greater cell endurance than MLC NAND flash memory. MLC NAND, on the other hand, benefits from lower price and higher capacity. In order to achieve higher performance than traditional SSDs, an interleaving technique that places NAND flash chips in parallel is essential. However, using the traditional FTL (flash translation layer) on an SSD with only MLC NAND chips is inefficient because the size of a logical block becomes large as the mapping address unit grows. In this paper, we proposed a HFTL (hybrid flash translation layer) which makes use of chained-blocks, combining SLC NAND and MLC NAND flash memories in parallel. Experimental results show that for most of the traces studied, the HFTL in an SSD configuration composed of 80% MLC NAND and 20% SLC NAND memories can improve performance compared to other solid state disk configurations, composed of either SLC NAND or MLC NAND flash memory alone.