An English-Japanese machine translation system using the active dictionary

The development of a machine translation system is one of the most difficult computational tasks. Without a deep semantic analysis of both source and target languages, a machine translation system can not generate good results. This paper describes a machine translation system based on a new method called the Integral Method in which semantic analysis using an active dictionary plays a very important role.     

An efficient soft demapper for APSK signals using extreme learning machine

Neural Computing and Applications - In this paper we introduce an efficient soft demapping method for amplitude phase shift keying (APSK) constellations using extreme learning machine (ELM). The...     

An efficient IoT based smart farming system using machine learning algorithms

Multimedia Tools and Applications - This paper suggests an IoT based smart farming system along with an efficient prediction method called WPART based on machine learning techniques to predict crop...     

An efficient recognition-complete processor allocation strategy fork-ary n-cube multiprocessors

Composed of various topologies, the k-ary n-cube system is desirable for accepting and executing topologically different tasks. To utilize its large amount of processor resources, several allocation strategies have been reported, each with certain restrictions that affect performance. For improvement, we propose a new allocation strategy for the k-ary n-cubes. The proposed strategy is an extension of the TC strategy for hypercubes and is able to recognize all subcubes with different topologies requested by tasks. Complexity analysis and performance comparison between related strategies are provided to demonstrate their advantages and disadvantages. Simulation results show that with full subcube recognition ability and no internal fragmentation, our strategy always exhibits better performance     

Providing machine tractable dictionary tools

Machine readable dictionaries (Mrds) contain knowledge about language and the world essential for tasks in natural language processing (Nlp). However, this knowledge, collected and recorded by lexicographers for human readers, is not presented in a manner for Mrds to be used directly for Nlp tasks. What is badly needed are machine tractable dictionaries (Mtds): Mrds transformed into a format usable for Nlp. This paper discusses three different but related large-scale computational methods to transform Mrds into Mtds. The Mrd used is The Longman Dictionary of Contemporary English (Ldoce). The three methods differ in the amount of knowledge they start with and the kinds of knowledge they provide. All require some handcoding of initial information but are largely automatic. Method I, a statistical approach, uses the least handcoding. It generates relatedness networks for words in Ldoce and presents a method for doing partial word sense disambiguation. Method II employs the most handcoding because it develops and builds lexical entries for a very carefully controlled defining vocabulary of 2,000 word senses (1,000 words). The payoff is that the method will provide an Mtd containing highly structured semantic information. Method III requires the handcoding of a grammar and the semantic patterns used by its parser, but not the handcoding of any lexical material. This is because the method builds up lexical material from sources wholly within Ldoce. The information extracted is a set of sources of information, individually weak, but which can be combined to give a strong and determinate linguistic data base.     

Localized algorithms for vlsi processor arrays

In this paper we analyze the algorithms expressed as a system of recurrence equations. The algorithms are called 2^?1 output algorithms if two output values of one function (variable identification) are specified by the system of recurrence equations for each index point in the algorithm. The algorithm is in free form if the indexes of these two values are not dependent. Two standard classes are determined by this criteria: the nearest neighbour and the all pair form. For example the sorting algorithm can be expressed in the all pair form i.e., the linear insertion algorithm or in the nearest neighbour form i.e., the bubble sort algorithm. However these algorithms are different in their nature. A procedure to eliminate the computational broadcast for the all pair 2^?1output algorithm has been proposed by the authors in [1]. The result obtained by implementing this procedure was a localized form of the algorithm and a system of uniform recurrence equations by eliminating the computational and data broadcast. So he data dependence method can be efficiently used for parallel implementations. The proposed procedure cannot be implemented directly on the nearest neighbour form algorithms. Here we show how the algorithm can be restructured into a form where the computational and data broadcast can be eliminated. These transformations result in localized algorithms. A few examples show how these algorithms can be implemented on processor arrays. For example, the Gentleman Kung triangular array [2] can be used for solving the QR decomposition algorithm for both forms of the algorithm. The implementations differ in the order of the data flow and the processor operation. We show that the implementation of the nearest neighbour algorithm is even better than the standard one.     

An efficient abstract machine for Safe Ambients

Safe Ambients (SA) are a variant of the Ambient Calculus (AC) in which types can be used to avoid certain forms of interferences among processes called grave interferences.An abstract machine, called GcPan, for a distributed implementation of typed SA is presented and studied. Our machine improves over previous proposals for executing AC, or variants of it, mainly through a better management of special agents (the forwarders), created upon code migration to transmit messages to the target location of the migration. Well-known methods (such as reference counting and union-find) are applied in order to garbage collect forwarders, thus avoiding long – possibly distributed – chains of forwarders, as well as avoiding useless persistent forwarders.We present the proof of correctness of GcPan w.r.t. typed SA processes. We describe a distributed implementation of the abstract machine in OCaml.More broadly, this study is a contribution towards understanding issues of correctness and optimisations in implementations of distributed languages encompassing mobility.     

An efficient approach for damage identification based on improved machine learning using PSO-SVM

Engineering with Computers - Structural health monitoring (SHM) and Non-destructive Damage Identification (NDI) using responses of structures under dynamic excitation have an imperative role in the...     

A generalized simultaneous access dictionary machine

A simultaneous access design of a dictionary machine which supports insert, delete, and search operations is presented. The design is able to handle p accesses simultaneously and allows redundant accesses to occur. In the design, processors performing insert or delete operations are free to perform other tasks after submitting their accesses to the design; processors that perform search operations get their response in O(log N) time. Compared to all sequential access designs of a dictionary which require O(p ) time to process p accesses, the presented design provides much higher throughput; specifically, O(p/log p) times better. It also provides a fast mechanism to avoid the sequential access bottleneck in any large multiprocessor system     

Optimal routing algorithms for mesh-connected processor arrays

We show that there is a randomizedoblivious algorithm for routing any (partial) permutation on ann ×n grid in 2n +O(logn) parallel communication steps. The queues will not grow larger than Θ(logn/log logn) with high probability. We then modify this to obtain a (nonoblivious) algorithm with the same running time such that the size of the queues is bounded by a constant with high probability. For permutations withlocality, where each packet has to travel a distance at mostL, a generalization of the algorithm routes in time proportional toL with high probability. Finally, we identify a class of meshlike networks that have optimal or near-optimal diameter. These meshes have the potential of being adapted to run existing sorting and routing algorithms with corresponding reduction in their running times.     

Parallel reconfiguration algorithms for mesh-connected processor arrays

Effective fault tolerance techniques are essential for improving the reliability of multiprocessor systems. At the same time, fault tolerance must be achieved at high speed to meet the real-time constraints of embedded systems. While parallelism has often been exploited to increase performance, to the best of our knowledge, there has been no previously reported work on parallel reconfiguration of mesh-connected processor arrays with faults. This paper presents two parallel algorithms to accelerate reconfiguration of the processor arrays. The first algorithm reconfigures a host array in parallel in a multithreading manner. The threads in the parallel algorithm execute independently within a safe rerouting distance. The second algorithm is based on a divide-and-conquer approach to first generate the leftmost segments in parallel and then merge the segments in parallel. When compared to the conventional algorithm, simulation results from a large number of instances confirm that the proposed algorithms significantly accelerate the reconfiguration without loss of harvest.     

环网处理器阵列的容错重构技术

高效的容错技术对于提高多处理器系统的可靠性至关重要。环网(Torus)是连接多处理器阵列的重要网络结构,而环网处理器阵列上的容错重构技术目前尚属空白。针对环网阵列的特殊连接方式,将环网阵列重构问题转化为矛盾图上求解最大独立集问题。矛盾图上的结点表示故障处理器的替换方案,而边代表了不同替换方案之间的不可共存特性。主要是根据三种不同的冗余处理器分布方案,设计生成矛盾图算法,求解最大独立集算法,以及由独立集生成逻辑处理器阵列算法,取得了令人满意的结果。实验结果表明,当阵列规模较小或故障率较低时,一行一列和十字型的冗余单元分布的重构能力较好;而随着阵列规模或故障率的增大,三种冗余单元分布策略的重构成功率都随之下降,但可通过增加冗余单元以及调整冗余分布来改善容错效果。此外,从实验结果中还可以看出,环网处理器阵列的容错能力显然优于网格(Mesh)处理器阵列。     

Optimal routing algorithms for mesh-connected processor arrays

We show that there is a randomizedoblivious algorithm for routing any (partial) permutation on ann ×n grid in 2n +O(logn) parallel communication steps. The queues will not grow larger than (logn/log logn) with high probability. We then modify this to obtain a (nonoblivious) algorithm with the same running time such that the size of the queues is bounded by a constant with high probability. For permutations withlocality, where each packet has to travel a distance at mostL, a generalization of the algorithm routes in time proportional toL with high probability. Finally, we identify a class of meshlike networks that have optimal or near-optimal diameter. These meshes have the potential of being adapted to run existing sorting and routing algorithms with corresponding reduction in their running times.Preliminary reports of portions of the results contained in this paper have appeared in theProceedings of the 1988 Aegean Workshop on Computing [5], and in theProceedings of the 1987 Conference on Foundations of Software Technology and Theoretical Computer Science [18]. The work of the first author was supported in part by NSF Grant NSF-DCR-85-03251 and ONR contract N00014-80-C-0647. The work of the second author was supported in part by NSF Grant NSF-DCR-86-00379.     

Fast deterministic selection on mesh-connected processor arrays

We present a deterministic algorithm for selecting the element of rankk amongN=n ² elements, 1kN, on ann×n mesh-connected processor array in 1.45n parallel computation steps, using constant-sized queues (for large enoughn). This is a considerable improvement over the best previous deterministic algorithm, which was based upon sorting and requires2n+o(n) steps. Our algorithm can be generalized to solve the problem of selection on higher-dimensional meshes. In particular, we present an algorithm for the three-dimensional mesh which achieves a time bound better than any of the previously known deterministic results.This research was done while all three authors were at the University of Rochester, New York.     

Simulation and verification of associative processor arrays

This work is based on the design of a VLSI processor array comprising single bit processing elements combined with Content Addressable Memory (CAM) [1,2]. The processors are connected in a linear array with 64 currently being combined on a chip. Each processor is linked to 64 bits of data CAM and 4 bits of subset CAM (used for marking subsets of the array for subsequent processing). The architecture is targeted at image applications including pixel based processing as well as higher level symbolic manipulation and incorporates a data shift register linking all of the processing elements which allows data loading and processing to occur concurrently.

The current situation is that an extensive functional simulation package has been written [3] which allows algorithms to be coded and executed on a system which comprises an arbitrary number of array chips together with its controlling hardware. This allows algorithms to be investigated, and tuned to the architecture. A reduced design has been fabricated and the chips are undergoing parametric testing. A full version of the processor array chip will then be produced allowing a complete image system to be tested.

The VLSI design work undertaken so far [2] shows that the blocks which constitute the design can easily be replicated an arbitrary number of times (subject to chip size constraints) to create an application specific CAM array. The need for this type of flexibility has been borne out by the algorithmic work that has been carried out by a number of workers. In order to make the design of application specific arrays possible it is vital that the simulation tools are fast enough to allow adequate testing to be performed on the new design. It is for this reason that the original simulation package, written in C, has been transferred onto a transputer array.

This paper looks at the way in which the simulation is mapped onto the transputers in such a way that an arbitrary number can be used. In addition the problems of verification and validation of the simulator and the VLSI design are addressed. Results are given for a number of different applications which show very encouraging speed-ups. In many ways it has been found that the efficiency with which the simulation can be carried out with a large number of transputers mirrors the efficiency of the processor array in terms of communications overhead.     

An efficient non-contiguous processor allocation strategy for 2D mesh connected multicomputers

In non-contiguous allocation, a job request can be split into smaller parts that are allocated possibly non-adjacent free sub-meshes rather than always waiting until a single sub-mesh of the requested size and shape is available. Lifting the contiguity condition is expected to reduce processor fragmentation and increase system utilization. However, the distances traversed by messages can be long, and as a result the communication overhead, especially contention, is increased. The extra communication overhead depends on how the allocation request is partitioned and assigned to free sub-meshes. In this paper, a new non-contiguous processor allocation strategy, referred to as Greedy-Available-Busy-List, is suggested for the 2D mesh network. Request partitioning in our suggested strategy is based on the sub-meshes available for allocation. To evaluate the performance improvement achieved by our strategy and compare it against well-known existing non-contiguous and contiguous strategies, we conduct extensive simulation runs under the assumption of wormhole routing and three communication patterns, notably one-to-all, all-to-all and random. The results show that the new strategy can reduce the communication overhead and substantially improve performance in terms of job turnaround time and system utilization.     

An image fusion framework using novel dictionary based sparse representation

Image fusion is an important technique which aims to produce a synthetic result by leveraging the cross information available in the existing data. Sparse Representation (SR) is a powerful signal processing theory used in wide variety of applications like image denoising, compression and fusion. Construction of a proper dictionary with reduced computational efficiency is a major challenge in these applications. Owing to the above criterion, we propose a supervised dictionary learning approach for the fusion algorithm. Initially, gradient information is obtained for each patch of the training data set. Then, the edge strength and information content are measured for the gradient patches. A selection rule is finally employed to select the patches with better focus features for training the over complete dictionary. By the above process, the number of input patches for dictionary training is reduced to a greater extent. At the fusion step, the globally learned dictionary is used to represent the given set of source image patches. Experimental results with various source image pairs demonstrate that the proposed fusion framework gives better visual quality and competes with the existing methodologies quantitatively.     

A full and efficient machine tractable dictionary for natural language processing: A revised version of the CUVOALD

A lexicon is an essential part of any natural language processing system. The size, content and format of the lexicon is crucial in determining the power and sophistication of a natural language processing system. However, a lexicon which provides comprehensive, consistent and accurate lexical information and which is in a format facilitating fast retrieval is not easily available. This paper reports on a project which aims at the development of such a lexicon. The resulting lexicon is actually the modified and extended version of the machine tractable version of the Oxford Advanced Learner's Dictionary. The modification and extension concentrate mainly on the aspects of comprehensiveness, consistency, explicitness, accuracy and the dictionary format. The modified and extended version is considered a desirable source of lexical information for any natural language processing system.Si-Qing Chen received her Ph.D. in computational linguistics (1992) from Guangzhou Institute of Foreign Languages. His research interests include natural language processing, computer-assisted language teaching, and computational lexicography. She is currently furthering her study and research at the University of Illinois at Urbana-Champaign. She has published several articles on psycholinguistics, language teaching, philosophy of language, and natural language processing in, amongst other journals, Language Learning and the CALICO Journal.Luomai Xu is an associate professor in the Department of English at Guangzhou Institute of Foreign Languages. He has been working on several projects and published several articles on natural language processing.     

An efficient Kernel-based matrixized least squares support vector machine

Matrix-pattern-oriented linear classifier design has been proven successful in improving classification performance. This paper proposes an efficient kernelized classifier for Matrixized Least Square Support Vector Machine (MatLSSVM). The classifier is realized by introducing a kernel-induced distance metric and a majority-voting technique into MatLSSVM, and thus is named Kernel-based Matrixized Least Square Support Vector Machine (KMatLSSVM). Firstly, the original Euclidean distance for optimizing MatLSSVM is replaced by a kernel-induced distance, then different initializations for the weight vectors are given and the correspondingly generated sub-classifiers are combined with the majority vote rule, which can expand the solution space and mitigate the local solution of the original MatLSSVM. The experiments have verified that one iteration is enough for each sub-classifier of the presented KMatLSSVM to obtain a superior performance. As a result, compared with the original linear MatLSSVM, the proposed method has significant advantages in terms of classification accuracy and computational complexity.