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1.
A new type of GaAs FET, the metal-insulator-metal gate FET, is proposed, which combines the advantages of both the GaAs MESFET and the GaAs MISFET. The device is especially suitable for the enhancement mode of operation. 相似文献
2.
In the letter experimental results are presented which show that a continuous active gate travelling-wave transistor (TWT) can be used for medium power applications in a wide bandwidth. To reduce the gate resistance, a T-gate configuration has been chosen. This allows one to extend the frequency bandwidth of such a device. Simulations have been performed using small- and large-signal models taking in addition the parasitic capacitances into account. A distributed Schottky diode has been used to adjust the phase synchronisation and therefore to achieve flat gain.<> 相似文献
3.
A monolithic GaAs travelling-wave amplifier with distributed input and output lines is described, and its experimental performance in the 0.5?14 GHz range is reported. 相似文献
4.
The design, fabrication, and operation of a 64-pixel, two-phase GaAs cermet gate charge-coupled device (CMCCD) is described. A castellated channel geometry provides the built-in electric field for directing the flow of signal charge within the CMCCD channel. A two-dimensional computer model for the electrostatic potential within a single pixel of the CMCCD is used to verify the presence of the built-in electric field and is used to show the possibility of the existence of energy troughs under the cermet gates. Energy troughs within the CMCCD are undesirable, as they increase the dispersion of signal charge through the device. It is shown that the energy troughs are overcome by increasing the clock voltage amplitude. A 64-pixel, two-phase CMCCD demonstrated a charge-transfer efficiency of 0.996 when operated at 46 MHz 相似文献
5.
T. S. Henderson 《Microelectronics Reliability》1996,36(11-12)
GaAs-based heterojunction bipolar transistors (HBTs) are of interest for a wide variety of applications. However, concerns about the long-term stability of the device have recently arisen. This paper describes the physics of HBT degradation under bias stress as similar to GaAs light-emitting diode (LED) and laser diode (LD) degradation. TEM, electroluminescence, and electrical measurements support this model. Additionally, the model also indicates the factors in epitaxial growth and device processing that are critical to device reliability. 相似文献
6.
The insulated gate transistor: A new three-terminal MOS-controlled bipolar power device 总被引:2,自引:0,他引:2
《Electron Devices, IEEE Transactions on》1984,31(6):821-828
A new three-terminal power device, called the insulated gate transistor (IGT), with voltage-controlled output characteristics is described. In this device, the best features of the existing families of bipolar devices and power MOSFET's are combined to achieve optimal device characteristics for low-frequency power-control applications. Devices with 600-V blocking capability fabricated using a vertical DMOS process exhibit 20 times the conduction current density of an equivalent power MOSFET and five times that of an equivalent bipolar transistor operating at a current gain of 10. Typical gate turn-off times have been measured to range from 10 to 50 µs. 相似文献
7.
A new semiconductor 3-terminal device has been realised in which a majority-carrier current, flowing in a N+-N-N+ structure, is controlled by a minority-carrier current supplied by a forward-biased P+-N junction. The properties of this device are presented and discussed in terms of a physical model. 相似文献
8.
The resonant gate transistor 总被引:3,自引:0,他引:3
《Electron Devices, IEEE Transactions on》1967,14(3):117-133
A device is described which permits high-Q frequency selection to be incorporated into silicon integrated circuits. It is essentially an electrostatically excited tuning fork employing field-effect transistor "readout." The device, which is called the resonant gate transistor (RGT), can be batch-fabricated in a manner consistent with silicon technology. Experimental RGT's with gold vibrating beams operating in the frequency range 1 kHz < f0 < 100 kHz are described. As an example of size, a 5-kHz device is about 0.1 mm long (0.040 inch). Experimental units possessingQ 's as high as 500 and overall input-output voltage gain approaching + 10 dB have been constructed. The mechanical and electrical operation of the RGT is analyzed. Expressions are derived for both the beam and the detector characteristic voltage, the device center frequency, as well as the device gain and gain-stability product. A batch-fabrication procedure for the RGT is demonstrated and theory and experiment corroborated. Both single- and multiple-pole pair band pass filters are fabricated and discussed. Temperature coefficients of frequency as low as 90- 150 ppm/°C for the finished batch-fabricated device were demonstrated. 相似文献
9.
A two-stage monolithic GaAs travelling-wave amplifier operating in the 2?20 GHz frequency range with 12 dB flat gain is reported. 相似文献
10.
A new insulated gate power device suitable for thin silicon-on-insulator (SOI) application is described and verified through two-dimensional numerical simulation. The lateral insulated gate p-i-n transistor (LIGPT) has a much superior current carrying capability than that of the lateral insulated gate bipolar transistor (LIGBT) because it conducts like a p-i-n diode. Because a new turn-off mechanism is employed, the LIGPT also demonstrates a very large gate turn-off capability. These two major advantages; coupled with other advantages such as latch-up free, make the LIGPT a very promising device for use in power integrated circuits on SOI 相似文献
11.
Kim M.E. Oki A.K. Gorman G.M. Umemoto D.K. Camou J.B. 《Microwave Theory and Techniques》1989,37(9):1286-1303
GaAs-AlGaAs n-p-n heterojunction bipolar transistor (GaAs HBT) technology and its application to analog and microwave functions for high-performance military and commercial systems are discussed. In many applications the GaAs HBT offers key advantages over the alternative advanced silicon bipolar and III-V compound field-effect-transistor (FET) approaches. TRW's GaAs HBT device and IC fabrication process, basic HBT DC and RF performance, examples of applications, and technology qualification work are presented and serve as a basis for addressing general capability issues. A related 3-μm emitter-up, self-aligned HBT IC process provides excellent DC and RF performance, with simultaneous gain-bandwidth product, f T, and maximum frequency of oscillation, f max, of approximately 20-40 GHz and DC current gain β≈50-100 at useful collector current densities ≈3-10 kA/cm2, early voltage ≈500-1000 V, and MSI-LSI integration levels. These capabilities facilitate versatile DC-20-GHz analog/microwave as well as 3-6 Gb/s digital applications, 2-3 G sample/s A/D conversion, and single-chip multifunctions with producibility 相似文献
12.
A three-dimensional semiconductor device simulator was developed to study the steady-state characteristics of heterostructure compound semiconductor devices. The semiconductor partial differential equations-Poisson's equation and the two carrier transport equations-are solved using finite-difference discretization. The Gummel iteration method and indirect space matrix solution techniques are utilized for minimizing computation time and memory requirements. This simulator was applied to the analysis of heterojunction bipolar transistors. The effect of emitter grading on the current-voltage characteristic is demonstrated. A comparison between two- and three-dimensional simulations is also presented. The results show that three-dimensional analysis is indispensable, in particular for devices of small geometry 相似文献
13.
Nishihori K. Kitaura Y. Hirose M. Mihara M. Nagaoka M. Uchitomi N. 《Electron Devices, IEEE Transactions on》1998,45(7):1385-1392
This paper describes a newly developed GaAs metal semiconductor field-effect transistor (MESFET)-termed p-pocket MESFET-for use as a linear power amplifier in personal handy-phone systems. Conventional buried p-layer technology, the primary technology for microwave GaAs power MESFET's, has a drawback of low power efficiency for linear power applications. The low power efficiency of the buried p-layer MESFET is ascribed to the I-V kink which is caused by holes collected in the buried p-layer under the channel. In order to overcome this problem, we have developed the self-aligned gate p-pocket MESFET which incorporates p-layers not under the channel but under the source and drain regions. This new MESFET exhibited high transconductance and uniform threshold voltage. The problematic I-V kink was successfully removed and an improved power efficiency of 48% was achieved under bias conditions, which resulted in adjacent channel leakage power at 600-kHz offset as low as -59 dBc for 1.9-GHz π/4-shift QPSK modulated input 相似文献
14.
A GaAs PIN travelling-wave modulator operated at 1.3 ?m has been fabricated from material grown by organometallic vapour phase epitaxy (OMVPE) on an n+ (100) GaAs substrate. The device has a constant V? of 8 V from DC to 10 GHz and an optical extinction ratio of 13 dB. The optical insertion loss of the device is 3.5 dB, and the 3 dB frequency bandwidth is measured to be 4.1 GHz, which is limited by the microwave slowing induced by the n+ substrate. 相似文献
15.
《Electron Device Letters, IEEE》1986,7(11):627-628
A completely new type of GaAs bipolar transistor with a base formed by a two-dimensional hole gas has been fabricated. The transistor has no metallurgical base layer but has an extremely thin inversion hole layer working as a base layer. The current gain β = 5.6 at 77 K and β = 17.1 at 300 K was obtained for the common emitter mode. 相似文献
16.
A GaAs dynamic logic gate is proposed which uses a trickle transistor to compensate for leakage from the precharged node. This trickle transistor dynamic logic (TTDL) circuit is configured as a domino logic gate and a differential cascode voltage switch logic (CVSL) gate. Delay chains were implemented in a 1-μm GaAs enhancement/depletion (E/D) process where the depletion-mode FETs (DFETs) and the enhancement-mode FETs (EFETs) have threshold voltages of -0.6 and 0.15 V, respectively, in order to obtain an experimental characterization of these gates. In addition, the TTDL gates were used to implement a 4-b carry-lookahead adder. The adder has a critical delay of 0.8 ns and a power dissipation of 130 mW 相似文献
17.
A two-dimensional integrated numerical device/circuit model for GaAs/MESFET DCFL gate simulation is presented. It is different from previous publications in that (a) transient carrier transport equations of the FETs are calculated with consideration for the interaction between interconnected FETs in a circuit, (b) the numerical calculations are carried out for the coupled equations to provide accuracy and (c) with the new algorithm used, the numerical calculation can be carried out with high efficiency. A “dynamic method” and a “single gate method” have been developed to simulate the steady state transfer and ring oscillator transient characteristics, respectively, which have proved to be much more efficient than the previously used methods. Based on the model, a gate level two-dimensional numerical simulator, LADES2G, has been developed and successfully applied to GaAs DCFL circuit design. 相似文献
18.
《Electron Devices, IEEE Transactions on》1987,34(4):753-758
A two-layer resist structure using EBR-9 and PMMA for fabricating a fine metal line with a mushroom-like cross-sectional profile is reported. The structure provides T-shaped resist cavities with undercut profiles using electron-beam exposure. With the optimum developing condition, the bottom opening is as small as 0.1 µm, and the top opening is wide enough not to require an additional exposure in order to obtain a mushroom-like metal lift-off pattern. A Monte Carlo calculation is carried out in order to analyze the profile of the two-layer resist structure, and it is shown that an undercut T-shaped resist profile with a 0.1-µm bottom opening can be obtained using a high-sensitivity resist on a low-sensitivity resist structure. A 0.15-µn mushroom-like lift-off metal profile has been fabricated on a 0.1-µm recessed GaAs substrate by the use of this resist structure. 相似文献
19.
Wenqiang Lei Zhonghai Yang Li Liao Ping Liao 《International Journal of Electronics》2013,100(3):161-172
The dispersion equation and interaction impedance of a U-shaped vane-loaded helical slow-wave structure (SWS) is obtained by considering the azimuthal space harmonic in the non-vane region and the helical tape thickness, using the field theory matching method in the azimuthal field discontinuity. The theoretical calculation by electromagnetic analysis is consistent with the simulation result by MAFIA, which can explain some physical essence of the SWS. In the helical SWS, negative dispersion is reported to reduce the second harmonic content of a wideband travelling-wave tube at the low-frequency end of the band. When the SWS is assembled, the support rods are easily located in the groove of the vane. The solution provides a new instruction method for other types of vane-loaded helical SWS. 相似文献
20.
《Electron Devices, IEEE Transactions on》1978,25(5):551-552
The first thermal-oxide gate GaAs MOSFET of the deep-depletion mode is reported. The gate oxide, which has been grown by the new GaAs oxidation technique in the As2 O3 vapor, is so chemically stable that it can be subjected to the fabrication process. Measurement of some dc characteristics of the device fabricated has shown a strikingly suppressed hysteresis. 相似文献