突发数传中的同步问题

突发数传中，如何有效地建立同步是系统的重要技术问题之一。本文提出了一种用软件实现的快速捕获群同步，锁定位同步（码元相位）的方法。     

一种快速的PN码同步捕获方法

针对直扩系统中长PN码同步捕获速度慢的问题,利用推导的串接短PN码与长PN码具有相似相关性的结论,对直扩系统中PN码同步捕获的并行匹配滤波捕获方法进行改进,得到了简单可行的串并结合捕获方法。然后,结合一个周期内PN码相关值,采用迭代的方式,选取简单、实用的自适应门限,实现了突发通信中PN码的快速同步捕获。采用该自适应门限的捕获方法无需估计噪声,计算量小。仿真实验表明所提方法捕获概率高,抗噪性能强。     

TDMA卫星通信系统突发同步的性能研究

突发载波捕获和同步是TDMA系统的关键技术,使用数据序列辅助判决可有效缩短该处理过程需要的时间;在低接收信噪比下使用CAZAC序列的相关处理能够获得较高的突发捕获性能;比较了CAZAC序列和"1010"序列的载波和时钟同步误差估计性能,分析了它们在低信噪比门限时对信号快速捕获能力的影响。提出了2种序列组合应用实现载波快速同步的方案,完成信号捕获和载波估计功能。     

CDMA 系统中的快速捕获技术

主要分析TCDMA移动通信系统中的两种重要的快速捕获技术(并行捕获技术和匹配滤波器同步捕获技术，给出了他们的实现方案、系统框图等)。     

卫星入路由通信的定时和载波同步算法

在卫星通信中,需要快速、高效地对接收信号的位定时和载波初始相位信息进行估计.针对MC-S-ALOHA卫星入路由信号的特点,给出了一种基于前导序列的定时同步和载波同步算法,该算法仅需要一个训练符号,既用于定时恢复,也用于载波频率捕获,额外开销量小,因此,该算法适合于突发模式的MC-S-ALOHA网络传输系统.仿真结果表明,该算法也能快速地实现定时和频率捕获,捕获的频率范围较宽, 而且实现结构简单.     

一种快速实现超宽带信号捕获的算法

信号的同步是超宽带技术实现和发展的关键环节，本文介绍一种能快速实现超宽带脉冲信号同步的串行捕获算法，即自适应门限块搜索算法。该算法将相位搜索范围进行分块处理，通过对信噪比进行实时估计不断调整其判决门限，达到最佳判决，用较少的硬件代价实现脉冲信号的快速捕获。     

一种基于多通道并行接收的同步捕获及速率判决方法

现有技术在处理多通道并行接收数据的同步捕获时,通常采用全精度计算,由于计算复杂,通常需要消耗大量的片上资源,当数据为多通道并行接收数据时,其资源消耗通常是单通道资源消耗的整数倍,这导致了在资源紧张的情况下捕获过程无法正确实现。为了解决以上资源消耗问题,提出了一种基于多通道并行接收的同步捕获及速率判决方法,在利用较少硬件资源实现多通道并行捕获的同时,基于快速速率识别算法,实现速率识别。     

用卷积器实现快速码同步及解调

阐述了SAW卷积器匹配滤波功能,提出了用卷积器实现某直接序列扩频PSK调制数传系统的快速码同步及解调的新方法。理论及实验结果表明,这种码捕获方式的平均捕获时间比多积分方式小两个数量级。数据解调直接在中频上完成,它不需要码精同步和载波同步,解调器原理简便,结构简单。     

遥控副载波数字化解调器技术研究

介绍低码速率下的PSK遥控副载波实现快速可靠捕获并进行载波同步与位同步的数字化解调方法.给出了数字化解调原理、载波同步、位同步方法并给出仿真,结果具有一定的参考价值.     

突发OFDM系统中的快速符号定时同步

提出了一种在突发OFDM系统中,基于改进前导序列的快速粗符号定时方法。与传统算法比较,该算法不受频率偏移的影响,适合于频偏捕获之前的符号定时同步。运算复杂度降低,适合于突发通信中的快速同步。提高了定时精度,克服了传统算法符号定时模糊的缺点,所以特别适合于突发模式下频偏捕获之前的快速粗符号定时同步。     

Beyond 3G移动通信系统的小区搜索算法

本文给出了一种可用于Beyond3G的帧结构,利用在物理帧中添加单载波调制的同步信道的方法来实现快速小区搜索。小区搜索过程主要包括时隙同步、帧同步和小区识别过程。本文通过对小区搜索算法的检测概率和虚警概率进行分析,推导出小区搜索的平均搜索时间来分析设计方案的性能。最后,通过在IMT-2000modelA信道环境下对小区搜索算法的性能进行仿真,验证了设计方案的正确性。     

Cell search in W-CDMA

In a CDMA cellular system, the process of the mobile station searching for a cell and achieving code and time synchronization to its downlink scrambling code is referred to as cell search. Cell search is performed in three scenarios: initial cell search when a mobile station is switched on, idle mode search when inactive, and active mode search during a call. The latter two are also called target cell search. This paper presents algorithms and results for both initial and target cell search scenarios for the wideband CDMA (W-CDMA) standard. In W-CDMA, the cell search itself is divided into five acquisition stages: slot synchronization, frame synchronization and scrambling code group identification, scrambling code identification, frequency acquisition, and cell identification. Initial cell search needs all five stages, while target cell search in general does not need the last two stages. A pipelined process of the first three stages that minimizes the average code and time acquisition time, while keeping the complexity at a reasonable level, is considered. The frequency error in initial cell search, which may be as large as 20 kHz, is taken care of by partial symbol despreading and noncoherent combining. Optimization of key system parameters such as the loading factors for primary synchronization channel, synchronization channel, and common pilot channel for achieving the smallest average code and time acquisition time is studied. After code and time synchronization (the first three stages), a maximum likelihood (ML)-based frequency acquisition method is used to bring down the frequency error to about 200 Hz. The gain of this method is more than 10 dB compared to an alternative scheme that obtains a frequency error estimate using differential detection     

Efficient Synchronization for Digital TV Phone Transmission

We describe a technique for jointly encoding the rasterscan sync and data framing information for digital TV phone systems in which synchronous sampling is employed for picture encoding. The technique yields: 1) fast acquisition and hard locking synchronization; 2) highly stable picture displays; and 3) reduced channel capacity requirements.     

DSA techniques for fast and robust acquisition of DS/CDMA scrambling codes

This article introduces the key concepts, organization, and operations of distributed sample-based acquisition (DSA) systems, which have previously been introduced for fast and robust synchronization of the long-period scrambling codes in DS/CDMA environments. In DSA systems, the transmitter samples and sends the state of its main sequence generator, or main shift register generator (SRG), in a distributed manner over the short-period igniter sequence, and the receiver detects and applies the state samples to correct the state of its main SRG, thereby acquiring SRG synchronization after a round of state reception. Acquisition performance of DSA techniques is extremely fast and robust compared to typical correlation-based acquisition techniques of comparable complexity. This article discusses the operation and performance of DSA techniques in the DS/CDMA communication environment as well as their applications to intercell synchronous and asynchronous cellular systems.     

全数字突发信号接收机实现

突发通信具有环境噪声大,突发帧短等特点,常规的解调器不能满足要求,文中提出了一种全数字突发信号实现方案,以并行进行位同步,载波同步等加快捕获速度.通过在Xilinx的FPGA上实现,并经工程测试表明,该接收机具有高速传输、捕获速度快等特点,适合高速突发通信场合使用.     

Distributed sample acquisition-based fast cell search in inter-cellasynchronous DS/CDMA systems

We introduce a fast fell-search scheme based on the distributed sample acquisition (DSA) technique for inter-cell asynchronous DS/CDMA systems. The proposed DSA scheme enables the long-code acquisition extremely fast even without employing any passive matched filter which used to dominate synchronization circuit complexity in asynchronous DS/CDMA systems. In the DSA-based asynchronous DS/CDMA system, each base station spreads its DQPSK-modulated long-code generator information with an assigned short-period igniter sequence, and broadcasts it as a common pilot signal. A mobile station first identifies and acquires the igniter sequence of the cell group currently located, then detects the conveyed long-code generator information by despreading the acquired igniter sequence, thereby identifying and synchronizing the long-code of the current cell. The mean acquisition time of this proposed DSA-based inter-cell asynchronous DS/CDMA system, evaluated under the assumption that each of 512 cell-specific long-codes is a 10-ms segment (38400-chips for the chip rates of 3.84 Mchips/s) of complex Gold codes of period 2¹⁸-1 and the igniter sequence (or, group code) set is composed of 7 complex orthogonal Gold codes of period 256, turned out even shorter than that of the inter-cell synchronous DS/CDMA systems employing the conventional serial search method. Furthermore, simulation results showed that the DSA scheme employing a passive matched filter is much superior in terms of acquisition time and robustness, to the 3GPP W-CDMA synchronization scheme having comparable complexity     

Clock synchronization for packet networks using a weighted least‐squares error filtering technique and enabling circuit emulation service

Circuit emulation service (CES) allows time‐division multiplexing (TDM) services (T1/E1 and T3/E3 circuits) to be transparently extended across a packet network. With circuit emulation over IP, for instance, TDM data received from an external device at the edge of an IP network is converted to IP packets, sent through the IP network, passed out of the IP network to its destination, and reassembled into TDM bit stream. Clock synchronization is very important for CES. This paper presents a clock synchronization scheme based on a double exponential filtering technique and a linear process model. The linear process model is used to describe the behaviour of clock synchronization errors between a transmitter and a receiver. In the clock synchronization scheme, the transmitter periodically sends explicit time indications or timestamps to a receiver to enable the receiver to synchronize its local clock to the transmitter's clock. A phase‐locked loop (PLL) at the receiver processes the transmitted timestamps to generate timing signal for the receiver. The PLL has a simple implementation and provides both fast responsiveness (i.e. fast acquisition of transmitter frequency at a receiver) and significant jitter reduction in the locked state. Copyright © 2006 John Wiley & Sons, Ltd.     

基于SOPC的双目视频采集及显示系统设计

针对双目视频传输数据量大、实时性及同步性要求严的问题,给出了一种以SOPC为核心的双目同步视频采集及显示系统设计实例.采用软硬件协同设计的方法,将视频采集控制器、视频输出控制器及DMA控制器集组成数据传输快速通道集成在SOPC中,并结合OpenCV开发上位机应用软件.结果证明,该设计方法在保证双目视频数据同步性和实时性的同时,极大的提升了系统集成度,并降低了设计复杂度,具有较高的实用价值.     

卫星信道下低速扩频信号的快速同步

提出一种适合于卫星信道下低速扩频信号的快速同步方案。在高速时钟的驱动下,利用抽头数远小于扩频码长的匹配滤波器实现扩频信号的快速捕获;扩频码同步后先利用部分相关值对大载波频差进行初步估计,估计范围可接近符号率;然后再利用全相关值对剩余小频差进行精确的估计;最后利用锁相环实现载波的跟踪。计算结果和仿真结果表明,该方案是切实可行的。     

调制跳跃系统同步性研究：一个同步方案

In order to achieve fast synchronization of the modulation hopping system, a synchronization scheme called short code to guide long code is adopted, and the initial synchronization hops and service hops are designed in detail. According to the system requirements for short code in the properties of time-varying, safety and balance, an algo- rithm to design wide-gap chaos short code based on TOD is proposed. Synchronization performance analysis shows that the algorithm has good performance, the initial synchronization time and the later entering network synchronization time are short, additionally, maximum synchronization time difference and synchronization maintaining time are long, all of which meet the needs of normal communications, and further verify the synchronization scheme feasible.