可嵌入式应用的新型2T结构硅纳米晶存储器

本文研究了2T硅纳米晶非挥发存储器性能和可靠性。存储单元可获得良好性能,包括低压操作下快速的擦写速度,卓越的数据保持特性（保持10年）,良好的耐受性（10k次擦写周期以后小于10%的阈值电压飘移）。数据表明了此器件在未来嵌入式非挥发存储应用的可能性。     

硅纳米晶存储器的耐受性研究

首先介绍了硅纳米晶粒的制备工艺以及硅纳米晶存储器件的基本特性。接着重点探讨了硅纳米晶存储器耐久性退化的物理机制,发现应力引起的界面陷阱是耐受性退化的主要原因。随后,同时采用多种分析手段,如电荷泵法和CV曲线分析法对界面陷阱的退化机理进行了更深入细致的研究。从界面陷阱在禁带中的能级分布中发现,相较于未施加应力时界面陷阱的双峰分布,施加应力后产生了新的Pb1中心的双峰。最后,分别从降低擦写电压和对载流子预热的角度提出了三种新的编程方法,有效提高了硅纳米晶存储器件的耐受性。     

基于锗硅异质纳米晶的非易失浮栅存储器的存储特性

利用自组织生长和选择化学刻蚀方法在超薄SiO2隧穿氧化层上制备了渐变锗硅异质纳米晶,并通过电容.电压特性和电容-时间特性研究了该纳米结构浮栅存储器的存储特性.测试结果表明,该异质纳米晶非易失浮栅存储器具有良好的空穴存储特性,这是由于渐变锗硅异质纳米晶中Ge的价带高于Si的价带形成了复合势垒,空穴有效地存储在复合势垒的Ge的一侧.     

基于锗硅异质纳米晶的非易失浮栅存储器的存储特性

利用自组织生长和选择化学刻蚀方法在超薄SiO2隧穿氧化层上制备了渐变锗硅异质纳米晶,并通过电容.电压特性和电容-时间特性研究了该纳米结构浮栅存储器的存储特性.测试结果表明,该异质纳米晶非易失浮栅存储器具有良好的空穴存储特性,这是由于渐变锗硅异质纳米晶中Ge的价带高于Si的价带形成了复合势垒,空穴有效地存储在复合势垒的Ge的一侧.     

Ge/Si复合纳米结构电荷存储特性的模拟研究

这一研究工作模拟计算了 Ge/ Si复合纳米结构 MOSFET存储器的擦写和存储时间特性。结果表明 ,Ge/ Si复合纳米结构存储器在低压下即可实现 μs和 ns量级编程。与 Si纳米结构存储器相比 ,由于 Ge/ Si复合势阱的作用 ,器件的电荷保留时间提高了 3～ 5个量级 ,有效地解决了快速擦写编程与长久存储之间的矛盾 ,使器件的性能得到明显改善。     

纳米晶浮栅存储器的模拟、制备和电学特性

介绍了在纳米晶浮栅存储器数据保持特性方面的研究工作,重点介绍了纳米晶材料的选择与制备和遂穿介质层工程。研究证明,金属纳米晶浮栅存储器比半导体纳米晶浮栅存储器具有更好的电荷保持特性。并且金属纳米晶制备方法简单,通过电子束蒸发热退火的方法就能够得到质量较好的金属纳米晶,密度约4×1011cm-2,纳米晶尺寸约6～7nm。实验证明,高介电常数隧穿介质能够明显改善浮栅存储器的电荷保持特性,所以在引入金属纳米晶和高介电常数遂穿介质之后,纳米晶浮栅存储器可能成为下一代非挥发性存储器的候选者。     

利用同步晶化法制备的镍纳米晶的电荷存储特性

快速退火纳米晶化法是目前常用的金属纳米晶制备方法,但其后续600~900℃高温退火会降低器件的电学特性和可靠性。本文提出了热预算低的金属纳米晶制备的新方法—沉积过程中的同步金属薄膜原位纳米晶化法,可以省掉后续单独的退火处理工艺,使金属薄膜同步产生纳米晶化,降低工艺热功耗及简化工艺,从而有效地改善上述薄膜沉积后退火纳米晶化法的不足。在不同衬底温度（250~325 ?C）下,利用同步纳米晶化法制备镍纳米晶存储器。随着生长温度的增加,其存储窗口先增加到最大值再降低。衬底温度为300 ?C时,其存储窗口（2.78 V）最大。与快速热退火法镍纳米晶存储器相比较,同步纳米晶化法制备镍纳米晶存储器具有更强的电荷存储能力。另外,研究了不同操作电压和脉冲时间下器件的平带电压偏移量,当操作电压增加到±10 V时出现了较大的平带电压偏移量,这表明器件发生了大量的载流子（电子和空穴）注入现象。最后,模拟了金属纳米晶存储器的载流子（电子和空穴）注入和释放过程。     

金属纳米晶快闪存储器研究进展

金属纳米晶具有态密度高、费米能级选择范围广以及无多维载流子限制效应等优越性,预示着金属纳米晶快闪存储器在下一代闪存器件中具有很好的应用前景。从金属纳米晶存储器的工作原理、纳米晶的制备方法、以及新型介质材料和电荷俘获层结构等方面,对金属纳米晶存储器近年来的研究进展进行了总结。     

纳米晶非挥发性存储器研究进展

介绍了纳米晶非挥发性存储器的发展状况和基本工作原理,比较了纳米晶非挥发性存储器所涉及到的各种不同的电荷输运机制,系统介绍了纳米晶非挥发性存储器在纳米晶材料设计、纳米晶晶体生长控制方法、隧穿/控制介质层工程和新型存储器器件结构等方面的一些最新研究进展,对纳米晶非挥发性存储器的研究趋势进行了展望。     

一种适用于低压高速嵌入式应用的2T P沟道纳米晶存储器件

本文基于嵌入式应用的低压、高速要求,提出了一种基于2T结构的P沟道纳米晶存储新型结构。该器件采用带带隧穿激发热电子注入(BTBTIHE)的编程方式,可以同时实现高速、低功耗编程。同时采用2T结构以简化外围高压和读出电路。该器件具有良好的存储特性,包括高编程速度（5us编程脉冲下获得1.1V窗口）和优异的数据保持特性（在10年的保持时间电荷损失仅为20%）。该器件在嵌入式非挥发存储领域具有很强的应用潜力。     

An Ultrafast Nonvolatile Memory with Low Operation Voltage for High-Speed and Low-Power Applications

Memory plays a vital role in modern information society. High-speed and low-power nonvolatile memory is urgently demanded in the era of big data. However, ultrafast nonvolatile memory with nanosecond-timescale operation speed and long-term retention is still unavailable. Herein, an ultrafast nonvolatile memory based on van der Waals heterostructure is proposed, where a charge-trapping material, graphdiyne (GDY), serves as the charge-trapping layer. With the band-engineered heterostructure and excellent charge-trapping capability of GDY, charges are directly injected into the GDY layer and are persistently captured by the trapping sites in GDY, which result in an ultrafast writing speed (8 ns), a low operation voltage (30 mV), and a long retention time (over 10⁴ s). Moreover, a high on/off ratio of 10⁶ is demonstrated by this memory, which enables the achievement of multibit storage with 6 discrete storage levels. This device fills the blank of ultrafast nonvolatile memory technology, which makes it a promising candidate for next-generation high-speed and low-power-consumption nonvolatile memory.     

Low‐Power Nonvolatile Charge Storage Memory Based on MoS2 and an Ultrathin Polymer Tunneling Dielectric

Low‐power, nonvolatile memory is an essential electronic component to store and process the unprecedented data flood arising from the oncoming Internet of Things era. Molybdenum disulfide (MoS₂) is a 2D material that is increasingly regarded as a promising semiconductor material in electronic device applications because of its unique physical characteristics. However, dielectric formation of an ultrathin low‐k tunneling on the dangling bond‐free surface of MoS₂ is a challenging task. Here, MoS₂‐based low‐power nonvolatile charge storage memory devices are reported with a poly(1,3,5‐trimethyl‐1,3,5‐trivinyl cyclotrisiloxane) (pV3D3) tunneling dielectric layer formed via a solvent‐free initiated chemical vapor deposition (iCVD) process. The surface‐growing polymerization and low‐temperature nature of the iCVD process enable the conformal growing of low‐k (≈2.2) pV3D3 insulating films on MoS₂. The fabricated memory devices exhibit a tunable memory window with high on/off ratio (≈10⁶), excellent retention times of 10⁵ s with an extrapolated time of possibly years, and an excellent cycling endurance of more than 10³ cycles, which are much higher than those reported previously for MoS₂‐based memory devices. By leveraging the inherent flexibility of both MoS₂ and polymer dielectric films, this research presents an important milestone in the development of low‐power flexible nonvolatile memory devices.     

Resistance-switching Characteristics of polycrystalline Nb/sub 2/O/sub 5/ for nonvolatile memory application

The resistance switching characteristics of polycrystalline Nb/sub 2/O/sub 5/ film prepared by pulsed-laser deposition (PLD) were investigated for nonvolatile memory application. Reversible resistance-switching behavior from a high resistance state to a lower state was observed by voltage stress with current compliance. The reproducible resistance-switching cycles were observed and the resistance ratio was as high as 50-100 times. The resistance switching was observed under voltage pulse as short as 10 ns. The estimated retention lifetime at 85/spl deg/C was sufficiently longer than ten years. Considering its excellent electrical and reliability characteristics, Nb/sub 2/O/sub 5/ shows strong promise for future nonvolatile memory applications.     

High Performance Flexible Nonvolatile Memory Based on Vertical Organic Thin Film Transistor

Flexible floating‐gate organic transistor memory (FGOTM) is a potential candidate for emerging memory technologies. Unfortunately, conventional planar FGOTM suffers from weak driving ability and insufficient mechanical flexibility, which limits its commercial application. In this work, a novel flexible vertical FGOTM (VFGOTM) is reported. Benefitting from new vertical architecture, VFGOTM provides ultrashort channel length to afford an extremely high current density. Meanwhile, VFGOTM devices exhibit excellent memory performance and outstanding retention property. The memory properties of VFGOTM devices are comparable or even better than traditional planar FGOTM and much better than the reported organic nonvolatile memory with vertical transistor structures. More importantly, organic nonvolatile memory with vertical transistor structures is investigated for the first time on a flexible substrate. The results show that VFGOTM architecture allows vertical current flow across the channel layer to effectively eliminate the effect of mechanical bending during current transport, which significantly improves the mechanical stability of the flexible VFGOTM. Hence, with a combination of excellent driving ability, memory performance, and mechanical stability, VFGOTM devices meet the practical requirements for high performance memory applications, which have great potential for the application in a wide range of flexible and wearable electronics.     

$hbox{HfO}_{x}$ Bipolar Resistive Memory With Robust Endurance Using AlCu as Buffer Electrode

A novel method of fabricating $hbox{HfO}_{x}$-based resistive memory device with excellent nonvolatile characteristics is proposed. By using a thin AlCu layer as the reactive buffer layer into the anodic side of a capacitor-like memory cell, excellent memory performances, which include reliable programming/erasing endurance $(≫ hbox{10}^{5} hbox{cycles})$, robust data retention at high temperature, and fast operation speed ( $≪$ 50 ns), have been demonstrated. The resistive memory based on AlCu/$hbox{HfO}_{x}$ stacked layer in this letter shows promising application in the next generation of nonvolatile memory.      

Characterization of PI:PCBM organic nonvolatile resistive memory devices under thermal stress

In this study, we fabricated nonvolatile organic memory devices using a mixture of polyimide (PI) and 6-phenyl-C61 butyric acid methyl ester (PCBM) (denoted as PI:PCBM) as an active memory material with Al/PI:PCBM/Al structure. Upon increasing the temperature from room temperature to 470 K, we demonstrated the good nonvolatile memory properties of our devices in terms of the distribution of ON and OFF state currents, the threshold voltage from OFF state to ON state transition, the retention, and the endurance. Our organic memory devices exhibited an excellent ON/OFF ratio (I_ON/I_OFF > 10³) through more than 200 ON/OFF switching cycles and maintained ON/OFF states for longer than 10⁴ s without showing any serious degradation under measurement temperatures up to 470 K. We also confirmed the structural robustness under thermal stress through transmission electron microscopy cross-sectional images of the active layer after a retention test at 470 K for 10⁴ s. This study demonstrates that the operation of PI:PCBM organic memory devices could be controlled at high temperatures and that the structure of our memory devices was maintained during thermal stress. These results may enable the use of nonvolatile organic memory devices in high temperature environments.     

Molecular/Nanostructured Functional Metal Oxide Stacks for Nanoscale Nanosecond Information Storage

The metal oxide heterostructures market is exponentially growing, adhering to the trend of achieving fabrication versatility on a vast range of nonconventional electromagnetic and optical properties. A high degree of substrate tolerance and solution‐phase growth potential promise low‐cost flexible electronics and silicon‐based process compatibility. A molecule‐based complex oxide nanostructured stack integrated in an electro‐optically operable nonvolatile two‐terminal capacitive memory element is proposed. The cell demonstrates a remarkably high > 7 V memory window and write–read times down to 10 ns, promising for reliable high‐speed storage. Molecular orbital occupancy through broadband optical stimulus enables simultaneous phononic addressing and boosts the written information amount by up to 37%, achieving 10+ years storage duration. The resulting nonvolatile memories are the first‐documented complementary metal oxide semiconductor (CMOS)‐compatible long‐term‐retention molecular capacitive cell of its kind, implementing inherent structure‐emerging heat management. Great potential emerges for numerous energy‐inspired innovations, enabling functional oxide–molecular hybrids exploitation as high‐end nonvolatile memory products.     

Resistive Switching Characteristics of Sol–Gel Zinc Oxide Films for Flexible Memory Applications

Unipolar resistive switching devices are investigated for nonvolatile memory applications in a metal-insulator-metal structure in which the insulator layer is based on sol–gel-derived zinc oxide (ZnO) films prepared by a simple spin-coating process followed by thermal annealing. Fast programming ( $leq$ 50 ns) and a high off-to-on resistance ratio $(geq hbox{10}^{4})$ is demonstrated. The influences on the switching behaviors according to the crystallinity of the ZnO films are studied as a function of the annealing temperature. In addition, the devices are fabricated on a flexible plastic substrate and exhibit excellent durability upon repeated bending tests, demonstrating their potential for flexible low-cost memory devices.      

Resistive random access memory and its applications in storage and nonvolatile logic

The resistive random access memory (RRAM) device has been widely studied due to its excellent memory characteristics and great application potential in different fields. In this paper, resistive switching materials, switching mechanism, and memory characteristics of RRAM are discussed. Recent research progress of RRAM in high-density storage and nonvolatile logic application are addressed. Technological trends are also discussed.     

Electric Field Gradient-Controlled Domain Switching for Size Effect-Resistant Multilevel Operations in HfO2-Based Ferroelectric Field-Effect Transistor

The ferroelectric field-effect transistor (FeFET) is a promising memory technology due to its high switching speed, low power consumption, and high capacity. Since the recent discovery of ferroelectricity in Si-doped HfO₂ thin films, HfO₂-based materials have received considerable interest for the development of FeFET, particularly considering their excellent complementary metal-oxide-semiconductor (CMOS) compatibility, relatively low permittivity, and high coercive field. However, the multilevel capability is limited by the device size, and multidomain switching tends to vanish when the channel length of the HfO₂-based FeFET approaches 30 nm. Here, multiple nonvolatile memory states are realized by tuning the electric field gradient across the Hf_0.5Zr_0.5O₂ (HZO) ferroelectric thin film along the channel direction of FeFET. The multi-step domain switching can be readily and directionally controlled in the HZO-FeFETs, with a very low variation. Moreover, multiple nonvolatile memory states or multi-step domain switching can be effectively controlled in the FeFETs with a channel length less than 20 nm. This study suggests the possibility to implement multilevel memory operations and mimic biological synapse functions in highly scaled HfO₂-based FeFETs.