数字式可编程脉冲发生器

本文介绍了一种数字式可编程脉冲发生器。其电路简单,性能良好,可用来产生不同占空比的脉冲信号,并具有数字式可编程的功能。     

A Pulse Generator for UWB-IR Based on a Relaxation Oscillator

We propose the adaptation of a well-known relaxation oscillator to produce a modulated Gaussian pulse suitable for ultra-wide-band (UWB) impulse radio (IR). The proposed circuit has low area and low power consumption, can easily be modulated by a digital signal, and requires no special technology options; these features make it suitable for UWB-IR low-cost applications. The circuit behavior is confirmed by simulation and by experimental results on a prototype designed in austriamicrosystems 0.35-mum SiGe-BiCMOS technology.     

一种低功耗OOK/DBPSK超宽带发射机

基于格罗方德0.18 μm CMOS 工艺,提出了一种新型的低功耗OOK/DBPSK超宽带脉冲发射机。采用了简单的结构,极大减少了能量消耗。结果表明,该发射机在2 Mbit/s的数据率下,载波带宽为3~5 GHz,平均功耗仅为270 μW。该发射机可支持的最高数据率为30 Mbit/s。在2~30 Mbit/s数据率下,该发射机可在100 Ω负载上达到1~3.3 V的差分输出峰峰值。该发射机适用于无线局域网,并可提供精确定位支撑。     

MARX发生器在脉冲雷达发射机中的应用

作为一种高压高功率脉冲源,MARX发生器已经在一些领域得到了广泛应用。文中首先将典型的MARX发生器与常用的高压脉冲调制器在性能方面进行了比较,认为该技术在脉冲雷达发射机中也有应用价值;然后,对电感隔离MARX发生器电路进行了详细分析,并重点讨论了该电路在改变脉冲宽度和改变重复频率时的工作状态,给出了在脉冲雷达发射机中应用时的优选工作模式;最后,在一部X波段中频相参脉冲多普勒天气雷达发射机中进行了尝试,获得了满意的结果。     

A Digitally Controlled Variable-Gain Low-Noise Amplifier With Strong Immunity to Interferers

A variable-gain low-noise amplifier with capacitive step attenuators is presented. In order to improve linearity at medium gains settings, digital gain control is performed using a current-splitting technique at the cascode transistors. The fabricated LNA shows an IIP3 increase with constant OIP3, from -1.1 dBm at 25.8 dB gain to 3.5 dBm at 21.2 dB gain. Using capacitive attenuator control, a wide gain range of over 42.7 dB is achieved. Using a 0.5-mum BiCMOS process, the proposed LNA shows an NF of 1.5 dB at 650 MHz and a power consumption of 15.4 mW under 2.9 V supply voltage. The fabricated tuner-IC, including the proposed LNA, satisfies all requirements pertinent to DVB-H reception, with sufficient margins for practical integration. Under typical DVB-H reception scenarios involving strong interferers, measurement results and analytical calculations showed good consistency at various gain settings.     

A CMOS Ultra Low-Power and Highly Efficient UWB-IR Transmitter for WPAN Applications

This brief presents an on–off $LC$ oscillator-based ultrawideband impulse radio (UWB-IR) transmitter for long-range application. A thorough theoretical analysis of the pulse generation is provided. Implemented in a 0.18-$muhbox{m}$ CMOS, the transmitter works in the UWB lower band of 3–5 GHz and consumes an ultralow average power of 236 $muhbox{W}$ at 1.8-V power supply. UWB pulses with a bandwidth of 2 GHz and 10-dB sidelobe suppression are generated. The transmitter can deliver a large differential output swing of 4.9 V under 100-$Omega$ load with the highest power efficiency of 25.4% to date. It is targeted for wireless sensor network (WSNs) and wireless personal area network (WPAN) applications.      

一种数字控制可调增益放大器

介绍了一种基于R-2R梯形电阻网络原理的CMOS数字控制可调增益放大器,放大器的增益由数字信号控制线性调节,增益调节的步长可根据不同需要调整变换,进行高精度的线性增益调节。     

A Digitally Controlled Stimulator for Neurophysiological Applications

A stimulator circuit is presented which is capable of generating pulse train waveforms suitable for neurophysiological experiments are available, as well as special test conditions such as dishabituation. Digital and linear integrated circuits are used to provide precise control over the stimulus parameters.     

程控高压纳秒级电磁脉冲源设计

研制了一种8 kV等级的高压触发放电开关,基于该触发开关设计了一种小型化、程控双指数波高压电磁脉冲源。利用PSpice软件仿真分析了开关杂散参数对输出波形的影响,分析了陡化电容的作用和最优参数,优化了电路设计,实验装置的实测峰值达到8 kV、前沿小于2.8 ns。     

A Digitally Controlled Shunt Capacitor CMOS Delay Line

Delay-controlled CMOS delay lines have been proved useful in a number of applications, notably the digitization of short time intervals. This paper introduces a new kind of CMOS delay line, in which the delay element is an array of capacitors controlled by a digital signal vector. This choice allows for a robust implementation of the circuitry controlling the delay generation, while the maximum speed attainable by the line is high compared to the maximum speed achieved by other delay line architectures. The delay line presented here was designed to produce an accurately tunable 16 × 0.5ns delay under large temperature, supply voltage, and technological process quality variations.     

应用于全数字发射机的射频信号发生器

提出了一种应用于全数字发射机的射频信号发生器。设计中采用高速带通ΣΔ调制技术和对系数量化不敏感的有限长单位脉冲冲激响应(FIR)数字滤波技术,在保证速度和精度的同时,有效降低功耗。芯片采用TSMC65nm1P9M GP CMOS工艺实现。测试结果表明,在1.1V电源电压下,芯片可工作在1.408GHz,单频输入带内信噪比(SNR)为53.19dB。输入不同采样频率WCDMA信号时,调制器输出邻信道功率比(ACPR)均满足相关协议要求,最大功耗为32mW。     

一种用于行波管发射机的宽脉冲调制器

介绍一种宽脉冲调制器的工作原理和设计方法,依照此思路设计的脉冲调制器,对输出脉冲的宽度基本上没有限制.     

高精度宽带数字控制可变增益放大器的设计

设计了一种高精度宽带数字控制可变增益放大器,利用增益加强技术改进可变增益放大器的步进精度;同时,引入零点抵消技术,并加入源极负反馈电容,在不增加额外功耗的条件下,拓展了带宽。该电路采用0.18μm CMOS工艺,1.8V供电电源,增益动态范围为62dB,步进精度为1dB,步进误差为0.2dB。设计的可变增益放大器可以提供高达80MHz的带宽,整个电路消耗1.5mA电流,芯片尺寸为300μm×800μm。     

一种适用于数控锁相环的动态带宽调整算法

为了加快数控锁相环的锁定速度,该文提出了一种适用于数控锁相环的动态带宽调整算法以加快锁定速度。仅当鉴相器鉴出的3次相位差均小于一定边界条件时,该算法才减少数控锁相环的带宽,并当鉴出的相位差超出一定边界条件时,该算法将立即增加带宽。为验证所提出的动态带宽调整算法,该文在MATLAB环境中建立了数控锁相环行为级模型。仿真结果表明,在相同参数情况下,采用该文提出的动态带宽调整算法可使锁定时间缩短至采用传统动态带宽调整技术锁定时间的28.6%~85.7%。最后,该文采用CSM 0.18 m 1P6M CMOS工艺实现数控锁相环并进行实测。实测结果表明,采用该文提出的动态带宽调整算法可快速消除相位差,并使得锁相环始终维持在相位锁定状态。该文提出的动态带宽调整算法,可以有效避免基于相位差调整锁相环频率的局限性,降低错误调整带宽的几率,继而加快锁定速度。     

新型高精度脉冲发生器

本文阐述了一种基于ECL延迟线,利用该延迟线将一路方波信号进行延迟,再与未经延迟的另一路进行逻辑运算原理实现的新型高精度脉冲发生器.该脉冲发生器电路结构简单,脉冲宽度可以从2.2ns到12.2ns连续可调,步进为几十ps,上升沿小于1ns,且具有灵活可编程特点.     

数控高频振荡器的设计

介绍了目前常用的数控延迟单元电路结构,详细分析了这些电路的优缺点.在此基础上,对其中一种电路结构进行了详细的理论分析,改进了电路结构,规范了电路设计的具体步骤,并通过大量的电路模拟,印证了理论分析的正确性.以此延迟单元为核心,在SMIC 0.13μm工艺下,设计实现了一款数控高频振荡器.该振荡器的频率范围高达700 MHz,最高稳定输出频率可达到1 GHz.由于采用全数字实现方式,其功耗最大值不到0.7 mW,版图面积只有26μm×36μm.该电路已成功应用于一个锁相环电路的设计中.     

Low Voltage Digitally Controlled CMOS Current Conveyor

In this paper, a digitally controlled current conveyo(DCCC) is presented. The proposed DCCC is based on rail-to-rail folded cascode implementation with a current division network (CDN). The CDN is used to provide control on the current gain of the DCCC. The CDN uses a novel current division technique based on differential pairs. The proposed DCCC can operate from ±1.5 V supply voltages. Applications of the proposed DCCC such as variable gain amplifiers (VGA) and digitally tunedfilters have been investigated. PSpice simulations based on the AMI 1.2 µm N-well level 3 parameters are in agreement with the presented work.     

基于数字控制方式的DC-DC转换器系统设计

文章给出了应用于高频数字控制DC—DC系统设计的两种方法。基于功率级的S域平均模型,采用传统的Redesign方法,得到数字PID控制的系统离散模型。针对数字PID控制的DC-DC系统的负载调节能力,提出了一种采用Direct—Digital方法实现的三阶数字控制器。基于Matlab／Simulink的系统仿真结果表明,当负载电流在500mA到1A跳变时,提出的三阶补偿系统的最大过;中电压160mV,稳定时间为30μs,相比二阶PID补偿系统竹过冲为450mV,稳定时间为110μs,负载调节性能得到很大的改善;同时,当输入电压在1μs内从3V跳变到5V时,三阶补偿系统的过;中电压和稳定时间分别为450mV和45μs,相比二阶补偿系统的过冲为610mV,稳定时间115μs,线性调节能力也得到较大改善。     

50-W LTCC Transmitter Utilizing 28-V GaAs With Integrated High-Speed Pulse Modulation

This letter presents an S-band 50-W low-temperature cofired ceramic (LTCC) transmitter module. The module is based on a gallium arsenide (GaAs) chipset that operates over the 2–3 GHz range and includes a 28-V single-chip power amplifier with integrated high-speed drain modulator. The transmitter has rise/fall times $≪$ 7 nsec, linear frequency tuning, and excellent thermal performance.      

数字控制振荡器的设计和顶层模型

采用0.18 μm CMOS六层金属工艺,利用带中心抽头的对称螺旋电感和新型电容调谐阵列构成的LC谐振回路,设计并实现了一种低功耗低相位噪声的数字控制振荡器(DCO).流片测试结果表明,相位噪声在1 MHz偏移频率处为-119.77 dBc/Hz.电路采用1.8V电源供电,消耗约4.9mA电流,当电源电压降到1.6V时,消耗约4.1 mA的核心电路电流,此时,相位噪声在1 MHz频偏处仍达到-119.1 dBc/Hz.为了提高全数字锁相环设计效率,采用硬件描述语言,构建了一种适用于全数字锁相环的仿真模型.该模型能大大缩短早期系统级架构选择和算法级行为验证的时间.