Monolithic Integration of a Folded Dipole Antenna With a 24-GHz Receiver in SiGe HBT Technology

The integration of an on-chip folded dipole antenna with a monolithic 24-GHz receiver manufactured in a 0.8-mum SiGe HBT process is presented. A high-resistivity silicon substrate (1000 Omega ldr cm) is used for the implemented circuit to improve the efficiency of the integrated antenna. Crosstalk between the antenna and spiral inductors is analyzed and isolation techniques are described. The receiver, including the receive and an optional transmit antenna, requires a chip area of 4.5 mm² and provides 30-dB conversion gain at 24 GHz with a power consumption of 960 mW.     

79 GHz Slot Antennas Based on Substrate Integrated Waveguides (SIW) in a Flexible Printed Circuit Board

The design, fabrication and characterization of 79 GHz slot antennas based on substrate integrated waveguides (SIW) are presented in this paper. All the prototypes are fabricated in a polyimide flex foil using printed circuit board (PCB) fabrication processes. A novel concept is used to minimize the leakage losses of the SIWs at millimeter wave frequencies. Different losses in the SIWs are analyzed. SIW-based single slot antenna, longitudinal and four-by-four slot array antennas are numerically and experimentally studied. Measurements of the antennas show approximately 4.7%, 5.4% and 10.7% impedance bandwidth (${rm S}_{11}=-10$ dB) with 2.8 dBi, 6.0 dBi and 11.0 dBi maximum antenna gain around 79 GHz, respectively. The measured results are in good agreement with the numerical simulations.      

A 94-GHz aperture-coupled micromachined microstrip antenna

This paper presents an aperture-coupled micromachined microstrip antenna operating at 94 GHz. The design consists of two stacked silicon substrates: (1) the top substrate, which carries the microstrip antenna, is micromachined to improve the radiation performance of the antenna and (2) the bottom substrate, which carries the microstrip feed line and the coupling slot. The measured return loss is -18 dB at 94 GHz for a 10-dB bandwidth of 10%. A maximum efficiency of 58±5% has been measured and the radiation patterns show a measured front-to-back ratio of -10 dB at 94 GHz. The measured mutual coupling is below -20 dB in both E- and H-plane directions due to the integration of small 50-μm silicon beams between the antennas. The micromachined microstrip antenna is an efficient solution to the vertical integration of antenna arrays at millimeter-wave frequencies     

A 24 GHz 6-Bit CMOS Phased-Array Receiver

This letter presents a 24 GHz 6 b phased-array receiver implemented in 0.13 mum CMOS. This design is based on a novel active vector generator that results in wideband quasi-quadrature vectors, which are used to synthesize the desired phase response. The active phase shifter has measured rms gain and phase errors of <0.5 dB and < 2.8deg at 23-24.4 GHz, resulting in a 6 b resolution. The phased-array receiver has a gain of 14 dB, a NF of 6 dB, a 3-dB gain bandwidth of 4.7 GHz and wideband input and output match. The chip consumes 30 mA from a 1.5 V supply with dimensions of 0.66 times 1.25 mm² including pads (0.5 times 1 mm² without pads).     

Compact uniplanar antenna for WLAN applications

A compact dual-band uniplanar antenna for operation in the 2.4/5.2/5.8 GHz WLAN/HIPERLAN2 communication bands is presented. The dual-band antenna is obtained by modifying one of the lateral strips of a slot line, thereby producing two different current paths. The antenna occupies a very small area of 14.5times16.6 mm² including the ground plane on a substrate having dielectric constant 4.4 and thickness 1.6 mm at 2.2 GHz. The antenna resonates with two bands from 2.2 to 2.52 GHz and from 5 to 10 GHz with good matching, good radiation characteristics and moderate gain     

A Fully Differential Monolithic LNA With On-Chip Antenna for a Short Range Wireless Receiver

This letter presents the smallest reported 5 GHz receiver chip (1.3 mm²) with an on-chip antenna in standard 0.13 mum CMOS process. The miniaturization is achieved by placing the circuits inside a meandered antenna. The on-chip antenna is conjugately matched to the low noise amplifier (LNA) over a wide frequency range. The design methodology for co-design of the on-chip antenna and LNA is described. The LNA is completely differential, consumes only 8 mW of power and provides a gain of 21 dB. Design tradeoffs and measurement challenges are given.     

基于S-PIN二极管的频率可重构缝隙芯片天线研究

为了实现高度集成化的片上可重构天线系统,利用硅基固态等离子体表面PIN(S-PIN)二极管技术,设计了一种C—Ku波段频率可重构的领结型缝隙芯片天线。文中讨论了利用S-PIN二极管作为芯片天线频率可重构部件的设计标准,并对S-PIN二极管的结构参数进行了分析。通过控制S-PIN二极管的截止/导通状态,提出的缝隙芯片天线可以实现从6.7 GHz到17.97 GHz的工作频率可重构,增益分别为4.63 dBi和3.4 dBi。在实际的流片和测试过程中发现,文中研制的S-PIN二极管具有良好的伏安特性。此外,固态等离子体天线工作在C波段和Ku波段时的实际中心工作频点分别位于6.6 GHz和17.9 GHz,与仿真结果相比具有良好的一致性,验证了S-PIN二极管在制造频率可重构芯片天线方面的潜力。     

Broadband multilayer ceramic chip antenna for handsets

A novel broadband and small multilayer ceramic chip antenna has been designed and investigated. The proposed antenna has a small size of 14×2.4×1 mm³. A wide bandwidth of 33% (VSWR<2.0) has been obtained, and the measured antenna gain has an average value of ~1.2 dBi. These characteristics make the proposed antenna applicable to future mobile handsets     

A 20 to 24 GHz $+$16.8 dBm Fully Integrated Power Amplifier Using 0.18 $mu{rm m}$ CMOS Process

A 20-24 GHz, fully integrated power amplifier (PA) with on-chip input and output matching is realized in 0.18 mum standard CMOS process. By cascading two cascode stages, the PA achieves 15 dB small signal gain, 10.7% power added efficiency, 16.8 dBm output saturation power and high power density per chip area of 0.137 W/mm², which is believed to be the highest power density to our knowledge. The whole chip area with pads is 0.35 mm², which is the smallest one compared to all reported paper.     

Compact multielement Marconi-Franklin type printed antennas for millimeter wireless systems

Two novel Marconi-Franklin type printed antenna arrays, each consisting of three radiating elements arranged in a cascade configuration, are investigated. Both antennas are printed on a single high permittivity dielectric substrate and fed by SMA connectors, although coplanar waveguide (CPW) feed could easily be applied to further allow easier integration into an RF chip module. Two constructed prototypes, suitable for local-multipoint-distribution service operation in the 26-GHz band (25.5-26.5 GHz), are demonstrated. The constructed prototypes show an impedance bandwidth of about 1 GHz and a maximum gain of more than 5 dBi, with small variations (<1.8 dBi), is obtained across the achieved impedance bandwidth. Details of theoretical and experimental results showing impedance and radiation characteristics for both prototype antennas are given and discussed.     

A wideband high gain dielectric resonator antenna for RF energy harvesting application

A novel high gain and broadband hybrid dielectric resonator antenna (DRA) is designed and experimentally validated. To obtain the wide impedance bandwidth, the proposed antenna geometry combines the dielectric resonator antenna and an underlying slot with a narrow rectangular notch, which effectively broadens the impedance bandwidth by merging the resonances of the slot and DRA. An inverted T-shaped feed line is used to excite both antennas, simultaneously. It supports amalgamation of different resonant modes of the both, DRA and slot antenna. The measured results show that the proposed antenna offers an impedance bandwidth of 120% from 1.67 to 6.7 GHz. The antenna gain is next enhanced by a reflector placed below the antenna at an optimum distance. On engineering the height and dimension of this reflector the antenna gain is improved from 2.2 dBi to 8.7 dBi at 1.7 GHz. Finally, antenna operation is attested experimentally with a rectifier circuit in the frequency range of 1.8–3.6 GHz, where various strong radio signals are freely available for RF energy harvesting. The measured maximum efficiency of the rectifier and rectenna circuit were found to be 74.4% and 61.4%, respectively.     

A 2–40 GHz Probe Station Based Setup for On-Wafer Antenna Measurements

A probe station based setup for on-wafer antenna measurements is presented. The setup allows for measurement of return loss and radiation patterns of an on-wafer antenna-hence-forth referred to as the antenna under test (AUT), radiating at broadside and fed through a coplanar waveguide (CPW). It eliminates the need for wafer dicing and custom-built test fixtures with coaxial connectors or waveguide flanges by contacting the AUT with a coplanar microwave probe. In addition, the AUT is probed exactly where it will be connected to a transceiver IC later on, obviating de-embedding of the measured data. Sources of measurement errors are related to calibration, insufficient dynamic range, misalignment, forward scattering from nearby objects, and vibrations. The performance of the setup is demonstrated from 2 to 40 GHz through measurement of an on-wafer electrically small slot antenna (lambda₀/35 times lambda₀/35,3.5 times 3.5 mm²) radiating at 2.45 GHz and an aperture coupled microstrip antenna (2.4 times 1.7 mm²) radiating at 38 GHz.     

On a Broadband Elevated Suspended-Plate Antenna with Consistent Gain

A design concept for elevating suspended-plate radiators is presented in this paper. The proposed antenna comprises two radiators connected by a folded feeding structure. The folded structure suppresses the occurrence of higher-order modes when the height of the antenna is elevated beyond 10% of the free-space wavelength, lambda₀ . The broadband radiating mechanism is explained. Both the simulation and measurement results show that a consistent gain of 7.2 dBi to 8.5 dBi is achieved over a frequency range of 2.3 GHz to 3.6 GHz, namely within a 44% impedance bandwidth for |S₁₁|< -10 dB. The concept is used to design two cost-effective broadband antennas covering both WLAN and WiMAX operations.     

新型WLAN平面倒F双频天线的设计

提出了一种新型的应用于2.4/5GHz蓝牙和无线局域网的双频内置平面倒F天线。该天线结构紧凑,可以方便地植入无线通信设备中,有较强的实用性。通过加载F形槽和阶梯形槽使天线能够满足无线局域网中小型化双频天线的技术要求。天线在蓝牙频段阻抗带宽达到300MHz(2.21~2.51GHz),在无线局域网频段阻抗带宽达到1070MHz(4.95~6.02GHz),辐射方向图表明该天线全向性能较好,增益在3.1~6.7dBi范围内。     

Broadband circularly-polarised Spidron fractal slot antenna

A broadband circularly-polarised fractal antenna is proposed, designed, and tested. The concept of a novel Spidron fractal system is employed to achieve both broadband and circular-polarisation characteristics. Presented is the first known application of a Spidron fractal to antenna design. A simple 50 ω microstrip line is used to excite the Spidron-shaped slot. The total dimensions of the fabricated antenna are 40 X 40 X 1.52 mm³. The measured -10 dB return loss bandwidth and the 3 dB axial ratio bandwidth are 78.3 and 15.2%, respectively. The peak gain of the antenna is 4.3 dBi.     

A DC-11.5 GHz Low-Power, Wideband Amplifier Using Splitting-Load Inductive Peaking Technique

A DC-11.5 GHz low-power amplifier is developed in commercial 0.13 mum, CMOS technology. This amplifier design is based on a three-stage shunt-feedback inverter-configuration with splitting load inductive peaking technique. The peaking inductor is placed at the gate of the nMOS to compensate gain roll-off of the inverter stage and extend its operating bandwidth. This amplifier achieves a gain flatness of 13.21 dB from dc to 11.5 GHz with I/O return losses better than 17 dB at a power consumption of 9.1 mW. The measured noise figure is less than 5.6 dB between 1-11 GHz. The output P1 dB is 8 dBm and input third-order intercept point is 10 dBm. The total chip size is 0.34 mm² including all testing pads, with a core area of only 0.08 mm².     

加载对拓结构介质的高增益Vivaldi天线

Vivaldi天线属于渐变缝隙天线的一种, 被广泛应用于平面超宽带天线设计中.Vivaldi天线在理论上可以展宽带宽到无限大, 但受限于加工工艺和尺寸, 其增益提高效果并不明显.文中立足于经典Vivaldi天线, 在天线辐射前端加载对拓结构的介质, 仿真结果表明相对带宽扩展了79.1%, 在5.5 GHz与12 GHz处提高增益达3 dBi.过孔矫正技术可以使天线辐射的相位分布更加均匀, 提高幅度分布的口径效率.在对拓结构基础上, 天线辐射端加载相位矫正的过孔阵列结构, 仿真结果表明加载该技术后, 天线提高增益2 dBi以上.包含以上两种技术的天线结构具有高增益、便于设计、小型化的特点, 这为端射天线提高增益和增强定向性提供了新的思路.     

A 1 Tb/s 3 W Inductive-Coupling Transceiver for 3D-Stacked Inter-Chip Clock and Data Link

A 1 Tb/s 3 W inter-chip transceiver transmits clock and data by inductive coupling at a clock rate of 1 GHz and data rate of 1 Gb/s per channel. 1024 data transceivers are arranged with a pitch of 30 mum in a layout area of 1 mm². The total layout area including 16 clock transceivers is 2 mm² in 0.18 mum CMOS and the chip thickness is reduced to 10 mum. Bi-phase modulation (BPM) is employed for the data link to improve noise immunity, reducing power in the transceiver. Four-phase time division multiple access (TDMA) reduces crosstalk and the bit-error rate (BER) is lower than 10^-13     

A 77-GHz Phased-Array Transceiver With On-Chip Antennas in Silicon: Receiver and Antennas

In this paper, we present the receiver and the on-chip antenna sections of a fully integrated 77-GHz four-element phased-array transceiver with on-chip antennas in silicon. The receiver section of the chip includes the complete down-conversion path comprising low-noise amplifier (LNA), frequency synthesizer, phase rotators, combining amplifiers, and on-chip dipole antennas. The signal combining is performed using a novel distributed active combining amplifier at an IF of 26 GHz. In the LO path, the output of the 52-GHz VCO is routed to different elements and can be phase shifted locally by the phase rotators. A silicon lens on the backside is used to reduce the loss due to the surface-wave power of the silicon substrate. Our measurements show a single-element LNA gain of 23 dB and a noise figure of 6.0dB. Each of the four receive paths has a gain of 37 dB and a noise figure of 8.0 dB. Each on-chip antenna has a gain of +2 dBi     

Dielectric Resonator Antenna on Silicon Substrate for System On-Chip Applications

This paper presents for the first time the design and performance of a novel integrated dielectric resonator antenna fabricated on a high conducting silicon substrate for system on-chip applications. A differential launcher to excite the ${rm TE}_{01delta}$ mode of the high permittivity cylindrical dielectric resonator was fabricated using the IBM SiGeHP5 process. The proposed antenna integrated on a silicon substrate of conductivity 7.41 S/m has an impedance bandwidth of 2725 MHz at 27.78 GHz, while the achieved gain and radiation efficiency are 1 dBi and 45% respectively. The design parameters were optimized employing Ansoft HFSS simulation software. Very good agreement has been observed between simulation and experimental results. The results demonstrate that integration of dielectric resonator antennas on silicon is viable, leading to the fabrication of high efficient RF circuits, ultra miniaturization of ICs and for the possible integration of active devices.