Status of Te-rich and Hg-rich liquid phase epitaxial technologies for the growth of (Hg,Cd)Te alloys

In this review, we summarize the progress to-date in the technology of Hg_1−xCd_xTe liquid phase epitaxial growth from Hg-rich and Te-rich solutions. Areas of research which need to be pursued to further improve the state of the art in device performance are discussed.     

MWIR DLPH HgCdTe photodiode performance dependence on substrate material

Mid wavelength infrared p-on-n double layer planar heterostructure (DLPH) photodiodes have been fabricated in HgCdTe double layers grown in situ by liquid phase epitaxy (LPE), on CdZnTe and for the first time on CdTe/sapphire (PACE-1). Characterization of these devices shed light on the nature of the material limits on device performance for devices performing near theoretical limits. LPE double layers on CdZnTe and on PACE-1 substrates were grown in a horizontal slider furnace. All the photodiodes are p-on-n heterostructures with indium as the n-type dopant and arsenic the p-type dopant. Incorporation of arsenic is via implantation followed by an annealing step that was the same for all the devices fabricated. The devices are passivated with MBE CdTe. Photodiodes have been characterized as a function of temperature. R₀A_imp values obtained between 300 and 78K are comparable for the two substrates and are approximately a factor of five below theoretical values calculated from measured material parameters. The data, for the PACE-1 substrate, indicates diffusion limited performance down to 110K. Area dependence gives further indications as to the origin of diffusion currents. Comparable R₀A_imp for various diode sizes indicates a p-side origin. R₀A and optical characteristics for the photodiodes grown on lattice-matched CdZnTe substrates and lattice mismatched PACE-1 are comparable. Howover, differences were observed in the noise characteristics of the photodiodes. Noise was measured on 50 × 50 μm devices held under a 100 mV reverse bias. At 110K, noise spectrum for devices from the two substrates is in the low 10⁻¹⁵ A/Hz^1/2 range. This value reflects the Johnson noise of the room temperature 10¹⁰ Ω feedback resistor in the current amplifier that limits the minimum measurable noise. Noise at 1 Hz, −100 mV and 120K for the 4.95 μm PACE-1 devices is in the 1–2 × 10⁻¹⁴ A/Hz^1/2, a factor of 5–10 lower than previously grown typical PACE-1 n⁺-on-p layers. Noise at 120K for the 4.60 μm PACE-1 and LPE on CdZnTe was again below the measurement technique limit. Greatest distinction in the noise characteristics for the different substrates was observed at 163K. No excess low frequency noise was observed for devices fabricated on layers grown by LPE on lattice-matched CdZnTe substrates. Photodiode noise measured at 1Hz, −100 mV and 163K in the 4.60 μm PACE-1 layer is in the 1–2×10⁻¹³ A/Hz^1/2, again a factor of 5–10 lower than previously grown PACE-1 n⁺-on-p layers. More variation in noise (4×10⁻¹³−2×10⁻¹² A/Hz^1/2) was observed for devices in the 4.95 μm PACE-1 layer. DLPH devices fabricated in HgCdTe layers grown by LPE on lattice-matched CdZnTe and on lattice-mismatched PACE-1 have comparable R₀A and quantum efficiency values. The distinguishing feature is that the noise is greater for devices fabricated in the layer grown on lattice mismatched substrates, suggesting dislocations inherent in lattice mismatched material affects excess low frequency noise but not zero bias impedance.     

Investigation of the cross-hatch pattern and localized defects in epitaxial HgCdTe

The cross-hatch pattern in epitaxial HgCdTe layers grown by Hg-melt LPE on (111) CdZnTe substrates has been investigated by several means including x-ray topography. Whenever present, the pattern is detectable by x-ray, being aligned along the 〈110〉 directions in the surface plane with a spacing of about 100 to 200 μm. A surface-relief manifestation of the cross hatch, however, exhibits the same orientation but with a smaller spacing. A surface pattern having only 10 nm of relief was found by optical profilometry mapping. Misfit dislocations are displaced from the layer/substrate interface and appear to follow the same symmetry but do not have the same spacing as the other features. The mechanisms interrelating the cross-hatch phenomena and connecting them to cross hatches in detector array performance are difficult to identify. In addition, an array of photovoltaic LWIR HgCdTe detectors in MBE-grown HgCdTe was examined in detail according to a failure analysis protocol, in order to characterize the material defects and correlate them with pixels that have higher than normal leakage current. Large, medium, and small morphological defects, were seen before and after decorative etching. The large kind are most likely the funnel-shaped “void” defects, and are accompanied by several dislocations. About 63% of the failed diodes contained observable material defects.     

Direct growth of CdZnTe/Si substrates for large-area HgCdTe infrared focal plane arrays

Direct epitaxial growth of high-quality 100lCdZnTe on 3 inch diameter vicinal {100}Si substrates has been achieved using molecular beam epitaxy (MBE); a ZnTe initial layer was used to maintain the {100} Si substrate orientation. The properties of these substrates and associated HgCdTe layers grown by liquid phase epitaxy (LPE) and subsequently processed long wavelength infrared (LWIR) detectors were compared directly with our related efforts using CdZnTe/ GaAs/Si substrates grown by metalorganic chemical vapor deposition (MOCVD). The MBE-grown CdZnTe layers are highly specular and have both excellent thickness and compositional uniformity. The x-ray full-width at half-maximum (FWHM) of the MBE-grown CdZnTe/Si increases with composition, which is a characteristic of CdZnTe grown by vapor phase epitaxy, and is essentially equivalent to our results obtained on CdZnTe/GaAs/Si. As we have previously observed, the x-ray FWHM of LPE-grown HgCdTe decreases, particularly for CdZnTe compositions near the lattice matching condition to HgCdTe; so far the best value we have achieved is 54 arc-s. Using these MBE-grown substrates, we have fabricated the first high-performance LWIR HgCdTe detectors and 256 x 256 arrays using substrates consisting of CdZnTe grown directly on Si without the use of an intermediate GaAs buffer layer. We find first that there is no significant difference between arrays fabricated on either CdZnTe/Si or CdZnTe/GaAs/Si and second that the results on these Si-based substrates are comparable with results on bulk CdZnTe substrates at 78K. Further improvements in detector performance on Si-based substrates require a decrease in the dislocation density.     

CdZnTe中富碲沉积相缺陷引起的液相外延HgCdTe薄膜表面缺陷

为了研究液相外延碲镉汞薄膜表面缺陷形成机制,采用光刻工艺结合化学腐蚀方法在碲锌镉衬底表面实现了网格化,研究了碲锌镉近表面富碲沉积相与外延薄膜表面缺陷的关系.结果表明:衬底近表面富碲沉积相会导致碲镉汞薄膜表面孔洞、类针形凹陷坑缺陷以及三角形凹陷坑聚集区;在液相外延过程中,高温碲镉汞熔液与CdZnTe衬底间的回熔作用可以减少与富碲沉积相相关的表面缺陷,薄膜表面缺陷与衬底表面富碲沉积相的匹配度与回熔深度负相关;回熔过程以及富碲沉积相形态、深度影响HgCdTe薄膜表面缺陷形态和分布.     

Strain relief in epitaxial HgCdTe by growth on a reticulated substrate

In nearly all cases when an epitaxial layer of HgCdTe is grown on a CdZnTe substrate, there will be a finite lattice mismatch due to the lack of precise control over the ZnTe mole fraction. This leads to strains in the layer, which can be manifested in one or more ways: (1) as misfit dislocations near the interface, (2) as threading dislocations, (3) as surface topographical textures, and (4) as cross-hatch lines seen by x-ray topography. We have found that much of the strain can be relieved by growing on a reticulated substrate. Specifically, when the substrate has been etched to form mesas prior to growth of the layer, the resulting layer on the tops of the mesas shows evidence of significantly reduced strain. CdZnTe substrates oriented (111)A were prepared with two sets of mesas on 125 μm centers and 60 μm centers, and with other planar areas remaining for comparison. From a Hg melt, a layer of LWIR HgCdTe was grown about 16 μm thick on each substrate. Nomarski microscopy showed that the layers on the mesa tops were extremely flat, showing no sign of curvature or surface texture. X-ray topography showed no cross hatch on the mesa tops, while the usual cross hatch appeared in the planar regions. The LPE layer extended laterally beyond the edges of the original mesa because of faster growth in non-(111) directions. Samples were cleaved and examined in cross section. The linear density of etch pits seen in the cross section near the substrate, which represent misfit dislocations, was three times lower in the layer on the mesas than in the layer in the unpatterned region, although both regions have the same layer/substrate lattice mismatch. When an epilayer is grown on an unpatterned wafer (the conventional approach), the growth in any small region is confined laterally by the growing layer in the neighboring regions. However, when growth occurs on a reticulated surface, the lateral confinement is removed, providing strain relief and fewer defects.     

CdZnTe substrate impurities and their effects on liquid phase epitaxy HgCdTe

Impurity levels were tracked through the stages of substrate and liquid phase epitaxy (LPE) layer processing to identify sources of elements which degrade infrared photodetector performance. Chemical analysis by glow discharge mass spectrometry and Zeeman corrected graphite furnace atomic absorption effectively showed the levels of impurities introduced into CdZnTe substrate material from the raw materials and the crystal growth processes. A new purification process(in situ distillation zone refining) for raw materials was developed, resulting in improved CdZnTe substrate purity. Substrate copper contamination was found to degrade the LPE layer and device electrical properties, in the case of lightly doped HgCdTe. Anomalous HgCdTe carrier type conversion was correlated to certain CdZnTe and CdTe substrate ingots.     

Molecular-beam epitaxial growth and high-temperature performance of HgCdTe midwave infrared detectors

Results are reported on the molecular-beam epitaxial (MBE) growth and electrical performance of HgCdTe midwave-infrared (MWIR) detector structures. These devices are designed for operation in the 140–160 K temperature range with cutoff wavelengths ranging from 3.4–3.8 μm at 140 K. Epitaxial structures, grown at 185°C on (211)B-oriented CdZnTe substrates, consisting of either conventional two-layer P-n configurations or three-layer P-n-N configurations, were designed to examine the impact of device performance on variation of the n-type base layer (absorber) thickness and the inclusion or omission of an underlying wide-bandgap buffer layer. Devices were grown with absorber thicknesses of 3 μm, 5 μm, and 7 μm to examine the tradeoff between the spectral response characteristic and the reverse-bias electrical performance. In addition, 5-μm-thick, wide-bandgap HgCdTe buffer layers, whose CdTe mole fraction was approximately 0.1 larger than the absorber layer, were introduced into several device structures to study the effect of isolating the device absorbing layer from the substrate/growth initiation interface. The MBE-grown epitaxial wafers were processed into passivated, mesa-type, discrete device structures and diode mini arrays, which were tested for temperature-dependent R₀A product, quantum efficiency, spectral response, and the I-V characteristic at temperatures close to 140 K. External quantum efficiencies of 75–79% were obtained with lateral optical-collection lengths of 7 μm. Analysis of the temperature dependence of the diode R₀A product indicates that the device impedance is limited by the diffusion current at temperatures above 140 K with typical R₀A values of 2×10⁶ Ω cm² for a detector cutoff of 3.8 μm at 140 K. An alloy composition anomaly at the absorbing-layer/buffer-layer interface is believed to limit the observed R₀A products to values approximately one order of magnitude below the theoretical limit projected for radiatively limited carrier lifetime. Device electrical performance was observed to be improved through incorporation of a wide-bandgap buffer layer and through reduction of the absorbing layer thickness. An optimum spectral response characteristic was observed for device structures with 5-μm-thick absorbing layers.     

Molecular-beam epitaxial growth of HgCdTe infrared focal-plane arrays on silicon substrates for midwave infrared applications

Molecular beam epitaxy has been employed to deposit HgCdTe infrared detector structures on Si(112) substrates with performance at 125K that is equivalent to detectors grown on conventional CdZnTe substrates. The detector structures are grown on Si via CdTe(112)B buffer layers, whose structural properties include x-ray rocking curve full width at half maximum of 63 arc-sec and near-surface etch pit density of 3–5 × 10⁵ cm⁻² for 9 μm thick CdTe films. HgCdTe p⁺-on-n device structures were grown by molecular beam epitaxy (MBE) on both bulk CdZnTe and Si with 125K cutoff wavelengths ranging from 3.5 to 5 μm. External quantum efficiencies of 70%, limited only by reflection loss at the uncoated Si-vacuum interface, were achieved for detectors on Si. The current-voltage (I-V) characteristics of MBE-grown detectors on CdZnTe and Si were found to be equivalent, with reverse breakdown voltages well in excess of 700 mV. The temperature dependences of the I-V characteristics of MBE-grown diodes on CdZnTe and Si were found to be essentially identical and in agreement with a diffusion-limited current model for temperatures down to 110K. The performance of MBE-grown diodes on Si is also equivalent to that of typical liquid phase epitaxy-grown devices on CdZnTe with R₀A products in the 10⁶–10⁷ Θ-cm² range for 3.6 μm cutoff at 125K and R₀A products in the 10⁴–10⁵ Θ-cm² range for 4.7 μm cutoff at 125K.     

Investigation of high quality GaAs:In layers grown by liquid phase epitaxy

Indium-doped GaAs layers are investigated by low-field Hall effect, photoluminescence, and double crystal x-ray diffraction in order to study the influence of the In concentration on the electrical, optical, and crystallographic properties. The layers were grown by liquid phase epitaxy from solution with In concentrations in the range 0–10 at.%. It was found that epitaxial growth from the melt with 7 at.% In content produces the highest quality epitaxial layers.     

Vapor phase growth of Hg1−xCdx Te epitaxial layers

Epitaxial layers of Hg_1−xCd_xTe have been grown on CdTe substrates by a new vapor-phase method which yields compositions covering the entire alloy range (0≤x≤1). Independent control of the four principal parameters that determine the composition — the substrate temperature (400-550‡G) and the partial pressures of Hg, Cd and Te — is achieved in an open-tube system that utilizes separate elemental sources. The choice of growth parameters is discussed in terms of a model that treats the deposition of the alloys as the simultaneous deposition of HgTe and CdTe. In the direction perpendicular to the layer surface there is an initial region of uniform alloy composition, followed by a graded region extending to the substrate. Absorption edge measurements showed the composition parallel to the surface to be quite uniform. All the layers are n-type, with carrier concentrations of 10¹⁶-10¹⁷/cm³ to a depth of several micrometers, below which there is a region of greatly reduced concentration extending into the substrate.     

Formation and control of defects during molecular beam epitaxial growth of HgCdTe

Void defects were demonstrated to form away from the substrate-epifilm interface during the molecular beam epitaxial growth of mercury cadmium telluride on cadmium zinc telluride substrates. These were smaller in size compared to voids which nucleated at the substrate-epifilm interface, which were also observed. Observations of void nucleation away from the substrate-epifilm interface were related to the respective growth regimes active at the time of the void nucleation. Once nucleated, voids replicated all the way to the surface even if the flux ratios were modified to prevent additional nucleation of voids. For a significant number of films, void defects were observed co-located with hillocks. These voids were usually smaller than 1 μm and appeared almost indistinguishable from unaccompanied simple voids. However, these void-hillock complexes displayed a nest of dislocation etch pits around these defects upon dislocation etching, whereas unaccompanied voids did not. The nests could extend as much as 25 μm from the individual void-hillock complex. The density of dislocations within the nest exceeded 5×10⁶ cm⁻², whereas the dislocation density outside of the nest could decrease to <2×10⁵ cm⁻². The void-hillock complexes formed due to fluctuations in growth parameters. Elimination of these fluctuations drastically decreased the concentrations of these defects.     

Automated lifetime monitoring for factory process control

A methodology is described for using automated lifetime measurements as a diagnostic tool and process monitor in the fabrication of HgCdTe detectors. The influence of background flux on the accuracy of these measurements is quantified using a new high-level injection model. Automated lifetime testing, applied to a large set of anneal experiments, has identified a mid-gap recombination center that is repeatably generated by quenching after the stoichiometric anneal. Lifetime reduction associated with this center is found to correlate both with the degree of compensation and with the amount of indium dopant. Passivation with CdTe is found effective in mitigating the effect.     

液相外延生长过程中外延层厚度的卷积计算方法

讨论了液相外延生长过程中外延层厚度与生长条件的关系.在生长速率决定于溶质扩散的前提下,推导出了外延层厚度的卷积表达式.利用这一表达式,可以得出不同液相外延工艺中外延层厚度与生长时间、冷却速率的关系.并且,外延层厚度的卷积算法可以应用于更为复杂的生长条件,例如:非均匀的降温速率、非线性的液相线形状以及有限的生长溶液等.     

The influence of supercooling on the liquid phase epitaxial growth of inas1−xsbx on (100) GASB substrates

The growth by liquid-phase epitaxy of InAs_1−x Sb _x (x = 0.08-0.16) on GaSb was accomplished by using melts of constant arsenic concentration x _As ^L = 0.014. The study of the influence of the degree of supercooling ΔT on the crystal growth was investigated. The strong tendency of the In-As-Sb liquid to dissolve the GaSb substrate was resolved by using high ΔT (20-30° C) for layers having a positive lattice-mismatch Δa/a more than 1.5 x 10⁻³. As positive lattice-mismatch becomes smaller, a larger supersaturation is required to control the substrate dissolution. But owing to the bulk nucleation which restricts the supercooling ΔT at values near 30° C, the growth of epitaxial layers with small lattice-mismatch (until - 5 × 10⁻⁴) was achieved only from time to time. It was observed that an increase of ΔT increases the concentration of antimony in the epilayers and hence leads to the lattice-mismatch. The dislocation etch pit density was found to be only dependent on the lattice-mismatch. The thickness of the grown layers is proportional to ΔT xt ^1/2 with a factorK = 0.025 μm . °C⁻² . s^−1/2     

A new LPE growth method of semiconductor heterostructures with thickness profile variation of epitaxial layers

We have investigated and developed a method for the LPE growth of layers with approximately parabolic cross section. The channels were created during the growth process by modulating the liquid phase thickness with W or Mo wires parallel to the substrate. The main parameters of the channel can be controlled by changing the wire’s diameter and its distance from the substrate. This method can be incorporated directly into the growth process of a laser structure with an unstable resonator without the need of additional treatments as chemical etching, to produce the channel structure.     

Properties of Bi-doped PbTe layers grown by liquid phase epitaxy under controlled Te vapor pressure

Effects of Bi doping in PbTe liquid-phase epitaxial layers grown by the temperature difference method under controlled vapor pressure (TDM-CVP) are investigated. For Bi concentrations in the solution, x_Bi, lower than 0.2 at.%, an excess deep-donor level (activation energy E_d≈0.03–0.04 eV) appears, and Hall mobility is low. In contrast, for x_Bi>0.2 at.%, Hall mobility becomes very high, while carrier concentration is in the range of 10¹⁷ cm⁻³. Inductive coupled plasma (ICP) emission analysis shows that, for x_Bi=1 at.%, Bi concentration in the epitaxial layer is as high as N_Bi=2.3–2.7 × 10¹⁹ cm⁻³. These results indicate that Bi behaves not only as a donor but also as an acceptor, and the nearest neighbor or very near donor-acceptor (D-A) pairs are formed, so that strong self-compensation of Bi takes place. Carrier concentration for highly Bi-doped layers shows a minimum at a Te vapor pressure of 2.2 × 10⁻⁵ torr for growth temperature 470°C, which is coincident with that of the undoped PbTe.     

液相外延用碲镉汞母液晶锭的组分均匀性

开展了液相外延用碲镉汞母液晶锭的合成工艺优化研究.通过优化合成温度、合成时间、摇炉速率和淬火工艺,有效提高了碲镉汞晶锭的纵向组分均匀性.用改进工艺后合成的碲镉汞母液晶锭生长了28个外延薄膜样品,其组分平均偏差为0.95%,满足第二代红外焦平面探测器研制对探测器材料组分均匀性的要求.     

Characterization of liquid-phase epitaxially grown HgCdTe films by magnetoresistance measurements

In this paper, we demonstrate that measurements of the magnetoresistance can be used as a valuable alternative to conventional characterization tools to study transport properties of advanced semiconducting materials, structures, or devices. We have measured magnetoresistance on two different systems, namely, three liquid-phase epitaxially grown HgCdTe films and two GaAs-based high-electron-mobility-transistor (HEMT) structures. The results are analyzed by using a two-carrier model as a reference in the context of the reduced-conductivity-tensor scheme. The HEMT data are in quantitative agreement with the two-carrier model, but the HgCdTe data exhibit appreciable deviations from the model. The observed deviations strongly indicate a mobility spread and material complexity in the HgCdTe samples which are probably associated with inhomogeneities and the resulting anomalous electrical behavior.     

Key performance-limiting defects in P-on-N HgCdTe LPE heterojunction infrared photodiodes

The operability of long-wavelength p-on-n double layer heterojunction arrays for 40K low-background applications has long been limited by the wide variation in pixel-to-pixel zero bias resistance (R_o) values. Diodes on test structures showing lower performance, with R_o values below 7 × 10⁶ ohm at 40K, usually contained gross metallurgical defects such as dislocation clusters and loops, pin holes, striations, Te inclusions, and heavy terracing. However, diodes with R_o values between 7 × 10⁶ and 1× 10⁹ ohm at 40K contained no visible defects. To study the “invisible” performance-limiting defects (i.e. defects that cannot be revealed by etching), a good correlation between the dynamic resistance at 50 mV reverse bias (R50) value at 77K and the R_o value at 40K was first established, and then used as a tool. The correlation allowed measurements of a large number of devices at 77K, rather than relying exclusively on time-consuming measurements at 40K. Interesting results regarding R_o values at 40K, such as insensitivity to low-density dislocations, mild degradation from Hg vacancies, severe degradation from Hg interstitials, and correlation with junction positioning, were obtained from specially designed experiments.