共查询到19条相似文献,搜索用时 125 毫秒
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双管S型负阻器件的研究 总被引:4,自引:0,他引:4
模拟电路实验证明用两个同极性的晶体管以多种电路接法都能获得具有S型负阻特性的两端器件。在此实验基础上研制得到一种双向两端S型负阻器件(TBNRD器件)。本文还对该器件产生负阻的原因进行了理论分析。 相似文献
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硅光学双稳态(SOB)器件 总被引:6,自引:1,他引:6
利用作者近期研制的硅光电表面负阻晶体管(PNEGIT)或光电“∧”双极晶体管(PLBT)两种硅光电负阻器件,提出并成功地实现了一种新型的硅光学双稳态器件。即以PNEGIT(或PLBT)作为光的输入器件,以其驱动一发光管(LED)作为光输出器件,由于PNEGIT和PLBT都具有光电负阻特性,致使在输出光功率(Pout)-输入光功率(Pin)特性上出现逆时针方向的光学双稳回线。这种器件具有光开关、光逻辑、光放大、光存贮、光眼福等多种功能,扩展了硅光电器件在光逻辑、光计算、光通讯等领域中的应用。 相似文献
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双向负阻晶体管的脉冲应用高广和,冯明昭,付连生关键词负阻晶体管,阶跃二极管,亚钠秒脉冲1引言双向负阻晶体管(BNRT)是我国发明的一种新功能器件,该器件是一种合并晶体管结构,如图1(a)所示,它在电路中的符号参照图1(b)。两输出电极El和E2具有完... 相似文献
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“硅光负阻器件的研究”、“高频高速硅光负阻器件的研究”是国家自然科学基金和天津自然科学基金资助的项目,由天津大学电子信息工程学院微电子系新型器件小组承担研究工作。笔者围绕着该两项课题进行了硅光电负阻器件的基础研究工作,对两种硅光电负阻器件的机理进行了探讨。进行了二维器件模拟(简称器件模拟),对影响器件性能的主要参数进行了模拟分析,并与实验进行了对比。建立了两种光电负阻器件的电路模型,并进行了实验验证。为光电负阻器件基础研究和应用研究打下了良好的基础。“SOI/SiGe/BiCMOS集成电路的研究”是国家自然科学基金重点项目,天津大学和清华大学共同承担了这项研究工作。笔者围绕着该项研究工作进行了SiGe/BiMOS的基础研究和设计工作,进行了器件模拟,对影响器件性能的主要参数进行模拟分析,模拟为器件设计提供了有意义的指导,完成版图设计和工艺设计。为SOI/SiGe/BiCMOS集成电路的研制奠定良好开端。具体研究的主要内容包括以下九个方面。 相似文献
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提出了一种 MESFET开关的模型——附加栅控开关模型 ,适用于 MMIC电路的设计 ,具有很好的宽带微波特性。在 0 .1~ 2 0 GHz频率范围内 ,器件测试值与模型模拟值吻合较好 相似文献
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Digital circuit applications of resonant tunneling devices 总被引:10,自引:0,他引:10
Mazumder P. Kulkarni S. Bhattacharya M. Jian Ping Sun Haddad G.I. 《Proceedings of the IEEE. Institute of Electrical and Electronics Engineers》1998,86(4):664-686
Many semiconductor quantum devices utilize a novel tunneling transport mechanism that allows picosecond device switching speeds. The negative differential resistance characteristic of these devices, achieved due to resonant tunneling, is also ideally suited for the design of highly compact, self-latching logic circuits. As a result, quantum device technology is a promising emerging alternative for high-performance very-large-scale-integration design. The bistable nature of the basic logic gates implemented using resonant tunneling devices has been utilized in the development of a gate-level pipelining technique, called nanopipelining, that significantly improves the throughput and speed of pipelined systems. The advent of multiple-peak resonant tunneling diodes provides a viable means for efficient design of multiple-valued circuits with decreased interconnect complexity and reduced device count as compared to multiple-valued circuits in conventional technologies. This paper details various circuit design accomplishments in the area of binary and multiple-valued logic using resonant tunneling diodes (RTD's) in conjunction with high-performance III-V devices such as heterojunction bipolar transistors (HBT's) and modulation doped field-effect transistors (MODFET's). New bistable logic families using RTD+HBT and RTD+MODFET gates are described that provide a single-gate, self-latching majority function in addition to basic NAND, NOR, and inverter gates 相似文献
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We demonstrate a novel multiple-valued logic (MVL) gate using series-connected resonant tunneling devices. Logic operation is based on the control of the switching sequence of these devices through the modulation of their peak currents by the input signal. We obtain the literal function, one of fundamental MVL functions, by integrating three InGaAs-based resonant-tunneling diodes with two HEMT's on an InP substrate. The gate configuration is greatly simplified compared with a conventional literal gate employing CMOS circuits 相似文献
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An amorphous silicon doping superlattice device with different period lengths is developed, providing a double switching characteristic that has been demonstrated to yield multiple stable states for multiple-valued logic applications. Unlike those of conventional switching devices, the switching characteristics of the present device are caused by avalanche multiplication and a barrier-lowering effect. A tristate memory cell using this device is proposed and discussed 相似文献
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An empirical model is presented for the current-voltage characteristics of resonanttunneling (RT) devices. By using this model an analytical study of millimeter-band electronic circuits employing RT devices can be performed. 相似文献
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Quantum functional devices: resonant-tunneling transistors,circuits with reduced complexity, and multiple valued logic 总被引:1,自引:0,他引:1
Capasso F. Sen S. Beltram F. Lunardi L.M. Vengurlekar A.S. Smith P.R. Shah N.J. Malik R.J. Cho A.Y. 《Electron Devices, IEEE Transactions on》1989,36(10):2065-2082
Recent advances in the area of quantum functional devices are discussed. After a discussion of the functional device concept, resonant-tunneling bipolar transistors (RTBTs) with a double barrier in the base region are described. Design considerations for RTBTs with ballistic injection and the first observation of minority-electron ballistic RT are presented. RTBTs using thermionic injection and exhibiting a high peak-to-valley ratio at room temperature in the transfer characteristics are also described. Multiple-state RTBTs and their DC and microwave performance are then discussed. Circuit applications of RTBTs also are discussed. It is shown that RTBTs allow the implementation of many analog and digital circuit functions with a greatly reduced number of transistors and show considerable promise for multiple-valued logic. Experimental results on frequency multipliers and parity bit generators are presented. Analog-to-digital converters are memory circuits are also discussed. Two novel superlattice-base transistors are reported. Negative transconductance is achieved by suppression of injection into minibands. Gated quantum-well RT transistors are also discussed 相似文献
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A new multiple-valued current-mode MOS integrated circuit is proposed for high-speed arithmetic systems at low supply voltage. Since a multiple-valued source-coupled logic circuit with dual-rail complementary inputs results in a small signal-voltage swing while providing a constant driving current, the switching speed of the circuit is improved at low supply voltage. As an application to arithmetic systems, a 200 MHz 54×51-b pipelined multiplier using the proposed circuits with a 1.5 V supply voltage is designed with a 0.8-μm standard CMOS technology. The performance of the proposed multiplier is evaluated to be about 1.4 times faster than that of a corresponding binary implementation under the normalized power dissipation. A prototype chip is also fabricated to confirm the basic operation of the multiple-valued arithmetic circuit 相似文献
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This paper proposes compact adders that are based on non-binary redundant number systems and single-electron (SE) devices. The adders use the number of single electrons to represent discrete multiple-valued logic state and manipulate single electrons to perform arithmetic operations. These adders have fast speed and are referred as fast adders. We develop a family of SE transfer circuits based on MOSFET-based SE turnstile. The fast adder circuit can be easily designed by directly mapping the graphical counter tree diagram (CTD) representation of the addition algorithm to SE devices and circuits. We propose two design approaches to implement fast adders using SE transfer circuits: the threshold approach and the periodic approach. The periodic approach uses the voltage-controlled single-electron transfer characteristics to efficiently achieve periodic arithmetic functions. We use HSPICE simulator to verify fast adders operations. The speeds of the proposed adders are fast. The numbers of transistors of the adders are much smaller than conventional approaches. The power dissipations are much lower than CMOS and multiple-valued current-mode fast adders. 相似文献
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谐振隧穿晶体管数字单片集成电路 总被引:1,自引:0,他引:1
阐述了谐振隧穿器件构成的与非门、单/双稳逻辑转换电路、或非门、流水线逻辑门、D触发器、静态存储器、多值逻辑和静态分频器等数字单片集成电路,它们具有高频高速、低功耗、多值逻辑、节点少、节省器件、简化电路等显著优势,将是数字集成电路后续小型化最有希望的代表。指出材料生长和芯片工艺制作等问题是其实现工业化生产的瓶颈。综述了国内外在该领域的研究现状和发展趋势,特别是美国已经有高水平的谐振隧穿晶体管数字单片电路问世,我国正在开展少量的研究工作。 相似文献