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1.
In this paper we discuss the design and performance of an SIS waveguide receiver which provides low noise performance from 375 to 510 GHz. At its design frequency of 492 GHz the receiver has a double sideband noise temperature of ~172 K. By using embedded magnetic field concentrators, we are able to effectively suppress Josephson pair tunneling. Techniques for improving receiver performance are discussed.  相似文献   

2.
A 40 GHz band SIS mixer receiver has been built using Nb/Al?AlOx/Nb array junctions and a 4.3 K closed cycle helium refrigerator. The minimum conversion loss of the mixer is 2±1 dB and the single sideband receiver noise temperature (TRX (SSB)) is as low as 110±10 K at 36 GHz. TRX (SSB) is almost constant in the IF bandwidth of 600 MHz. The mixer saturation level is as high as 15 nW, which is comparable to the injected LO power.  相似文献   

3.
A superconductor-insulator-superconductor (SIS) mixer with a broadband integrated tuning structure is described. The mixer is tunable from 85 to 116 GHz and at 114 GHz has a noise temperature ⩽5.6 K double sideband (DSB) and unity DSB conversion gain. The mixer noise temperature is less than or comparable to the photon noise temperature hf/k≈5.5 K. Referred to the mixer input flange, the receiver noise temperature is ⩽9.5 K DSB when operated with an L -band HEMT (high-electron-mobility transistor) IF amplifier. Saturation measurements have been made using CW and broadband noise sources  相似文献   

4.
Cryogenic low-noise two-stage amplifiers were developed for frequency bands of 3.4-4.6 GHz, 4-8 GHz, and 8-9 GHz using commercial GaAs high electron mobility transistor. The performances are in very good agreement with simulations, and at a cryogenic temperature of 12 K, input noise temperatures get as low as 0.6 K/GHz (2.8 K for the 3.4-4.6 GHz LNA and 5 K for the 4-8 GHz and 8-9 GHz LNAs). Gain ranges from 25 to 28 dB. Ultralow noise temperature, low-power consumption, high reliability, and reproducibility make these devices adequate for series production and receiver arrays in, e.g., telescopes.  相似文献   

5.
A monolithic 900-MHz CMOS wireless receiver with on-chip RF and IF filters and a fully integrated fractional-N synthesizer is presented. Implemented in a standard 0.5-/spl mu/m CMOS process and without any off-chip component, the complete receiver has a measured image rejection of 79 dB, a sensitivity of -90 dBm, an IIP3 of -24 dBm, and a noise figure of 22 dB with a power of 227 mW and a chip area of 5.7 mm/sup 2/. The synthesizer achieves a phase noise of -118 dBc/Hz at 600 kHz offset and a settling time of less than 150 /spl mu/s.  相似文献   

6.
900 MHz CDMA, 1.8 GHz PCS, and 450 MHz CDMA RF receivers are implemented and measured. In order to reduce NRE cost and meet the demand of fast time-to-market, a metal-mask configurable method is applied for those receivers using only upper metals, contact and via layers. Also to reduce power consumption, a new mixer linearization method is proposed, along with an optimization methodology of an integrated inductor for a single balance mixer LO buffer, with respect to power consumption and silicon area. In order to apply the proposed inductor optimization methodology into metal-mask configurable circuits, inductor design considerations for metal-mask variant circuits are presented. With the proposed linearization technique and inductor optimization method, low power 900 MHz CDMA/1.8 GHz PCS/450 MHz CDMA mixers are obtained. The proposed receivers are fabricated in a 0.35 μm SiGe BiCMOS process. In the 900 MHz CDMA case, measurement results of the proposed mixer show 12 dBm IIP3 and 10.2 dB conversion gain, and 7.5 dB SSB NF with 10.5 mA current consumption at 2.7 V supply voltage.  相似文献   

7.
This paper presents a comprehensive modelling methodology for the electromagnetic immunity of integrated circuits (ICs) to direct power injection (DPI). The aim of this study is to predict the susceptibility of ICs by the means of simulations performed on an appropriate electrical model of different integrated logic cores located in the same die. These cores are identical from a functional point of view, but differ by their design strategies. The simulation model includes the whole measurement setup as well as the integrated circuit under test, its environment (PCB, power supply) and the substrate model of each logic core. Simulation results and comparisons with measurement results demonstrate the validity of the suggested model. Moreover, they highlight the interest of the aforementioned protection strategies against electromagnetic disturbances.  相似文献   

8.
A new source coding problem is considered for a one-way communication system with correlated source outputs{XY}. One of the source outputs, i.e.,{X}, must be transmitted to the receiver within a prescribed distortion tolerance as in ordinary source coding. On the other hand, the other source output, i.e.,{Y}, has to be kept as secret as possible from the receiver or wiretappers. For this case the equivocation-distortion functionGamma ast(d)and the rate-distortion-equivocation functionRast (d,e)are defined and evaluated. The former is the maximum achievable equivocation of{Y}under the distortion tolerancedfor{X}, and the latter is the minimum rate necessary to attain both the equivocation toleranceefor{Y}and the distortion tolerancedfor{X}. Some examples are included.  相似文献   

9.
The switching current for the device is about 90 mA at all in-range wavelengths. Its broad wavelength range is suitable for optical signal-processing applications in wavelength-division multiplexing transmission systems. High coupling efficiency to a single-mode fiber is achieved by using a small-Δ waveguide structure with carrier blocking layers. The effective refractive index change in the waveguide per unit of the injected current density is doubled by the carrier blocking layers without reducing coupling efficiency  相似文献   

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