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1.
A high breakdown voltage and a high turn-on voltage (Al/sub 0.3/Ga/sub 0.7/)/sub 0.5/In/sub 0.5/P/InGaAs quasi-enhancement-mode (E-mode) pseudomorphic HEMT (pHEMTs) with field-plate (FP) process is reported for the first time. Between gate and drain terminal, the transistor has a FP metal of 1 /spl mu/m, which is connected to a source terminal. The fabricated 0.5/spl times/150 /spl mu/m/sup 2/ device can be operated with gate voltage up to 1.6 V owing to its high Schottky turn-on voltage (V/sub ON/=0.85 V), which corresponds to a high drain-to-source current (I/sub ds/) of 420 mA/mm when drain-to-source voltage (V/sub ds/) is 3.5 V. By adopting the FP technology and large barrier height (Al/sub 0.3/Ga/sub 0.7/)/sub 0.5/In/sub 0.5/P layer design, the device achieved a high breakdown voltage of -47 V. The measured maximum transconductance, current gain cutoff frequency and maximum oscillation frequency are 370 mS/mm, 22 GHz , and 85 GHz, respectively. Under 5.2-GHz operation, a 15.2 dBm (220 mW/mm) and a 17.8 dBm (405 mW/mm) saturated output power can be achieved when drain voltage are 3.5 and 20 V. These characteristics demonstrate that the field-plated (Al/sub 0.3/Ga/sub 0.7/)/sub 0.5/In/sub 0.5/P E-mode pHEMTs have great potential for microwave power device applications.  相似文献   

2.
The properties of both lattice-matched and strained doped-channel field-effect transistors (DCFET's) have been investigated in AlGaAs/In/sub x/Ga/sub 1-x/As (0/spl les/x/spl les/0.25) heterostructures with various indium mole fractions. Through electrical characterization of grown layers in conjunction with the dc and microwave device characteristics, we observed that the introduction of a 150-/spl Aring/ thick strained In/sub 0.15/Ga/sub 0.85/As channel can enhance device performance, compared to the lattice-matched one. However, a degradation of device performance was observed for larger indium mole fractions, up to x=0.25, which is associated with strain relaxation in this highly strained channel. DCFET's also preserved a more reliable performance after biased-stress testings.<>  相似文献   

3.
The properties of doped-channel field-effect transistors (DCFET) have been thoroughly investigated on Al/sub x/Ga/sub 1-x/As/InGaAs (x= 0.3, 0.5, 0.7, 1) heterostructures with various Al mole fractions. In this study, we observed that by introducing a 200-/spl Aring/-thick Al/sub 0.5/Ga/sub 0.5/As (x=0.5) Schottky layer can enhance the device power performance, as compared with the conventional x=0.3 AlGaAs composition system. However, a degradation of the device power performance was observed for further increasing the Al mole fractions owing to their high sheet resistance and surface states. Therefore, Al/sub 0.5/Ga/sub 0.5/As Schottky layer design provides a good opportunity to develop a high power device for power amplifier applications.  相似文献   

4.
Ba/sub x/Sr/sub 1-x/TiO/sub 3/ (BST) thin films have large dielectric constants that can be varied by as much as a factor of 3 with an applied field, making them attractive for radio frequency (RF) circuits as small-area ac bypass/dc blocking capacitors, or high-power varactors. However, BST must be deposited at relatively high temperatures in an oxidizing environment, presenting significant integration challenges for MMIC applications. This letter describes the successful integration of BST films on AlGaN/GaN high electron-mobility transistor (HEMT) monolithic microwave integrated circuits on sapphire substrates. A sacrificial SiO/sub 2/ buffer layer is used to protect the underlying AlGaN during the RF magnetron sputtering of the BST film at an elevated temperature, with a carefully controlled heater ramp rate to avoid degradation of the ohmic contacts on the HEMT.  相似文献   

5.
Short-pulse drain current versus gate voltage transfer characteristics measured for modulation-doped HFETs (MODFETs) with four donor-layer-channel-layer combinations-(1) Al0.3Ga0.7 As-GaAs, (2) Al0.2Ga0.8As-GaAs, (3) Al0.3Ga0.7As-In0.2Ga0.8As, and (4) Al0.2Ga0.8As-In0.2 a0.8 As-are compared with the DC transfer characteristics. The measurements are relevant to high-speed switching in HFET circuits. Significant shifts in threshold voltage are observed between the DC and short-pulse characteristics for the structures with n+-Al0.3Ga0.7As donor layers, while the corresponding shifts for structures with n+-Al0.2Ga0.8As donor layers are relatively small or virtually nonexistent  相似文献   

6.
The uniformly doped and the /spl delta/-doped In/sub 0.52/Al/sub 0.48/As/In/sub 0.6/Ga/sub 0.4/As metamorphic high-electron mobility transistors (MHEMTs) were fabricated, and the dc characteristics and the third-order intercept point (IP3) of these devices were measured and compared. Due to more uniform electron distribution in the quantum-well region, the uniformly doped MHEMT exhibits a flatter transconductance (G/sub m/) versus drain-to-source current (I/sub DS/) curve and much better linearity with higher IP3 and higher IP3-to-P/sub dc/ ratio as compared to the /spl delta/-doped MHEMT, even though the /spl delta/-doped device exhibits higher peak transconductance. As a result, the uniformly doped MHEMT is more suitable for communication systems that require high linearity operation.  相似文献   

7.
We fabricated decananometer-gate pseudomorphic In/sub 0.52/Al/sub 0.48/As/In/sub 0.7/Ga/sub 0.3/As high-electron mobility transistors (HEMTs) with a very short gate-channel distance. We obtained a cutoff frequency f/sub T/ of 562 GHz for a 25-nm-gate HEMT. This f/sub T/ is the highest value ever reported for any transistor. The ultrahigh f/sub T/ of our HEMT can be explained by an enhanced electron velocity under the gate, which was a result of reducing the gate-channel distance.  相似文献   

8.
The DC and RF characteristics of Ga/sub 0.49/In/sub 0.51/P-In/sub 0.15/Ga/sub 0.85/As enhancement- mode pseudomorphic HEMTs (pHEMTs) are reported for the first time. The transistor has a gate length of 0.8 /spl mu/m and a gate width of 200 /spl mu/m. It is found that the device can be operated with gate voltage up to 1.6 V, which corresponds to a high drain-source current (I/sub DS/) of 340 mA/mm when the drain-source voltage (V/sub DS/) is 4.0 V. The measured maximum transconductance, current gain cut-off frequency, and maximum oscillation frequency are 255.2 mS/mm, 20.6 GHz, and 40 GHz, respectively. When this device is operated at 1.9 GHz under class-AB bias condition, a 14.7-dBm (148.6 mW/mm) saturated power with a power-added efficiency of 50% is achieved when the drain voltage is 3.5 V. The measured F/sub min/ is 0.74 dB under I/sub DS/=15 mA and V/sub DS/=2 V.  相似文献   

9.
We report, for the first time, the successful fabrication of aluminum-free metamorphic (MM) InP/In0.53 Ga0.47 As/InP double heterojunction bipolar transistors (DHBTs) on GaAs substrates with a linearly graded InxGa1-xP buffer grown by solid-source molecular beam epitaxy (SSMBE). Devices with 5×5 μm2 emitters display a peak current gain of 40 and a common-emitter breakdown voltage (BVCE0) higher than 9 V, a current gain cut-off frequency (fT) of 48 GHz and a maximum oscillation frequency (fmax) of 42 GHz. A minimum noise figure of 2.9 dB and associated gain of 19.5 dB were measured at a collector current level of 2.6 mA at 2 GHz. Detailed analysis suggests that the degradation of the base-emitter heterojunction interface and the increase of bulk recombination are the most probable causes for the poorer device performance of current metamorphic HBTs compared with lattice-matched HBTs  相似文献   

10.
Single-junction, lattice-mismatched (LMM) In/sub 0.69/Ga/sub 0.31/As thermophotovoltaic (TPV) devices with bandgaps of 0.60 eV were grown on InP substrates by solid-source molecular beam epitaxy (MBE). Step-graded InAs/sub y/P/sub 1-y/ buffer layers with a total thickness of 1.6 /spl mu/m were used to mitigate the effects of 1.1% lattice mismatch between the device layer and the InP substrate. High-performance single-junction devices were achieved, with an open-circuit voltage of 0.357 V and a fill factor of 68.1% measured at a short-circuit current density of 1.18 A/cm/sup 2/ under high-intensity, low emissivity white light illumination. Device performance uniformity was outstanding, measuring to better than 1.0% across a 2-in diameter InP wafer indicating the promise of MBE growth for large area TPV device arrays.  相似文献   

11.
The demand for radio frequency (RF) integrated circuits with reduced power consumption is growing owing to the trend toward system-on-a-chip (SoC) implementations in deep-sub-micron CMOS technologies. The concomitant need for high performance imposes additional challenges for circuit designers. In this paper, a g/sub m/-boosted common-gate low-noise amplifier (CGLNA), differential Colpitts voltage-controlled oscillators (VCO), and a quadrature Colpitts voltage-controlled oscillator (QVCO) are presented as alternatives to the conventional common-source LNA and cross-coupled VCO/QVCO topologies. Specifically, a g/sub m/-boosted common-gate LNA loosens the link between noise factor (i.e., noise match) and input matching (i.e., power match ); consequently, both noise factor and bias current are simultaneously reduced. A transformer-coupled CGLNA is described. Suggested by the functional and topological similarities between amplifiers and oscillators, differential Colpitts VCO and QVCO circuits are presented that relax the start-up requirements and improve both close-in and far-out phase noise compared to conventional Colpitts configurations. Experimental results from a 0.18-/spl mu/m CMOS process validate the g/sub m/-boosting design principle.  相似文献   

12.
High-performance 0.3-μm-gate-length surface-undoped In0.52 Al0.48As/In0.53Ga0.47As/InP high-electron-mobility transistors (HEMTs) grown by molecular beam epitaxy (MBE) have been characterized and compared with a surface-doped structure. At 18 GHz, the surface-undoped HEMT has achieved a maximum stable gain (MSG) of 19.2 dB compared to 16.0 dB for the surface-doped structure. The higher MSG value of the surface-undoped HEMTs is obtained due to the improved gm/g0 ratio associated with the surface-induced electric field spreading effect. Comparison of identical 0.3-×150-μm-gate devices fabricated on surface-undoped and -doped structures has shown greatly improved gate leakage characteristics and much lower output conductance for the surface-undoped structure. It is demonstrated that the surface potential, modulated by different surface layer designs, affects the charge control in the conducting channel, especially the carrier injection into the buffer, resulting in excess output conductance. Several millimeter-wave coplanar waveguide (CPW) monolithic distributed amplifiers have been successfully fabricated by using the surface-undoped HEMT structure. A high gain per stage distributed amplifier with 170-dB±1-dB small-signal gain across a frequency band of 24-40 GHz, a W-band monolithic integrated circuit with 6.4-dB gain at 94 GHz, and a broad bandwidth distributed amplifier with 5-dB gain across a frequency band of 5 to 100 GHz have been demonstrated by using the surface-undoped structures  相似文献   

13.
We achieved a maximum transconductance (g/sub m/) of 2.25 S/mm at 16 K for a 195-nm-gate In/sub 0.75/Ga/sub 0.25/As/In/sub 0.52/Al/sub 0.48/As pseudomorphic high-electron mobility transistor (PHEMT) fabricated on a [411]A-oriented InP substrate, which is the highest value ever reported for HEMTs. This PHEMT also showed a much enhanced cutoff frequency (f/sub T/) of 310 GHz at 16 K, compared with its room temperature value (245 GHz). The significantly enhanced g/sub m/ and f/sub T/ at 16 K can be attributed to the higher saturation velocity in the region "under the gate," which is caused not only by suppressing the phonon scattering, but also by suppressing the interface roughness scattering due to the "(411)A super-flat InGaAs/InAlAs interfaces" (effectively atomically flat heterointerfaces over a wafer-size area).  相似文献   

14.
Metal-ferroelectric-insulator-semiconductor (MFIS) capacitors with 390-nm-thick SrBi/sub 2/Ta/sub 2/O/sub 9/ (SBT) ferroelectric film and 8-nm-thick hafnium oxide (HfO/sub 2/) layer on silicon substrate have been fabricated and characterized. It is demonstrated for the first time that the MFIS stack exhibits a large memory window of around 1.08 V at an operation voltage of 3.5 V. Moreover, the MFIS memory structure suffers only 18% degradation in the memory window after 10/sup 9/ switching cycles. The excellent performance is attributed to the formation of well-crystallized SBT perovskite thin film on top of the HfO/sub 2/ buffer layer, as evidenced by the distinctive sharp peaks in X-ray diffraction (XRD) spectra. In addition to its relatively high /spl kappa/ value, HfO/sub 2/ also serves as a good seed layer for SBT crystallization, making the proposed Pt/SrBi/sub 2/Ta/sub 2/O/sub 9//HfO/sub 2//Si structure ideally suitable for low-voltage and high-performance ferroelectric memories.  相似文献   

15.
A compact, high-resolution analog-to-digital converter (ADC) especially for sensors is presented. The basic structure is a completely digital circuit including a ring-delay-line with delay units (DUs), along with a frequency counter, latch, and encoder. The operating principles are: (1) the delay time of the DU is modulated by the analog-to-digital (A/D) conversion voltage and (2) the delay pulse passes through a number of DUs within a sampling (= integration) time and the number of DUs through which the delay pulse passes is output as conversion data. Compact size and high resolution were realized with an ADC having a circuit area of 0.45 mm/sup 2/ (0.8-/spl mu/m CMOS) and a resolution of 12 /spl mu/V (10 kS/s). Its nonlinearity is /spl plusmn/0.1% FS per 200-mV span (1.8-2.0 V), for 14-b resolution. Sample holds are unnecessary and a low-pass filter function removes high-frequency noise simultaneously with A/D conversion. Thus, the combination of this ADC and a digital filter that follows can eliminate an analog prefilter to prevent the aliasing before A/D conversion. Also, both this ADC can be shrunk and operated at low voltages, so it is an ideal means to lower the cost and power consumption. Drift errors can be easily compensated for by digital processing.  相似文献   

16.
With an aim toward a high-saturation power operation, a tapered-waveguide traveling-wave semiconductor laser amplifier (SLA) with a Ga0.68In0.32As/GaInAsP/InP tensile-strained quantum-well (QW) structure was investigated and realized for the first time. In spite of the high differential gain in the tensile-strained QW active layer, a high-saturation-output power of 18.5 dB (1 mW) (71 mW) and a high-maximum-output power of 20.4 dB(1 mW) (110 mW) were obtained with a narrow single-lobed beam-divergence property. These results indicate that the saturation performances of SLA's with tensile-strained active layers can be improved by the tapered-waveguide structures  相似文献   

17.
Excellent annealed ohmic contacts based on Ge/Ag/Ni metallization have been realized in a temperature range between 385 and 500/spl deg/C, with a minimum contact resistance of 0.06 /spl Omega//spl middot/mm and a specific contact resistivity of 2.62 /spl times/10/sup -7/ /spl Omega//spl middot/cm/sup 2/ obtained at an annealing temperature of 425/spl deg/C for 60 s in a rapid thermal annealing (RTA) system. Thermal storage tests at temperatures of 215 and 250/spl deg/C in a nitrogen ambient showed that the Ge/Ag/Ni based ohmic contacts with an overlay of Ti/Pt/Au had far superior thermal stabilities than the conventional annealed AuGe/Ni ohmic contacts for InAlAs/InGaAs high electron mobility transistors (HEMTs). During the storage test at 215/spl deg/C, the ohmic contacts showed no degradation after 200 h. At 250/spl deg/C, the contact resistance value of the Ge/Ag/Ni ohmic contact increased only to a value of 0.1 /spl Omega//spl middot/mm over a 250-h period. Depletion-mode HEMTs (D-HEMTs) with a gate length of 0.2 /spl mu/m fabricated using Ge/Ag/Ni ohmic contacts with an overlay of Ti/Pt/Au demonstrated excellent dc and RF characteristics.  相似文献   

18.
We report an Al/sub 0.3/Ga/sub 0.7/N-Al/sub 0.05/Ga/sub 0.95/N-GaN composite-channel HEMT with enhanced linearity. By engineering the channel region, i.e., inserting a 6-nm-thick AlGaN layer with 5% Al composition in the channel region, a composite-channel HEMT was demonstrated. Transconductance and cutoff frequencies of a 1 /spl times/100 /spl mu/m HEMT are kept near their peak values throughout the low- and high-current operating levels, a desirable feature for linear power amplifiers. The composite-channel HEMT exhibits a peak transconductance of 150 mS/mm, a peak current gain cutoff frequency (f/sub T/) of 12 GHz and a peak power gain cutoff frequency (f/sub max/) of 30 GHz. For devices grown on sapphire substrate, maximum power density of 3.38 W/mm, power-added efficiency of 45% are obtained at 2 GHz. The output third-order intercept point (OIP3) is 33.2 dBm from two-tone measurement at 2 GHz.  相似文献   

19.
Si/Si1-xGex heterojunction transistors (HBTs) fabricated by a chemical vapor deposition (CVD) technique are reported. A rapid thermal CVD limited-reaction processing (LRP) technique was used for the in situ growth of all three device layers, including a 20-mm Si1-xGex layer in the base. The highest current gains observed (β=400) were for a Si/Si1-x Gex HBT with a base doping of 7×1018 cm-3 near the junction and a shallow arsenic implant to form ohmic contacts and increase current gain. Ideal base currents were observed for over six decades of current and the collector current remained ideal for nearly nine current decades starting at 1 pA. The bandgap difference between a p-type Si layer doped to 5×1017 cm-3 and the Si1-xGex(x=0.31) base measured 0.27 eV. This value was deduced from the measurements of the temperature dependence of the base current and is in good agreement with published calculations for strained Si1-xGex layers on Si  相似文献   

20.
We have studied the bias-temperature instability of three-dimensional self-aligned metal-gate/high-/spl kappa//Germanium-on-insulator (GOI) CMOSFETs, which were integrated on underlying 0.18 /spl mu/m CMOSFETs. The devices used IrO/sub 2/--IrO/sub 2/-Hf dual gates and a high-/spl kappa/ LaAlO/sub 3/ gate dielectric, and gave an equivalent-oxide thickness (EOT) of 1.4 nm. The metal-gate/high-/spl kappa//GOI p-and n-MOSFETs displayed threshold voltage (V/sub t/) shifts of 30 and 21 mV after 10 MV/cm, 85/spl deg/C stress for 1 h, comparable with values for the control two-dimensional (2-D) metal-gate/high-/spl kappa/-Si CMOSFETs. An extrapolated maximum voltage of -1.2 and 1.4 V for a ten-year lifetime was obtained from the bias-temperature stress measurements on the GOI CMOSFETs.  相似文献   

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