A low-power high-quality CMOS image sensor using 1.5 V 4T pinned photodiode and dual-CDS column-parallel single-slope ADC

This paper presents a low-power high-quality CMOS image sensor (CIS) using 1.5 V 4T pinned photodiode (4T-PPD) and dual correlated double sampling (dual-CDS) column-parallel single-slope ADC. A five-finger shaped pixel layer is proposed to solve image lag caused by low-voltage 4T-PPD. Dual-CDS is used to reduce random noise and the nonuniformity between columns. Dual-mode counting method is proposed to improve circuit robustness. A prototype sensor was fabricated using a 0.11 µm CMOS process. Measurement results show that the lag of the five-finger shaped pixel is reduced by 80% compared with the conventional rectangular pixel, the chip power consumption is only 36 mW, the dynamic range is 67.3 dB, the random noise is only 1.55 e^–_rms, and the figure-of-merit is only 1.98 e^–·nJ, thus realizing low-power and high-quality imaging.     

Radiation effects on scientific CMOS image sensor

A systemic solution for radiation hardened design is presented. Besides, a series of experiments have been carried out on the samples, and then the photoelectric response characteristic and spectral characteristic before and after the experiments have been comprehensively analyzed. The performance of the CMOS image sensor with the radiation hardened design technique realized total-dose resilience up to 300 krad(Si) and resilience to single-event latch up for LET up to110 MeV·cm²/mg.     

Double junction photodiode for X-ray CMOS sensor IC

A CMOS compatible P＋/Nwell/Psub double junction photodiode pixel was proposed, which can effi- ciently detect fluorescence from CsI（T1） scintillation in an X-ray sensor. Photoelectric and spectral responses of P＋/Nwell, NweE1/Psub and P＋/Nwell/Psub photodiodes were analyzed and modeled. Simulation results show P＋/Nweu/Psub photodiode has larger photocurrent than P＋/Nwetl photodiode and Nweu/Psub photodiode, and its spectral response is more in accordance with CsI（T1） fluorescence spectrum. Improved P＋/Nweu/Psub photodiode detecting CsI（T1） fluorescence was designed in CSMC 0.5 #m CMOS process, CTIA （capacitive transimpedance amplifier） architecture was used to readout photocurrent signal. CMOS X-ray sensor IC prototype contains 8 × 8 pixel array and pixel pitch is 100 × 100 μm2. Testing results show the dark current of the improved P＋/Nwell/Psub photodiode （6.5 pA） is less than that of P＋/Nwell and P＋/Nwell/Psub photodiodes （13 pA and 11 pA respectively）. The sen- sitivity of P＋/Nwell/Psub photodiode is about 20 pA/lux under white LED. The spectrum response of P＋/Nwell/Psub photodiode ranges from 400 nm to 800 nm with a peak at 532 nm, which is in accordance with the fluorescence spectrum of Csl（T1） in an indirect X-ray sensor. Preliminary testing results show the sensitivity of X-ray sensor IC under Cu target X-ray is about 0.21 V.m^2/W or 5097e-/pixel @ 8.05 keV considering the pixel size, integration time and average energy of X-ray photons.     

CMOS有源光电传感器像素采集单元成像质量分析

针对CMOS光电二极管型有源像素采集单元中存在的拖影问题,从像素采集单元的工作原理入手,利用光电二极管的等效电路模型,对像素采集单元的光电转换状态和置位状态进行分析.得出造成拖影的根本原因是光电二极管置位后的电压与上一周期末光电二极管的光生电压有关.     

High performance SOI CMOS pixel sensor with surrounding N+ trench electrode

In this paper, an advanced SOI CMOS pixel (ASCP) detector structure with deep N+ trench electrode is researched and simulated. For this pixel structure, the N+ trench cathode surrounds the P+ trench anode, and they are both connected from the topside. The cathode is in the function of charge share shielding, it isolates the neighbor pixels, and avoids the crosstalk happening of electron hole pairs. Furthermore, the parallel trench electrodes between anode and cathode have reduced the fully depleted voltage, and the bias voltage can be controlled from the core I/O interface. In addition, the ASCP has the better radiation resistance capacity as compared with the Conventional SOI CMOS pixel detector and the Three-Dimension (3D) CMOS detector, due to the low fully depleted voltage and short carrier drift distance. Numerical simulation results show that the ASCP detector has the better charge collecting capacity in low driving voltage, and it is more suitable to detect the back-illumination X-ray ⁵⁵Fe.     

A CMOS image sensor with light-controlled oscillating pixels for an investigative optobionic retinal prosthesis system

This paper presents a high-dynamic range CMOS image sensor architecture incorporating light-controlled oscillating pixels which can act as front-end for an investigative optobionic retinal prosthesis research effort. Each pixel acts as an independent oscillator, whose frequency is proportional to the local light intensity. A 9×9 pixel array has been fabricated in the AMS CMOS opto process. Each pixel's area amounts to , each pixel photodiode area is while the array occupies . Measured results show that the sensor can achieve a linear optical dynamic range of 80 dB (from 0.24 Hz to 2.2 kHz). Its linear electrical dynamic range exceeds 134 dB (from 100 mHz to 502 kHz). The nominal power dissipation is about 50 nW per pixel.     

CMOS图像传感器及其研究

介绍了CMOS图像传感器的工作原理,比较了CCD图像传感器与CMOS图像传感器的优缺点,指出了CMOS图像传感器的技术问题和解决途径,综述了CMOS图像传感器的现状和发展趋势.     

CMOS图像传感器钳位光敏二极管夹断电压模型研究

A novel analytical model of pinch-off voltage for CMOS image pixels with a pinned photodiode structure is proposed. The derived model takes account of the gradient doping distributions in the N buried layer due to the impurity compensation formed by manufacturing processes; the impurity distribution characteristics of two boundary PN junctions located in the region for particular spectrum response of a pinned photodiode are quantitative analyzed. By solving Poisson＇s equation in vertical barrier regions, the relationships between the pinch-off voltage and the corresponding process parameters such as peak doping concentration, N type width and doping concentration gradient of the N buried layer are established. Test results have shown that the derived model features the variations of the pinch-off voltage versus the process implant conditions more accurately than the traditional model. The research conclusions in this paper provide theoretical evidence for evaluating the pinch-off voltage design.     

CMOS图像传感器中电荷非完全转移的影响分析

A method to judge complete charger transfer is proposed for a four-transistor CMOS image sensor with a large pixel size.Based on the emission current theory,a qualitative photoresponse model is established to the preliminary prediction.Further analysis of noise for incomplete charge transfer predicts the noise variation.The test pixels were fabricated in a specialized 0.18μm CMOS image sensor process and two different processes of buried N layer implantation are compared.The trend prediction corresponds with the test results,especially as it can distinguish an unobvious incomplete charge transfer.The method helps us judge whether the charge transfer time satisfies the requirements of the readout circuit for the given process especially for pixels of a large size.     

Radiation hardened design and analysis of radiation effect for scientific CMOS image sensor

A systemic solution for radiation hardened design is presented. Besides, a series of experiments have been carried out on the samples, and then the photoelectric response characteristic and spectral characteristic before and after the experiments have been comprehensively analyzed. The performance of the CMOS image sensor with the radiation hardened design technique realized total-dose resilience up to 300 krad(Si) and resilience to single-event latch up for LET up to110 MeV·cm²/mg.     

A time-to-first spike CMOS image sensor with coarse temporal sampling

Conventional voltage-based CMOS image sensors inherently have a dynamic range of about 60 dB. To extend the dynamic range, a two-degree of freedom time-based CMOS image sensor is proposed. Instead of reading analog voltages off chip, a time representation is used to record when the photodetector voltage passes a timing-varying threshold. The time measurements are combined with the reference voltage waveform to reconstruct the image. Experimental results on a prototype 32 × 32 pixel array CMOS image sensor verify that the two-degree of freedom sampling technique is feasible for ultra-wide dynamic range imaging. A measured 115 dB dynamic range at 30 fps is obtained. Qiang Luo received the B.S. (with honor) and M.S. degrees in electrical engineering from Fudan University, Shanghai, China, in 1995 and 1998, respectively, and the Ph.D. degree in electrical engineering from University of Florida, Gainesville, FL, in 2002. In 2001, he was with Texas Instruments Inc., Dallas, TX, where he was an intern engineer working on ultra-wide dynamic range CMOS image sensors. From 2002 to 2004, he was with National Semiconductor Corporation, Santa Clara, CA, where he was a staff circuit design engineer and worked on the design of high performance CMOS image sensors. He is currently with the Marvell Semiconductor Inc, Sunnyvale, CA, where he is working on the development of advanced DVD servo IC. His research interests include high-speed mixed-signal IC design, CMOS image sensors, DVD servo IC and device physics. Dr. John G. Harris received his BS and MS degrees in Electrical Engineering from MIT in 1983 and 1986. He earned his PhD from Caltech in the interdisciplinary Computation and Neural Systems program in 1991. After a two-year postdoc at the MIT AI lab, Dr Harris joined the Electrical and Computer Engineering Department at the University of Florida (UF). He is currently an associate professor and leads the Hybrid Signal Processing Group in researching biologically-inspired circuits, architectures and algorithms for signal processing. Dr. Harris has published over 100 research papers and patents in this area. He co-directs the Computational NeuroEngineering Lab and has a joint appointment in the Biomedical Engineering Department at UF. Zhiliang J. Chen received Ph.D. degree in electrical engineering from University of Florida in 1994. From 1994 to 2004, he was with Texas Instruments where he worked as Senior Member of Technical Staff and Design Branch Manager. In 2002 he was expatriated to COMMIT, a Texas Instruments JV company in China, as director of RF & Analog Base Band department. In 2004, he left Texas Instrument and found On-Bright (Shanghai) Corporation where he serves as president of the company. Dr. Chen currently held 22 US patents and has published morn than 10 journal papers. He was a recipient of the Best Paper Award from the 1997 ESD/EOS symposium.     

一种用于优化小尺寸背照式CMOS图像传感器满阱容量与量子效率的新型光电二极管结构

为改善小尺寸背照式CMOS图像传感器像素单元满阱容量不足缺点,本文基于提高光电二极管电容的角度,提出了一种通过改变光电二极管结构来提升满阱容量的新方法。该结构优化由两步实现。第一步,通过在传统光电二极管N型区域下额外注入高能量、低剂量N型掺杂,形成一个浓度渐变,深度扩展的新光电二极管N型区。这种光电二极管的满阱容量将因侧壁结电容的扩展而显著提高;第二步,为了帮助扩展的阱容量实现全耗尽,一个由两步不同能量的P型杂质形成的P型插入区被嵌入到深度得以扩展的光电二极管N型区域内。这个纵向插入的P型插入区保证了该光电二极管结构可以在复位完成后实现电子的全耗尽。仿真结果显示,像素单元满阱容量可以由初始的1289e- 提升到6390e-,且该阱容量扩展技术不会以恶化图像拖尾为代价。除此之外,量子效率在全波段下均得以提升,尤其在520nm处提升6.3%。这项改进不仅可以用于背照式像素结构,而且可以被用于任何PD型正面照射式像素结构中。     

基于CMOS图像传感器的多斜率积分模式

CMOS图像传感器由于器件本身的特点,相比CCD传感器,其动态范围较小。以CYPRESS公司生产的高性能CMOS图像传感器IBIS5-A-1300为研究对象,对其多斜率积分原理进行研究,提出了采用同步快门多斜率积分的方法来扩展CMOS图像传感器的动态范围。以FPGA+DSP为系统的硬件处理平台,给出了多斜率积分驱动时序的具体设计思路和方法,并在QuartusⅡ7.0环境下对所设计的驱动时序进行功能仿真。采用所设计的多斜率积分时序驱动,将CMOS图像传感器的动态范围由原来单斜率积分模式下的64 dB扩展到了90 dB。实验结果表明,采用多斜率积分模式可以实现动态范围扩展的要求。     

CMOS图象传感器的原理及应用

CMOS图象传感器是多功能、高性能的摄象器件。本文详细介绍了其工作原理及其在微型摄象机、数码相机、医学等方面的应用     

The effect of size on photodiode pinch-off voltage for small pixel CMOS image sensors

The electron potential of a photodiode in a CMOS image sensor should be designed precisely since the charge capacity of the photodiode decreases as the pixel area shrinks. The pinch-off voltage of a photodiode, which also affects the electron capacity, is dependant on the doping profile of the pn junction as well as the size of the photodiode. The pinch-off voltage is lower in a smaller photodiode. A simple method that uses the lateral depletion of a photodiode for an estimate of the pinch-off voltage in small photodiodes is proposed, and is compared to the measured experimental data. Two constants are used to account for the doping profile and photodiode size. The measurement data shows the error of the estimation of the pinch-off voltage to be <0.05 V.     

CMOS图象传感器技术及其研究进展*

简要介绍了图象传感器的技术原理,比较了CCDs和CMOS图象传感器的技术特点。通过了解单片CMOS图象传感器的系统结构功能与器件类型,分析了单片CMOS图象传感器的性能要求与技术难点,总结出了提高性能所要进一步研究的关键问题。     

用于降低高速CMOS图像传感器电荷转移时间的工艺技术

This paper proposes pixel process techniques to reduce the charge transfer time in high speed CMOS image sensors.These techniques increase the lateral conductivity of the photo-generated carriers in a pinned photodiode(PPD) and the voltage difference between the PPD and the floating diffusion(FD) node by controlling and optimizing the N doping concentration in the PPD and the threshold voltage of the reset transistor,respectively.The techniques shorten the charge transfer time from the PPD diode to the FD node effectively.The proposed process techniques do not need extra masks and do not cause harm to the fill factor.A sub array of 3264 pixels was designed and implemented in the 0.18 m CIS process with five implantation conditions splitting the N region in the PPD.The simulation and measured results demonstrate that the charge transfer time can be decreased by using the proposed techniques.Comparing the charge transfer time of the pixel with the different implantation conditions of the N region,the charge transfer time of 0.32 s is achieved and 31% of image lag was reduced by using the proposed process techniques.     

一种基于标准CMOS工艺的新型单片集成紫外图像传感器

我们提出了一种基于标准CMOS工艺的浮栅紫外图像传感器。传感器单元是由一个非常紧凑的紫外线灵敏器件构成。整个紫外图像传感器有一CMOS像素单元阵列、高压开关、读出电路和数字控制等部分组成。在一0.18μm标准工艺上实现了1个1616的图像传感器芯片。我们对传感器单元和阵列进行了测试,测试结果表明传感器的灵敏度为0.072 V/(mJ/cm2),并且可以获得紫外图像。此紫外图像传感器适合于大规模集成的生物医药和太空探测等领域。     

Wide dynamic range CMOS image sensor with in-pixel double-exposure and synthesis

A wide-dynamic-range CMOS image sensor (CIS) based on synthesis of a long-time and a short-time exposure signal in the floating diffusion (FD) of a five-transistor active pixel is proposed.With optimized pixel operation,the response curve is compressed and a wide dynamic range image is obtained.A prototype wide-dynamic-range CMOS image sensor was developed with a 0.18 μm CIS process.With the double exposure time 2.4 ms and 70 ns,the dynamic range of the proposed sensor is 80 dB with 30 frames per second (fps).The proposed CMOS image sensor meets the demands of applications in security surveillance systems.     

CMOS图像传感器的图像采集系统的研究与实现

研究一种基于USB2D的CMOS图像传感器的图像采集系统的实现方案.以xilinx公司的FPGA芯片为核心控制芯片,Cypress公司的CY7C68013为USBZ0接口芯片.主要介绍了CMOS图像传感器外围电路设计、FPGA芯片与CMOS图像传感器接口电路设计、FPGA芯片与USB模块的接口电路设计.所设计的采集系统功耗低、成本低、可扩展性强.