Development of 3‐D equivalent‐circuit modelling with decoupled L‐ILU factorization in semiconductor‐device simulation

In this paper, we develop a three‐dimensional (3‐D) device simulator, which combines a simplified, decoupled Gummel‐like method equivalent‐circuit model (DM) with levelized incomplete LU (L‐ILU) factorization. These complementary techniques are successfully combined to yield an efficient and robust method for semiconductor‐device simulation. The memory requirements are reduced significantly compared to the conventionally used Newton‐like method. Furthermore, the complex voltage‐controlled current source (VCCS) is simplified as a nonlinear resistor. Hence, the programming and debugging for the nonlinear resistor model is much easier than that for the VCCS model. Further, we create a connection‐table to arrange the scattered non‐zero fill‐ins in sparse matrix to increase the efficiency of L‐ILU factorization. Low memory requirements may pave the way for the widespread application in 3‐D semiconductor‐device simulation. We use the body‐tied silicon‐on‐insulator MOSFET structure to illustrate the capability and the efficiency of the 3‐D DM equivalent‐circuit model with L‐ILU factorization. Copyright © 2007 John Wiley & Sons, Ltd.     

An equivalent‐circuit modelling on vertical and horizontal integrations for MOS flat‐band voltage simulation

The fixed oxide charge will cause the MOS capacitor (MOS‐C) flat‐band voltage to shift. We can observe the potential distribution to determine the MOS‐C flat‐band voltage. However, the potential distribution can be obtained from the integration of the electric field distribution. The integration of the electric field distribution is classified into the vertical and horizontal integrations. In this paper, we use the equivalent‐circuit model to demonstrate the flat‐band voltage of the non‐ideal MOS‐C. The equivalent‐circuit model of Poisson's equation includes two fixed charges Q′_f1 and Q′_f2 in the oxide layer region. Because the horizontal integration method is the superposition method, the equivalent‐circuit model for the horizontal integration is divided into 3 types. Hence, the flat‐band voltage for the horizontal integration is equal to the sum of the V_G1, V_G2, and V_G3 for the flat‐band condition. By comparison, the simulation results of the horizontal integration method approximate to the vertical integration method. Copyright © 2006 John Wiley & Sons, Ltd.     

Device‐partition method using equivalent circuit model in two‐dimensional device simulation

In order to accomplish two‐dimensional device simulation with a large number of nodes, in this paper we propose the device‐partition method (DPM) to resolve the problem that the memory size of the simulation environment is insufficient. The idea of DPM is that the device can be divided into several parts and a matrix solver only solves one part at a time. DPM uses the iteration method to simulate the device. By continuous iteration, an accurate solution can be obtained. Hence, we use DPM to demonstrate the simulations of the MOSFET and the CMOS inverter. The simulation results of DPM and the coupled method (CM) are nearly approximate and correspond with the theory. Hence, DPM is a suitable method to develop a powerful simulation environment. Copyright © 2005 John Wiley & Sons, Ltd.     

Verification of 1D BJT numerical simulation and its application to mixed‐level device and circuit simulation

In this paper, we study on a 1D BJT model, which saves the memory size and computation time and verify that the characteristic of 1D BJT model is in good agreement with 2D BJT model. We use the equivalent circuit approach to simulate the BJT device. Poisson's equation and continuity equations for electron and hole are formulated into a subcircuit format suitable for general circuit simulator in the equivalent circuit approach. In order to solve the 2D device simulation, the simulation environment needs a powerful solver. So we use the band matrix solver to replace the full matrix solver. But the 2D BJT simulation still needs a large computation time, so we must develop the efficient 1D BJT model. In 1D BJT simulation, we have overcome the base boundary condition and verified that the base boundary conditions in 1D BJT model closely approach to that in 2D BJT model. Finally, we apply it to two applications and study the operation concepts of these applications. Copyright © 2002 John Wiley & Sons, Ltd.     

Study of parallel numerical methods for semiconductor device simulation

Simulators of semiconductor devices have to solve systems of equations generated by the discretization of partial differential equations, which are the most time‐consuming part of the simulation process. Therefore, the use of an effective method to solve these linear systems is essential. In this work we have evaluated the efficiency of different parallel direct and iterative solvers used for the solution of the drift–diffusion equations in semiconductor device simulation. Several preconditioning techniques have been applied in order to minimize the execution times. We have found that FGMRES and BCGSTAB solvers preconditioned with Additive Schwarz are the most suitable for these types of problems. The results were obtained in an HP Superdome cluster with 128 Itanium2 1.5 GHz. Copyright © 2005 John Wiley & Sons, Ltd.     

Non‐linear circuit modelling via nodal methods

We discuss in this paper several interrelated nodal methods for setting up the equations of non‐linear, lumped electrical circuits. A rather exhaustive framework is presented, aimed at surveying different approaches and terminologies in a comprehensive manner. This framework includes charge‐oriented, conventional, and hybrid systems. Special attention is paid to so‐called augmented node analysis (ANA) models, which somehow articulate the tableau and modified node analysis (MNA) approaches to non‐linear circuit modelling. We use a differential–algebraic formalism and, extending previous results proved in the MNA context, we provide index‐1 conditions for augmented systems, which are shown to be transferred to tableau models. This approach gives, in particular, precise conditions for the feasibility of certain state‐space reductions. We work with very general assumptions on device characteristics; in particular, our approach comprises a wide range of resistive devices, going beyond voltage‐controlled ones. Copyright © 2005 John Wiley & Sons, Ltd.     

Accelerating the transient simulation of semiconductor devices using filter‐bank transforms

Simulation of high frequency semiconductor devices, where non‐local and hot carrier transport cannot be ignored, requires solution of Poisson's equation and at least the first three moments of the Boltzmann transport equation (hydrodynamic transport model). These equations form non‐linear, coupled and time‐dependent partial differential equations. One of the most efficient solvers of such system of equations is decoupled solver. In conventional decoupled methods, the fully implicit, semi‐implicit and explicit methods are used to solve the equations. In fully or semi‐implicit schemes, the method is unconditionally stable for any Δt or for very large Δt compared to explicit scheme. Thus, these schemes are very suitable and efficient for transient simulations. But, using these techniques leads to a large system of linear equations. Here for the first time, a filter bank‐based preconditioning method is used to facilitate the iterative solution of this system. This method provides efficient preconditioners for matrices arising from discretizing of the PDEs, using finite difference techniques. Numerical results show that the condition number and iteration number are significantly reduced. The most important advantage of this preconditioner is its low computational complexity which can be reduced to O(N). Copyright © 2006 John Wiley & Sons, Ltd.     

Efficient time integration of the Boltzmann-Poisson system applied to semiconductor device simulation

This paper presents new efficient methods for performing the time integration of finite-difference WENO approximations of the Boltzmann-Poisson system applied to semiconductor device simulation. The developed methods are based on local time-step schemes for hyperbolic conservation laws which permit the use of different time increments at different positions in space. A strategy to dynamically adapt the space-time grid according to the actual stability criteria imposed by the CFL-condition is proposed. The resulting numerical schemes are used to simulate the electron transport in a n⁺−n−n⁺ silicon diode and in a silicon MESFET. Several numerical tests and comparisons with computations performed with TVD Runge-Kutta type algorithms prove the efficiency of the presented time integration methods.     

Simplified electrical modelling of power LEDs for DC–DC converter analysis and simulation

This paper presents a model of power light emitting diodes (LEDs) based on electrical variables and considering the concept of LED ‘equivalent resistance’, which has previously been used in discharge lamp modelling and is suitable to achieve fast simulations of LED converter systems. The model can be obtained with only some simple electrical measurements, thus making its implementation quite straightforward. The proposed model is oriented to the electronic engineering area, and it has special application for the simulation of the electrical behaviour of LEDs and dc–dc converter systems by using software like Simulink. In addition, the proposed model can also be employed for the theoretical analysis and design of LED drivers. Experimental and simulation results are obtained proving the feasibility of the proposed model. Copyright © 2017 John Wiley & Sons, Ltd.     

Interactive compact device modelling using Qucs equation‐defined devices

Recent trends in compact device modelling and circuit simulation suggest a growing movement towards standardization of Verilog‐A as a vehicle for semiconductor device specification and model interchange among commercial and open source simulators. This paper introduces a nonlinear equation‐defined device (EDD) characterized by current, voltage and charge equations with a similar syntax to Verilog‐A. The EDD has been implemented in Qucs and used extensively as a central feature in an interactive modelling system that allows straightforward prototyping of compact device models prior to translation into Verilog‐A. To illustrate the properties and the use of the Qucs EDD a number of examples centred on well‐known SPICE models are described. Copyright © 2008 John Wiley & Sons, Ltd.     

Kronig–Penney model simulation with equivalent circuit method

The Kronig–Penney model is quite useful for illustrating many important features of the quantum behaviour of electrons in periodic lattice. Although the Kronig–Penney model is well‐known and has been discussed in solid state textbooks, we try to use a simple and accessible way without the extremely laborious and tedious algebra evaluation to solve Kronig–Penney model. This paper presents a simple method without solving the difficult eigen‐problem to solve the Kronig–Penney model, and the important energy band characteristics can be easily obtained with circuit concepts. The simulation results are presented to demonstrate the accuracy and superiority of the model. Copyright © 2006 John Wiley & Sons, Ltd.     

基于仿真电路的投放装置试验器设计

针对投放装置多部件信号关联问题,采用电路模拟仿真方法设计了编码电路,通过产生模拟信号实现了装置全功能测试试验,解决了不连接关联部件时的单一部件测试问题;采用时序逻辑和微处理技术,设计了计时电路、电源控制电路和波段开关电路,解决了测试信号的时序控制问题;采用信号高速处理与逻辑解码技术,解决了脉冲信号与时间指令的同步问题,实现了多路时间脉冲信号的实时精确显示,以及功能测试与故障定位的统一。功能测试结果表明,试验器测试指标符合设计要求,信号稳定。     

Delaunay–Voronoi surface integration: a full‐wave electromagnetics discretization for electronic device simulation

A promising time domain electromagnetics numerical method for treating the highly nonlinear problem of charge transport in electronic devices called Delaunay–Voronoi surface integration is presented. This method couples the rotational electric and magnetic fields governed by Ampere's and Faraday's laws with the electrostatic potential dictated by Poisson's equation in a simultaneous solution. Discretization of the governing equations using dual meshes and the relevant boundary conditions are presented. The engineering application details specific to electronic device simulation are treated, and an example calculation is shown to compare with an analytical solution for propagation in a waveguide. Benchmark results are presented for the rotational equations, Poisson's equation, and the complete set of electromagnetic equations. Copyright © 2016 John Wiley & Sons, Ltd.     

DTS中自动装置仿真通用算法研究

针对DTS中传统的自动装置仿真方法扩展性差,难以维护的缺点,从自动装置的构成原理出发提出了一种通用的仿真方法,该方法通过分层模型和将自动装置单元分解为投入条件单元,动作判别单元,动作出口单元实现自动装置动作过程的仿真。在2个DTS系统中的实用表明该方法有很好的灵活性和适应性。     

A novel multi‐output high‐voltage‐isolated power supply system for semiconductor device series‐connected switches

This paper presents a novel scheme of a multi‐output power supply for solid‐state switches based on series‐connected semiconductor devices. By using the loosely transforming method, the system can realize high‐voltage isolation and a compact size, and its application range can be easily expanded to modular designed switch stacks for higher power ratings. The circuit structure and working principles are described. Based on the system operating equations, the design methodology is proposed and applied for parameter specification of a power supply system of two series‐connected switch stacks containing 20 outputs. Detailed calculations are given, and experimental results prove the feasibility of the proposed scheme. © 2017 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.     

Time domain global modelling of EM propagation in semiconductor using irregular grids

A two‐dimensional finite volume time domain (FVTD) method using a triangular grid is applied to the analysis of electromagnetic wave propagation in a semiconductor. Maxwell's equations form the basis of all electromagnetic phenomena in semiconductors and the drift‐diffusion model is employed to simulate charge transport phenomena in the semiconductor. The FVTD technique is employed to solve Maxwell's equations on an irregular grid and the finite box method is implemented on the same grid to solve the drift‐diffusion model for carrier concentration. The locations of unknowns have been chosen to allow linking coupled Maxwell's equations and transport equations in a seamless way. To achieve suitable accuracy and computational efficiency, using irregular grid topology allows a finer mesh in doped region and at junction, and a coarser mesh in substrate and insulting regions. The proposed scheme has been implemented and verified by characterizing electromagnetic wave propagation at microwave frequency in a semiconductor slab with arbitrary doping profile. Copyright © 2002 John Wiley & Sons, Ltd.     

基于TEV和超声波的开关柜局部放电便携式检测仪的研制

为了及时发现高压开关柜的绝缘缺陷,保障电网的安全运行,文中研制了一套开关柜局部放电便携式检测仪。该仪器采用内置式TEV传感器和超声波传感器联合检测,具有体积小、操作简单、能检测多种放电缺陷的优势。文章阐述了该仪器的总体设计结构和硬件电路实现;并在实验室搭建了仪器的性能及功能测试平台;最后,与国外某公司的产品进行了详细的对比测试和分析。结果表明,该检测仪的灵敏度与准确性较高,满足我国电力工业界对高压开关柜绝缘状态先进检测仪器的迫切需求。     

A numerical simulation tool for nanoscale ion‐sensitive field‐effect transistor

In this work, a self‐contained numerical simulation tool for nanoscale Ion‐Sensitive Field‐Effect Transistor (ISFET) is developed. The tool is based on merging nanoscale ballistic MOSFET analytical equations with the Gouy–Chapman–Stern model equations of ISFET to form a system of nonlinear equations that can be solved iteratively to yield ISFET output current. The numerical solution is accomplished using Newton–Raphson method with efficient trust‐region‐dogleg algorithm using MATLAB software coding. The tool is used to optimize the sensitivity and linearity of nanoscale ISFETs, and to study their dependence on reference voltage, drain current level, and gate‐insulator thickness. Moreover, a comparison between three types of insulators, SiO₂, Si₃N₄, and Al₂O₃, has been made. The tool is given the name: NIST (Nanoscale ISFET Simulation Tool). It can be used as a guide for design and optimization of nanoscale ISFETs and can be applied for both single‐gate and double‐gate structures. Copyright © 2016 John Wiley & Sons, Ltd.     

V2G充放电机的设计及其仿真

随着电动汽车的广泛应用和智能电网的发展,电动汽车与电网互动(Vehicle to Grid,简称V2G)技术变得越来越重要。充放电机作为电网和电动汽车的接口,对于实现两者间的能量双向流动至关重要。研究并设计了基于四象限AC/DC变流器和双向DC/DC变流器的V2G充放电机,用以控制电网与电动汽车蓄电池间的能量流动;AC/DC变流器利用瞬时功率理论和电流模式闭环控制,实现了其与电网之间有功功率和无功功率的解耦控制;DC/DC变流器分别采用基于蓄电池充电电压、充电电流和基于中间直流母线电压的闭环控制,对应实现了蓄电池充电时的多段模式和放电时的功率调节。利用MATLAB/SIMULINK系统全面地仿真了V2G充放电的多种工况,仿真结果表明,该充电机能实现V2G所要求的相应功能,实现能量的双向流动满足用户的需求。