Two-dimensional round-robin schedulers for packet switches withmultiple input queues

Presents a new scheduler, the two-dimensional round-robin (2DRR) scheduler, that provides high throughput and fair access in a packet switch that uses multiple input queues. We consider an architecture in which each input port maintains a separate queue for each output. In an N×N switch, our scheduler determines which of the queues in the total of N² input queues are served during each time slot. We demonstrate the fairness properties of the 2DRR scheduler and compare its performance with that of the input and output queueing configurations, showing that our scheme achieves the same saturation throughput as output queueing. The 2DRR scheduler can be implemented using simple logic components, thereby allowing a very high-speed implementation     

Performance comparison of two input access methods for a multicastswitch

A comparison of the performance of two input access mechanisms for multicast switching is presented. The first of these-a cyclic priority input access method-is a derivative of the ring token reservation method which eliminates the unfairness of the ordinary ring token reservation. It has the advantage of being relatively simple and easy to implement. A second approach employs a neural network to resolve output port conflict. While more difficult to implement, it has a delay-throughput performance advantage over the cyclic priority approach. The primary performance measurements are the switch throughput and the packet delay. A key assumption is that all copies of the same packet must be switched in the same slot     

A high-performance input access scheme for ATM multicast switching

In this paper, we propose an input access scheme for input-queued ATM multicast switches, achieving high system throughput, low packet delay and packet loss probability. Multicast and unicast packets of each input port are separately queued. Multicast queues take priority over the unicast queues, and both types of queues are fairly served in a cyclic-priority access discipline. In particular, each unicast queue is handled on a window-service basis, and each multicast packet is switched in a one-shot scheduling manner. To evaluate the performance of the access scheme, we propose an approximate analysis based on a simplified cyclic-priority model for anN×N finite-buffer multicast switch possessing Bernoulli multicast and unicast arrivals, with window-service (for unicasting) and one-shot scheduling (for multicasting) both taken into account. Finally, we show simulation results to demonstrate the accuracy of the approximate analysis and the superiority of the scheme over existing schemes with respect to normalized system throughput, mean packet delay, and packet loss probability.An earlier version of this paper appeared in IEEE ICC'96.     

带偏射补偿机制的Birkhoff-von-Neumann交换机方案及其性能分析

Birkhoff-von-Neumann(BvN)交换机具有较低的执行复杂度和较高的吞吐量,但无法在业务突发的环境下提供性能保证。为此,提出一种带偏射的BvN(D-BvN)交换机制来增强交换机性能。D-BvN交换机通过平均业务矩阵的BvN分解,为每个虚电路(VC)提供均值带宽保证,同时通过偏射来处理业务突发。其主要思想是利用处于空闲状态的VC的闲置容量处理处于溢出状态的VC的溢出业务。具体地,偏射机制利用空闲VC的闲置容量完成两件事情:一是把溢出业务偏射到其他VC,二是给偏射业务提供到达目的端口的带宽。分析和仿真结果表明,所提方法不仅可以获得接近100%的输入负载吞吐量,而且具有较低的包乱序概率和较小的业务包延时。     

Performance of a nonblocking space-division packet switch withcorrelated input traffic

This work studies the performance of a nonblocking space-division packet switch in a correlated input traffic environment. In constructing the input traffic model, the author considers that each input is a time division multiaccess (TDM) link connecting to multiple sources. Every source on a link supports one call at a time. Each call experiences the alternation of ON and OFF periods, and generates packets periodically while in ON period. The stochastic property of each call does not have to be identical. Packets from each individual call are destined to the same output. The output address of each call is assumed to be uniformly assigned at random. The author derives both upper and lower bounds of the maximum throughput at system saturation. His study indicates that, if the source access rate is substantially lower than the link transmission rate, the effect of input traffic correlation on the output contentions can generally be ignored. Also, the analysis of each input queue becomes separable from the rest of the switch. The same study is carried out with nonuniform call address assignment     

Performance of a nonblocking space-division packet switch in a timevariant nonuniform traffic environment

The authors study the performance of a nonblocking space-division packet switch, given that the traffic intensities at the switch not only are nonuniform but also change as a function of time. A finite-state Markov chain is used as an underlying process to govern the time variation of traffic for the entire switch. The packet arrivals at each input form an independent Bernoulli process modulated by the underlying Markov chain. The output address of each packet is independently and randomly assigned with probability distributions, which are also modulated by the Markov chain. Provided that the traffic on each output is not dominated by individual inputs the service time of each output queue for sufficiently large switches can be characterized by an independent Markov modulated phase-type process. A matrix geometric solution for the resultant quasi-birth-death type queuing process is presented. The maximum throughput is obtained at the system saturation. The performance of the switch is numerically examined under various traffic conditions. A contention priority scheme to improve the switch performance is proposed     

Analysis of input and output queueing for nonblocking ATM switches

A switch model for ATM networks is analyzed. Its interconnection network is internally nonblocking and is provided with dedicated input and output queues, one per switch inlet and one per switch outlet. The switch operates with an internal speed-up: more than one packet per slot can be transferred from the head-of-line positions of the input queues to each output queue by the interconnection network. Two different operation modes are considered for the interaction between input and output queues: backpressure mode and queue loss mode. The analytical model developed for the evaluation of the switch performance under random traffic assumes an infinite size for the switch, arbitrary values for input and output queue size, as well as for the speed-up factor. Switch throughput, packet delay and loss performance are evaluated and the analytical model accuracy is assessed using computer simulation results     

Adaptive Spatial Filtering for an FH/SSMA Packet Radio Network with Packet Combining

In this paper, packet throughput is analyzed and simulated for a show FH/SSMA packet radio network with adaptive antenna array and packet combining in a Rayleigh fading channel with shadowing. The packet throughput is defined as the average number of captured packets per slot. To enhance the throughput performance, an adaptive spatial filtering through adaptive antenna array and a packet combining scheme are employed. As a random access protocol, slotted ALOHA is considered, and synchronous memoryless hopping patterns are assumed. A packet consists of codewords from an (n, k) RS (Reed-Solomon) code. The tap weights of an adaptive processor is updated by RLS (recursive-least-square) algorithm. From the simulation results, it is shown that a pre-processing by adaptive antenna array and a post-processing by packet combining are very effective to improve reception performance of an FH/SSMA network.     

Performance evaluation of a Batcher-banyan interconnection networkwith output pooling

A Batcher-banyan interconnection network that overcomes the limitation of switch throughput and unfair allocation of bandwidth is proposed, and its performance is evaluated. The throughput limitations of the interconnection network are substantially reduced by defining pools of outputs, in which groups of outputs that offer the same service behave each as a set of servers sharing a single waiting list. Through a careful system design and a suitable priority scheme, the servers in a set can be evenly allocated to the users requesting service from the inputs of the interconnection network. Three different solutions are proposed for the allocation of the output channels within a pool to those users requesting the same pool. Extensive computer simulation was used to evaluate the overall packet delay performance and the degree of fairness provided by each of these solutions     

Performance study of ATM multicast switching systems

We evaluate the performance of an N × N ATM discrete time multicast switch model with input queueing operating under two input access disciplines. First we present the analysis for the case of a purely random access discipline and subsequently we concentrate on a cyclic priority access based on a circulating token ring. In both cases, we focus on two HOL (head-of-line) packet service disciplines. Under the first (one-shot transmission discipline), all the copies generated by each HOL packet seek simultaneous transmission during the same time slot. Under the second service discipline (call-splitting), all HOL copies that can be transmitted in the same time slot are released while blocked copies compete for transmission in subsequent slots. In our analysis the performance measures introduced are the average packet delay in the input buffers as well as the maximum throughput of the switch. A significant part of the analysis is based on matrix geometric techniques. Finally, numerical results are presented and compared with computer simulations.     

Protection-against-collision optical packet network

An optically transparent packet network controlled by a simple medium access circuit is presented. The system, based on frequency division multiplexing and tunable transmitters, has no internal blocking and is optically self-routing. It provides internal collision-free traffic by allowing access to the network only if the addressed channel (output port) is available. A packet denied access to the network is reflected back to its input port, which is thus informed of the packet status. Therefore, the traffic is not bogged down by acknowledgments between input and output ports. To achieve this result, each input of the network is controlled by a protection-against-collision (PAC) circuit located at a central hub. The PAC circuit uses the packet for probing the energy present in the addressed channel. The resulting signal controls an optical switch connecting the input port to the network. Thus, full optical connectivity is provided between ports controlled by electrical signals derived from simple optical power measurements     

Design and performance analysis on adaptive reservation-assisted collision resolution protocol for WLANs

In conventional IEEE 802.11 medium access control protocol, the distributed coordination function is designed for the wireless stations (WSs) to perform channel contention within the wireless local area networks (WLANs). Packet collision is considered one of the major issues within this type of contention-based scheme, which can severely degrade network performance for the WLANs. Research work has been conducted to modify the random backoff mechanism in order to alleviate the packet collision problem while the WSs are contending for channel access. However, most of the existing work can only provide limited throughput enhancement under specific number of WSs within the network. In this paper, an adaptive reservation-assisted collision resolution (ARCR) protocol is proposed to improve packet collision resulting from the random access schemes. With its adaptable reservation period, the contention-based channel access can be adaptively transformed into a reservation-based system if there are pending packets required to be transmitted between the WSs and the access point. Analytical model is derived for the proposed ARCR scheme in order to evaluate and validate its throughput performance. It can be observed from both analytical and simulation results that the proposed protocol outperforms existing schemes with enhanced channel utilization and network throughput.     

Technologies and building blocks for fast packet forwarding

We provide a review of the state of the art and the future of packet processing and switching. The industry's response to the need for wire-speed packet processing devices whose function can be rapidly adapted to continuously changing standards and customer requirements is the concept of special programmable network processors. We discuss the prerequisites of processing tens to hundreds of millions of packets per second and indicate ways to achieve scalability through parallel packet processing. Tomorrow's switch fabrics, which will provide node-internal connectivity between the input and output ports of a router or switch, will have to sustain terabit-per-second throughput. After reviewing fundamental switching concepts, we discuss architectural and design issues that must be addressed to allow the evolution of packet switch fabrics to terabit-per-second throughput performance     

The design and analysis of an ATM multicast switch with adaptivetraffic controller

The paper describes several improvements to a nonblocking copy network proposed previously for multicast packet switching. The improvements provide a complete solution to some system problems inherent in multicasting. The input fairness problem caused by overflow is solved by a cyclic running adder network (CRAN), which can calculate running sums of copy requests starting from any input port. The starting point can change adaptively in every time slot based on the overflow condition of the previous time slot. The CRAN also serves as a multicast traffic controller to regulate the overall copy requests. The throughput of a multicast switch can be improved substantially if partial service of copy request is implemented when overflow occurs. Call-splitting can also be implemented by the CRAN in a straightforward manner. Nonuniform distribution of replicated packets at outputs of the copy network may affect the performance of the following routing network. This output fairness problem due to underflow is solved by cyclically shifting the copy packets in every time slot. An approximate queueing model is developed to analyze the performance of this improved copy network. It shows that if the loading on each output of the copy network is maintained below 80%, the average packet delay in an input buffer would be less than two time slots     

The bypass queue in fast packet switching

The telecommunications networks of the future are likely to be packet switched networks consisting of wide bandwidth optical fiber transmission media, and large, highly parallel, self-routing switches. Recent considerations of switch architectures have focused on internally nonblocking networks with packet buffering at the switch outputs. These have optimal throughput and delay performance. The author considers a switch architecture consisting of parallel plans of low-speed internally blocking switch networks, in conjunction with input and output buffering. This architecture is desirable from the viewpoint of modularity and hardware cost, especially for large switches. Although this architecture is suboptimal, the throughput shortfall may be overcome by adding extra switch planes. A form of input queuing called bypass queuing can improve the throughput of the switch and thereby reduce the number of switch planes required. An input port controller is described which distributes packets to all switch planes according to the bypass policy, while preserving packet order for virtual circuits. Some simulation results for switch throughput are presented     

Throughput analysis, optimal buffer allocation, and trafficimbalance study of a generic nonblocking packet switch

A general model is presented to study the performance of a family of space-domain packet switches, implementing both input and output queuing and varying degrees of speedup. Based on this model, the impact of the speedup factor on the switch performance is analyzed. In particular, the maximum switch throughput, and the average system delay for any given degree of speedup are obtained. The results demonstrate that the switch can achieve 99% throughput with a modest speedup factor of four. Packet blocking probability for systems with finite buffers can also be derived from this model, and the impact of buffer allocation on blocking probability is investigated. Given a fixed buffer budget, this analysis obtains an optimal placement of buffers among input and output ports to minimize the blocking probability. The model is also extended to cover a nonhomogeneous system, where traffic intensity at each input varies and destination distribution is not uniform. Using this model, the effect of traffic imbalance on the maximum switch throughput is studied. It is seen that input imbalance has a more adverse effect on throughput than output imbalance     

Performance study of an input and output queueing ATM switch with a window scheme and a speed constraint

In this paper, we study the performance of an input and output queueing switch with a window scheme and a speed constraint. The performance of a non-blocking ATM switch can usually be improved by increasing the switching speed. Also, the performance of a switch can be improved using a window scheme by relaxing the first-in-firstout (FIFO) queueing discipline in the input queue. Thus, one can expect that a combined scheme of windowing and a speed constraint can improve further the performance of the packet switch. Here, we analyze the maximum throughput of the input and output queueing switch with a speed constraint combined with windowing, and show that it is possible to obtain high throughput with a small increment of speed-up and window size. For analysis, we model the HOL queueing system as a virtual queueing system. By analyzing the dynamics of HOL packets in this virtual queueing model, we obtain the service probability of the HOL server as a function of output contention capabilities. Using the result, we apply the flow conservation relation to this model and obtain the maximum throughput. The analytical results are verified by simulation.     

Optical CDMA for All-Optical Sub-Wavelength Switching in Core GMPLS Networks

Generalized multi-protocol label switching (GMPLS) is a multipurpose control-plane paradigm that extends the MPLS scheme allowing switching without recognizing packet boundaries. In this paper, we present a novel extension that exploits a new physical layer for switching in optical GMPLS. The proposed extension is achieved through adding an optical code switching layer, or code switch capable (CSC) layer, to the existing label mapping layers. Our proposal enables finer granularity at sub-wavelength level in all-optical GMPLS core switches, resulting in significant enhancements to traffic isolation capabilities for all-optical GMPLS core switches. We employ mathematical analysis to derive performance bounds for the proposed scheme, from both the labeling capacity and network throughput points of view. We use our analytical model to derive several optimum operating points for the network, and show that our techniques significantly improve the overall performance of all-optical core networks     

Fast ping‐pong arbitration for input–output queued packet switches

Input–output queued switches have been widely considered as the most feasible solution for large capacity packet switches and IP routers. In this paper, we propose a ping‐pong arbitration scheme (PPA) for output contention resolution in input–output queued switches. The challenge is to develop a high speed and cost‐effective arbitration scheme in order to maximize the switch throughput and delay performance for supporting multimedia services with various quality‐of‐service (QoS) requirements. The basic idea is to divide the inputs into groups and apply arbitration recursively. Our recursive arbiter is hierarchically structured, consisting of multiple small‐size arbiters at each layer. The arbitration time of an n‐input switch is proportional to log₄?n/2? when we group every two inputs or every two input groups at each layer. We present a 256×256 terabit crossbar multicast packet switch using the PPA. The design shows that our scheme can reduce the arbitration time of the 256×256 switch to 11 gates delay, demonstrating the arbitration is no longer the bottleneck limiting the switch capacity. The priority handling in arbitration is also addressed. Copyright © 2001 John Wiley & Sons, Ltd.     

Impact of Interference on Multi-Hop Wireless Network Performance

In this paper, we address the following question: given a specific placement of wireless nodes in physical space and a specific traffic workload, what is the maximum throughput that can be supported by the resulting network? Unlike previous work that has focused on computing asymptotic performance bounds under assumptions of homogeneity or randomness in the network topology and/or workload, we work with any given network and workload specified as inputs.A key issue impacting performance is wireless interference between neighboring nodes. We model such interference using a conflict graph, and present methods for computing upper and lower bounds on the optimal throughput for the given network and workload. To compute these bounds, we assume that packet transmissions at the individual nodes can be finely controlled and carefully scheduled by an omniscient and omnipotent central entity, which is unrealistic. Nevertheless, using ns-2 simulations, we show that the routes derived from our analysis often yield noticeably better throughput than the default shortest path routes even in the presence of uncoordinated packet transmissions and MAC contention. This suggests that there is opportunity for achieving throughput gains by employing an interference-aware routing protocol.