Linearity and power characteristics of SiGe HBTs at high temperatures for RF applications

In this paper, the power gain, power-added efficiency (PAE) and linearity of power SiGe heterojunction-bipolar transistors at various temperatures have been presented. The power characteristics were measured using a two-tone load-pull system. For transistors biased with fixed base voltage, the small-signal power gain and PAE of the devices increase with increasing temperature at low base voltages, while they decrease at high base voltages. Besides, the linearity is improved at high temperature for all voltage biases. However, for devices with fixed collector current, the small-signal power gain, PAE, and linearity are nearly unchanged with temperature. The temperature dependence of power and linearity characteristics can be understood by analyzing the cutoff frequency, the collector current, Kirk effect and nonlinearities of transconductance at different temperatures.     

Bipolar junction transistors fabricated in silicon-on-sapphire

The effects of processing temperature on collector leakage current in bipolar junction transistors (BJTs) fabricated in silicon-on-sapphire (SOS) were examined. At low process temperatures (850 degrees C) a reduction of five orders of magnitude in the collector leakage current was observed. Excellent I-V characteristics were obtained on both NPN and PNP transistors fabricated at lower temperatures. Measured DC current gain beta for the NPN devices was 30, and that of the PNP devices was 40. Additionally, current mode logic (CML) circuits fabricated using these transistors exhibited well behaved DC switching characteristics.<>     

Automatic Gate Biasing of an SCCMOS Power Switch Achieving Maximum Leakage Reduction and Lowering Leakage Current Variability

Power switch transistors are very effective in cutting the leakage currents of digital circuits in a deep-freeze mode, by de-supplying unused blocks. Among existing power switch transistors, Super Cut-off CMOS (SCCMOS) is the most suited to a low supply voltage environment since it uses a low threshold voltage transistor. This power switch type achieves good leakage reduction results, provided that an optimal voltage is applied on its gate in order to maximize the leakage gain. This optimal voltage value, depending on the operating conditions (process, voltage, temperature), cannot be determined at the design level. A polarization circuit, that automatically finds the optimal bias voltage whatever the environment conditions, was therefore designed and fabricated. This circuit, made in Bulk 65 nm technology, achieves more than two decades leakage current reduction at the power switch level, for a power dissipation overhead of 45 nW at ambient temperature. A very simple scheme is also presented to alleviate the voltage stress applied on the dielectric in case of an ageing of the latter, increasing its time-to-breakdown by several orders of magnitude.     

Low stress switching for efficiency

Power modules that turn on or off “softly,” at near zero voltage or current, promise marked gains in performance by cutting switching losses and allowing faster controls-to the likely benefit of power converters. Medium power inverters have undergone significant changes. One improvement stems from new power transistors such as insulated-gate bipolar transistors (IGBTs) with their increasing voltage- and current-carrying capabilities and increasing switching frequencies. Others derive from the use of digital signal processors and such modern control techniques as fuzzy logic and neural networks, as well as from advances in the applications of power converters that employ soft switching of the power devices. Soft-switching technologies promise marked gains in performance-lower losses and higher switching frequencies than those in the prevailing hard-switching technology. The idea is to switch a device only when the voltage across it, or the current through it, is zero. Representative soft switching converters include DC-to-DC converters rated at up to several hundred watts, as well as inductive chargers for electric vehicle batteries rated at up to 120 kW. Technologically speaking, advances in soft-switching inverters have arisen chiefly from enhancements to semiconductor power devices. Today, IGBTs lead the market for medium-power applications     

Base diffusion isolated transistors for low power integrated circuits

Base diffusion isolated transistors (BDI) designed for low power, nonsaturating, integrated circuits have been fabricated. Buried collectors are unnecessary in these low power devices, resulting in structures equivalent to discrete transistors in complexity of fabrication. A low-current power supply is required for isolation purposes. Transistor characteristics differ negligibly from those of standard transistors at collector currents <0.05 mA, and are satisfactory for application in linear circuits at currents up to at least 0.1 mA. Transistor fTis 80 MHz at 0.1 mA emitter current, 2 V collector voltage.     

Collector/emitter offset voltage in double-heterojunction bipolar transistors

Double-heterojunction bipolar transistors (DHBT) can exhibit a large collector/emitter offset voltage at zero collector current which will adversely affect digital switching circuits. It is shown that this effect results from insufficient grading at the base/collector heterojunction. A GaAlAs/GaAs DHBT grown by MBE having a 130 ? compositional grading at the emitter/base and base/collector junction showed no sign of the collector/emitter offset voltage.     

Comparison of heterostructure-emitter bipolar transistors (HEBTs) with InGaAs/GaAs superlattice and quantum-well base structures

The characteristics of InGaP/GaAs heterostructure-emitter bipolar transistors (HEBTs) including conventional GaAs bulk base, InGaAs/GaAs superlattice-base, and InGaAs quantum-well base structures are presented and compared by two-dimensional simulation analysis. Among of the devices, the superlattice-base device exhibits a highest collector current, a highest current gain and a lowest base–emitter turn-on voltage attributed to the increased charge storage of minority carriers in the InGaAs/GaAs superlattice-base region by tunneling behavior. The relatively low turn-on voltage can reduce the operating voltage and collector–emitter offset voltage for low power consumption in circuit applications. However, as to the quantum-well base device, the electrons injecting into the InGaAs well are blocked by the p⁺-GaAs bulk base and it causes a great quantity of electron storage within the small energy-gap n-type GaAs emitter layer, which significantly increases the base recombination current as well as degrades the collector current and current gain.     

The saturation characteristics of n-p-ν-n power transistors

The transport equations and charge-control concepts are applied in an analysis of a static conductivity-modulation mechanism occurring in the collector region of n-p-ν-n power transistors. This results in an expression for collector-emitter saturation voltage as a function of terminal currents and device parameters. An expression is derived which describes the current gain characteristics of saturated epitaxial and triple-diffused devices. The analysis is also used to illustrate the relationship between the emitter metallization resistance, collector charge storage, and the turn-off crowding mechanism experienced by high-frequency saturating transistor switches. An analysis of a time-dependent collector conductivity modulation process is used to derive an expression which describes the repetition frequency dependence of the collector-emitter saturation voltage of an epitaxial (or triple-diffused) transistor switching a square wave of collector current. It is concluded that frequency-dependent edge-crowding mechanisms occur only at much higher frequencies than those considered in this study.     

Ultralinear UHF power transistors for CATV applications

An investigation of the cross-modulation performance of UHF power transistors and its correlation with the gain parameter curves S21(IC, VCB) shows that such transistors today exhibit an inherent linearity limitation and are not optimized for ultralinear applications. This means that using higher power transistors does not result in a larger output signal with low cross-modulation distortion. Presented measurements clearly demonstrate that the nonlinear products increase, not only with increasing emitter dc current, but also with collector voltage above certain limiting values ICLand VCL, respectively; ICLand VCLare relatively small compared with the corresponding maximum permissible values of ICand VCB. Their existence can be explained by current crowding effects, by the space-charge limitation of the collector current, by the nonuniform thermal conductance, by the temperature gradients, and by the unequal current density distribution across the (large) active areas of power transistors. A correlation between the VCgain parameter falloff effect and the "thermal distortions," has been established. Design and selection criteria for ultralinear transistors needed in CATV amplifers are given. A simple linearity test method is described.     

Technology for the design of low-power circuits

Operation of integrated circuits at micropower levels requires transistors with adequate current gain at collector currents of 1 /spl mu/A and less and resistors of the order of 1 M/spl Omega/ within reasonable areas. Factors affecting current gain at low currents are discussed and design criteria presented that optimize gain at low collector current. A benefit of micropower operation is low-current noise. Factors tending to optimize noise performance are discussed. In order to obtain voltage gain at low collector current, high values of load resistance are required. Both passive and active loads suitable for incorporation in micropower integrated circuits are discussed.     

Design tradeoffs for improved V/sub CE(sat/) versus ICof bipolar transistors under forced gain conditions

Based on the quasi-saturation analysis of bipolar transistors and using numerical simulation, it is shown in this paper that the quasi-saturation performance of transistors under forced gain conditions can be improved by increasing the base-Gummel number if the emitter diffusion is also simultaneously altered to keep the active region current gain h_FEO constant. It is further shown that for a given h_FEO, if the ratio of h_FEO to the forced current gain β_f is below 10, the quasi-saturation performance of the transistors will be poor compared to those with h_FEO/β_f⩾10. Design curves obtained using numerical simulation are also presented to choose the quasi-saturation current limit of the transistors as a function of breakdown voltage and for different reach-through collector structures     

A switching lateral transistor

A switching phenomenon has been reported in certain lateral geometry transistors in silicon integrated circuits. These devices switch between conducting and nonconducting states at a critical value of VCE. A hypothesis for the mechanism has been proposed. In this paper an equivalent circuit is developed for the switching lateral transistor and is used to predict transistor behavior. The effect of manufacturing tolerances on the device switching voltage is investigated and a technique of production control is proposed. Circuits using the device are described in which the circuit switching voltage may be varied over a wide range. Some applications of the switching lateral transistor, as an overvoltage protection circuit and a relaxation oscillator, are described.     

Super-gain transistors for IC's

Transistors with current gains of 2000 to 10000 at collector currents less than 1 /spl mu/A can now be made in monolithic circuits. This is more than ten times the gain of present-day discrete transistors. The significance of this breakthrough is greatest for IC operational amplifiers as lower input bias currents are constantly being sought. Circuit techniques are available, namely bootstrapping and cascade connections, that take advantage of the high-current gain of one transistor type and the high-breakdown voltage of the second, producing the equivalent of a high gain, high-voltage device. This may double the number of transistors needed to perform a given function, but it is an economical approach for monolithic IC's as active devices have a relatively low cost.     

Effect of reverse base current on bipolar and BiCMOS circuits

A detailed study on the effect of reverse base current (RBC) on the switching behavior of bipolar BiCMOS circuits utilizing advanced high-performance bipolar transistors is presented. It is shown that as the collector doping N_c is increased to overcome the Kirk effect (base stretching) during the switching transient, the avalanche-generated reverse base current in the collector-base junction may cause problems for bipolar output devices switching out of saturation. A basic bipolar inverter and various BiCMOS driver circuits were simulated based on measured avalanche multiplication factors from advanced bipolar transistors with various collector doping N _c. In the case of the basic bipolar inverter, the reverse base current may prevent the switching device from being shut off completely during the on-to-off transition and a self-sustained state may result which reduces the output voltage swing. For the common-emitter (CE) BiCMOS driver, a similar self-sustained state may also occur with the added adverse effect of excessive leakage in standby. Design and scaling considerations are discussed     

Design and simulation of logic circuits with hybrid architectures of single-electron transistors and conventional MOS devices at room temperature

Single-electron transistors (SETs) provide current conduction characteristics comparable to CMOS technology and research shows that these devices can be used to develop logic circuits. It has been observed while building logic circuits that comprise only of SETs the voltage at the gate input had to be much higher than the power supply for the SET to have acceptable switching characteristics. This limitation in the gate and power supply voltages makes it practically inappropriate to build circuits. In this paper, we propose a hybrid architecture to overcome this limitation by combining conventional MOS devices with SETs. Three different types of hybrid circuits have been proposed and their characteristics have been studied using SPICE-based simulation tool which includes a SET-SPICE model.     

Maximum rapidly-switchable power density in junction triodes

The maximum power density which may be switched at (switching time/current gain) quotients comparable to 1/2πfαis shown to be 10⁵- 4 × 10⁵watts/cm²for p-n-p germanium transistors. This result is derived first for junction triodes in which the collector depletion layer at peak reverse voltage lies largely in a collector body of conductivity type opposite to that of the base; e.g., diffused base transistors of the mesa type. The limitation arises from the linear dependence of maximum (scattering limited) current density(J_{max})on collector-body impurity concentration(N_{Ac})and from the approximately reciprocal dependence of breakdown voltage(BV_{CB})on the same parameter. It is shown that space-charge limitation of current dennsity leads to a somewhat lower limit for intrinsic collector barriers of the same maximum width and, a fortiori, to a lower value for collector barriers lying largely in material of the same conductivity type as the base layer. Similar limits for n-p-n germanium and for silicon transistors are higher but generally comparable.     

多晶硅有晶体管直流特性研究

研究了砷注入多晶硅发射极晶体管的直流特性,并与采用常规平面工艺制作的晶体管性能的进行比较。结果表明多晶硅发射极晶体管具有较高的发射效率,高的电流能力,改善了ＥＢ击穿和ＣＢ击穿,电流增益依赖于淀积多晶硅前的表面处理条件。     

一种应用于PD的高精度限流保护调节电路

在POE(PowerOverEthernet)系统的终端受电设备中,限流保护调节电路保证了其稳定可靠工作。根据IEEE802.3af标准规定,受电设备开关电源启动到正常工作的过程中,电流要限制在100mA以内,在正常工作情况下电流要限制在390mA以下。本设计通过栅源比例电阻使采样功率管栅源电压与输出功率管的栅源电压保持一致,采样功率管精确采样输出功率管的电流值,采样电流经栅源比例电阻转换为电压后,调节输出功率管栅源电压,来完成PD(PowerDevice)限流保护。     

Recent advances in thin-film silicon devices on sapphire substrates

The growth of silicon films on insulating substrates, their fabrication into active devices, and the advantages of such devices, especially for fast memory applications, were previously reported. Recent advances in these devices are described, including techniques of material growth and characterization, fabrication procedures, and device results. Thin-film resistors and capacitors operating at UHF have been prepared. With improvements in the material and device processing, bipolar transistors with current gains of 20-40 and useful operation between 500 and 1000 MHz were fabricated. MOS triodes and tetrodes which operate at the same frequency range and silicon-gate MOSFETs (SIGFETs), with voltage gains between 50-150 having negligible feedback capacitances (less than 0.02 pF/electrode), have been made. Thresholds of 1.5 and 2.5 V for p- and n-type devices were obtained. Application of these devices for microwave ICs and subnanosecond switching networks are described.     

A novel SOI-MESFET with symmetrical oxide boxes at both sides of gate and extended drift region into the buried oxide

In this paper a novel structure for silicon on insulator metal semiconductor field effect transistors (SOI MESFETs) is proposed. The proposed structure contains two symmetrical oxide boxes at both sides of gate metal and extended drift region into the buried oxide which is named SO-ED-SOI-MESFET. SO-ED stands for symmetrical oxide boxes and extended drift region. DC and radio frequency characteristics of the SO-ED are analyzed by 2-D numerical simulation and compared with conventional SOI MESFET (C-SOI MESFET) characteristics. The obtained results demonstrate the superiorities of the proposed structure over C-SOI MESFET including increased breakdown voltage, higher driving current and improved RF characteristics. The extended drift region improves the current capability by increasing the effective channel thickness. The oxide region boosts the breakdown voltage due to its high tolerable electric field. Also, RF performance of the device is enhanced because of modified gate-source and gate-drain capacitances in the proposed structure. Unilateral power gain, maximum available gain and current gain experience 63, 52 and 63.5% improvement by applying the proposed structure, respectively. Thus the proposed structure can be considered as a proper candidate for using in high power and high frequency applications.