Process limitation and device design tradeoffs of self-aligned TiSi2 junction formation in submicrometer CMOS devices

Submicrometer CMOS transistors require shallow junctions to minimize punchthrough and short-channel effects. Salicide technology is a very attractive metallization scheme to solve many CMOS scaling problems. However, to achieve a shallow junction with a salicide structure requires careful optimization for device design tradeoffs. Several proposed techniques to form shallow titanium silicide junctions are critically examined. Boron, BF₂, arsenic, and phosphorus dopants were used to study the process parameters for low-leakage TiSi ₂ p⁺/n and n⁺/p junctions in submicrometer CMOS applications. It is concluded that the dopant drive-out (DDO) from the TiSi₂ layer to form a shallow junction scheme is not an efficient method for titanium salicide structure; poor device performance and unacceptably leaky junctions are obtained by this scheme. The conventional post junction salicide (PJS) scheme can produce shallow n⁺/p and p⁺/n junctions with junction depths of 0.12 to 0.20 μm below the TiSi₂. Deep submicrometer CMOS devices with channel length of 0.40 to 0.45 μm can be fabricated with such junctions     

Comparison of transformation to low-resistivity phase andagglomeration of TiSi2 and CoSi2

The phase transformation and stability of TiSi₂ on n ⁺ diffusions are investigated. Narrower n⁺ diffusions require higher anneal temperatures, or longer anneal times, than wider diffusions for complete transitions from the high-resistivity C49 phase to the low-resistivity C54 phase. A model is presented which explains this in terms of the probability of forming C54 nuclei on narrow diffusions and the influence of diffusion width on C54 grain size. The results are that more C49 and C54 nucleation events are required to completely transform narrow lines. For thin TiSi₂ (40 nm), there is a narrow process window for achieving complete transformation without causing agglomeration of the TiSi₂. The process window decreases with decreasing silicide thickness. A significantly larger process window is achieved with short-time rapid annealing. Similar studies are performed for CoSi₂ on n⁺ and p⁺ diffusions. No linewidth dependence is observed for the transformation from CoSi_x to CoSi₂. There is a broad process window from 575°C to 850°C using furnace annealing, for which the low-resistivity phase is obtained without causing agglomeration     

Molecular dynamics characterization of crystalline and amorphous TiSi2 phases

Molecular dynamics simulations by a tight binding potential provide new interesting information on the ground state properties of the TiSi₂ phases. In particular, we have compared some structural, elastic, thermodynamic and electronic properties of the C49, the C54 and the amorphous phases. It turns out that the C49 structure is much softer than the C54, also displaying a melting temperature some 300–400 K below the one for the C54, in agreement to very recent experimental results. The amorphous phase is energetically and structurally more akin to the C49 than to the C54 phase. On the basis of these results we suggest the higher formation kinetics of the former to be related to an intrinsic advantage in the growth stage.     

Influence of TiSi2 formation temperature on film thermal stability

This work is addressed to investigate thermal stability of a thin TiSi₂ film, that is its ability to resist degradation due to heat treatments at high temperatures. The study was carried out as a function of the formation RT treatment (675–750°C) at the end of a common process flow. Sheet resistance measurements were employed in order to evaluate this degradation. Electrical measures were performed on large and narrow poly-Si lines, on Van Der Pauw structures and on doped mono-Si substrates. An increase in sheet resistance value of an order of magnitude for silicide formed at temperatures below 700°C with respect to the one formed at temperatures above 700°C was found, particularly on poly-Si lines. The effect is detectable independently of the structure: it was observed also on 0.75-μm wide poly-Si lines, increasing when line width decreases. Different morphological analyses were carried out for investigating the influence of the formation temperature. We explain the increase of the final sheet resistance decreasing the formation temperature as a lower thermal stability of the TiSi₂ film, leading to a thermal grooving of the silicide grains.     

TEM investigation of Ti and Ti/Al bilayer as alternative diffusion barriers for Cu metallization for SAW device applications

The thermal stability of Ti and Ti/Al thin barrier layers for Cu metallizations of surface acoustic wave (SAW) devices has been investigated by resistance measurements and analytical transmission electron microscopy (TEM) using energy dispersive analysis (EDX), energy filtered analysis (EFTEM) within a temperature range between RT and 300 °C. Due to the strong increase of the sheet resistance of the sample containing the Ti/Al-barrier, structural changes in the Al layer lead to a failure at 300 °C, whereas the other sample containing Ti only as a barrier layer did not show any obvious structural changes.     

Anomalous Ti SALICIDE gate to source/drain shorts induced by dry Sietch during TiSi2 local interconnect formation

A new failure mode was observed in a 0.5 μm version of the silicided amorphous-silicon contact and interconnect (SAC) technology. Massive PMOS gate to source/drain shorts were found. The cause is attributed to formation of Ti during the Si etch. The fluorinated Ti surface fails to form adequate TiN diffusion barrier during subsequent rapid thermal annealing (RTA) in N₂ or NH₃ ambient. Si diffuses from the polycrystalline Si gate and/or the p-type source/drain onto the spacer, reacts with Ti and forms resistive leakage paths. A blanket low-dose, low-energy As implant prior to Ti deposition corrects this problem without adversely changing device characteristics     

Determination of nonlinear coefficientn2/Aeff using self-aligned interferometer andFaraday mirror

A method for measuring the nonlinear coefficient n₂/A _eff in telecom fibres at 1550 nm is presented. The method is based on determining the Kerr phase shift detected by a self-aligned interferometer incorporating a Faraday mirror. This makes the setup very robust, and different test fibres can be measured without the need for any further readjustments     

Effects of CH2F2 and H2 flow rates on process window for infinite etch selectivity of silicon nitride to ArF PR in dual-frequency CH2F2/H2/Ar capacitively coupled plasmas

The process window for the infinite etch selectivity of silicon nitride (Si₃N₄) layers to ArF photoresist (PR) and ArF PR deformation were investigated in a CH₂F₂/H₂/Ar dual-frequency superimposed capacitive coupled plasma (DFS-CCP) by varying the process parameters, such as the low frequency power (P_LF), CH₂F₂ flow rate, and H₂ flow rate. It was found that infinitely high etch selectivities of the Si₃N₄ layers to the the ArF PR on both the blanket and patterned wafers could be obtained for certain gas flow conditions. The H₂ and CH₂F₂ flow rates were found to play a critical role in determining the process window for infinite Si₃N₄/ArF PR etch selectivity, due to the change in the degree of polymerization. The preferential chemical reaction of hydrogen with the carbon in the hydrofluorocarbon (CH_xF_y) layer and the nitrogen on the Si₃N₄ surface, leading to the formation of HCN etch by-products, results in a thinner steady-state hydrofluorocarbon layer and, in turn, in continuous Si₃N₄ etching, due to enhanced SiF₄ formation, while the hydrofluorocarbon layer is deposited on the ArF photoresist surface.     

Impact of Ge implantation on the electrical characteristics of TiSi2 p+/n shallow junctions with an a-Si (or apoly-Si) buffer layer

A new technology for forming a titanium-silicide shallow junction by combining germanium implantation with an amorphous-silicon (or a poly-silicon) buffer layer has been proposed for MOSFETs. The use of a buffer layer between Ti and Si can avoid the consumption of bulk-silicon and the recession of TiSi₂ film into the source/drain junctions during the silicidation process. In this study, the important role of germanium-implantation on the formation of TiSi₂ contacted p⁺/n junctions was examined. After subsequent implantation of Ge⁺ and B⁺ into the TiSi₂ film, samples were annealed at different temperatures to form p ⁺/n junctions and C54-TiSi₂. Since the penetration of titanium atoms was suppressed due to the germanium-implantation, the periphery leakage and the generation leakage were improved and TiSi₂/Si interfaces were even smooth. Therefore, p⁺/n junctions with a very low leakage current (0.192 nA/cm ² at -5 V) and an excellent forward ideality factor (n≈1.002) can be obtained. From the secondary ion mass spectrometry (SIMS) analysis, the junction depth is 400     

超薄SiO2/HfO2双层栅介质的时变击穿特性和击穿机制的研究

The characteristics of TDDB （time-dependent dielectric breakdown） and SILC （stress-induced leakage current） for an ultra-thin SiO2/HfO2 gate dielectric stack are studied. The EOT （equivalent-oxide-thickness） of the gate stack （Si/SiO2/HfOz/TiN/TiA1/TiN/W） is 0.91 am. The field acceleration factor extracted in TDDB experi- ments is 1.59 s.cm/MV, and the maximum voltage is 1.06 V when the devices operate at 125 ℃ for ten years. A detailed study on the defect generation mechanism induced by SILC is presented to deeply understand the break- down behavior. The trap energy levels can be calculated by the SILC peaks： one S1LC peak is most likely to be caused by the neutral oxygen vacancy in the HfO2 bulk layer at 0.51 eV below the Si conduction band minimum; another SILC peak is induced by the interface traps, which are aligned with the silicon conduction band edge. Fur- thermore, the great difference between the two SILC peaks demonstrates that the degeneration of the high-k layer dominates the breakdown behavior of the extremely thin gate dielectric.     

Monitoring of TiSi2 formation on narrow polycrystallinesilicon lines using Raman spectroscopy

Micro-Raman spectroscopy is used to monitor titanium silicide (TiSi₂) formation on narrow undoped polycrystalline silicon lines. Linewidths varying from 1.0 μm down to 0.35 μm, with silicidation by rapid thermal anneal (RTA) temperature ranging between 780°C and 1020°C were analyzed. Phase changes between C49 and C54-TiSi₂ phases were clearly observed. Results demonstrate that analysis of the C54-TiSi₂ Raman peak intensity allowed fast and nondestructive estimation of the process window for low resistivity C54-TiSi₂ formation. Comparison with sheet resistivity measurements showed that micro-Raman scattering provides a complimentary means to electrical analysis for the study of TiSi₂ formation     

Performance improvement of self-aligned HfO2/TaN and SiON/TaN nMOS transistors

Direct-etched HfO₂/TaN nMOS transistors were fabricated. The performance of the transistors with aggressively scaled EOT is comparable or better than that of SiO₂/poly transistors. The performance enhancement requires a combination of EOT scaling and an appropriate interface layer control. The performance of the direct-etched TaN gated HfO₂ based transistors is also compared to the performance of similar TaN gated SiON based transistors. It is observed that for equal g_m the leakage is lower for HfO₂ based transistors, despite the lower EOT for the HfO₂ based devices.     

Formation of TiSi2 and shallow junction byAs+ ion-beam mixing and infrared rapid heat treatment

A technique for forming shallow junctions with low-resistance silicide contacts developed for the use in VLSI with scaled MOSFETs is discussed. The salicide (self-aligned silicide) MOSFET gate and source-drain features self-aligned refractory metal silicide and are isolated from one another even without any insulating spacer on the gate sides. A critical step in such a MOSFET fabrication process is the ion implantation through metal silicidation technique, which includes As⁺ ion-beam-induced titanium-silicon interface mixing and infrared rapid heat treatment to form simultaneously the n⁺-p junction and a high-quality TiN covered TiSi₂ contact layer     

Investigation of C49–C54 TiSi2 transformation kinetics

The C49C54 TiSi₂ polymorphic transformation has been investigated trying to elucidate the relative role played by nucleation and growth in silicide formation. Samples having an amorphous layer and C54 seeds have been made by heat treatment of a Ti/Si bi-layer structure and subsequent suitable Ar ion implantation. In situ resistance measurements performed during heat treatments in controlled and purified atmosphere at constant heating rates and ex situ X-ray diffraction, MeV ⁴He⁺ backscattering spectrometry and cross-section transmission electron microscopy have been used to characterize the samples. The results show that in a sample with C49 the C54 nucleation occurs at 800°C; when C54 seeds are present the growth is appreciable already at temperatures as low as 400–500°C. It has also been shown that nucleation and growth of the C49 phase is a process competitive to the growth of the C54 phase.     

Effects of thermal processes after silicidation on the performanceof TiSi2/polysilicon gate device

The effects of thermal processes after silicidation on the gate depletion, threshold voltage (V_th) shift, drive current, and sheet resistance of TiSi₂/polysilicon (Ti-polycide) gate devices are evaluated. The dopant depletion of the polysilicon film, which is known to increase the V_th and to degrade the drive-current, increases with increasing temperature of the post-thermal process. However, the V_th roll-off characteristic in nMOSFETs is enhanced with increasing temperature. Furthermore, the drive-current is significantly degraded by the gate reoxidation process. The sheet resistance of the Ti-polycide gate increases with gate reoxidation as well as with increased post-thermal processes     

Improved electrical properties using SrTiO3/Y2O3 bilayer dielectrics for MIM capacitor applications

In this paper, we show that the capacitance–voltage linearity of MIM structures can be enhanced using SrTiO₃ (STO)/Y₂O₃ dielectric bilayers. The C(V) linearity is significantly improved by combining two dielectric materials with opposite permittivity-voltage responses. Three STO/Y₂O₃ stacks with different thicknesses were realized and compared to a 20 nm STO single layer structure. We observed that an increase in the Y₂O₃ thickness leads to an improvement in the voltage linearity, while maintaining an overall capacitance density greater than 10 fF/μm².     

Control of mode profiles in proton-diffused LiNbO3waveguides using self-aligned SiO2 cladding

Channel waveguides fabricated in LiNbO₂ by proton diffusion with a self-aligned SiO₂-cladding structure are discussed. Proton diffusion in width and depth directions is amenable to process parameters, so that it provides a simple method for control of mode profiles. Using this method, symmetric depth mode profiles and an aspect ratio of 1.15 at λ=0.6328 μm have been achieved for efficient fiber-to-waveguide coupling     

Texture and electromigration lifetime improvements in layered Al-alloy metallization with underlying Ti by controlling water adsorption on SiO2 substrates

The effect of residual gas constituents and substrate temperature during Ti sputtering on the texture of TiN/Ti films deposited on SiO₂/Si substrates has been investigated. The Ti(002) and TiN(111) preferred texture of the films deposited at 350°C was found to be improved drastically by increasing the H₂O partial pressure from 1×10⁻⁹ to 3×10⁻⁸ Torr. Both of the Ti(002) and TiN(111) textures showed a similar H₂O partial pressure and substrate temperature dependence because of the epitaxial transfer between these planes. The improved Ti(002) texture was attributed to the self-assembly of Ti atoms on the SiO₂ surface, which had a low surface free energy due to the formation of surface OH groups. Two kinds of layered Al-alloy interconnects, AlSiCu/Ti/TiN/Ti and AlCu/TiN/Ti, were fabricated with the highly textured TiN/Ti film, and their Al(111) texture and electromigration lifetime were then evaluated. It was confirmed that both of the interconnects have strong Al(111) texture and longer EM lifetimes.     

The influence of Ti capping layers on CoSi2 formation

Cobalt silicide formation is very sensitive to the presence of oxygen. Oxygen contamination may originate from different sources: impurities in the annealing ambient, oxygen incorporated within the deposited Co layer and interfacial oxide at the Co/Si interface. In this work, it is shown that the cause of the sensitivity towards oxygen contamination is the formation of a SiO_x diffusion barrier between CoSi and the unreacted Co. This causes an increase in the activation energy for CoSi formation. Furthermore, we will show that a titanium capping layer eliminates the sensitivity of CoSi₂ formation for oxygen contamination, thus improving the formation of CoSi₂ layers.     

CO2激光化学气相沉积a-Si:H薄膜

用输出功率为50W的CW CO2激光照射纯硅烷(SiH4)气体得到了a-Si:H薄膜。沉积速率达到200/min。用电子衍射方法测定了所沉积的薄膜是非晶态的。测量了薄膜的光电导率和暗电导率,其比值达104量级。用紫外可见光谱分析了薄膜的光学性质,计算出光能隙为1.44～2.0eV。得到了沉积速率、光电导率、暗电导率、光学能隙随基片温度变化的关系曲线。阐述了CO2激光化学气相沉积a-Si:H薄膜的机理。