SiP的最新技术动向

1、SiP技术的需求 当今的信息化社会促进了小型便携式电子设备系统的多功能化,并进一步促进了多媒体处理和网络功能的融合。为了应对这些要求,仅采用原本的SOC（System On Chip）则在功能上和成本上都不相适应了,故而SiP（System In Package）应时而生。SiP原本是为应对某些设备制造的SOC工艺技术水平而采取的措施,而如今却成了比最尖端的SOC工艺技术还要先进的解决方案和工艺指南。     

SiP可能最终取代SOC

为了提高系统性能、降低功耗,SOC产品目前正在大行其道,但芯片体积和开发成本却遇到了强大的障碍。一些半导体供应商正在考虑一项新的技术SiP(Systeminapackage),希望能取代倍受争议的SOC产品。SiP技术是将多个IC以及所需的分立和无源器件集成在一个封装内,形成的模块化标准产品可以象普通的器件一样在电路板上进行组装。在SOC产品中只有一个小片(die),SiP则包括多个堆叠在一起的小片,或将多个stacks整合在同一个衬底(substrate)上。这种高密度的封装技术与传统的采用分立和无源器件的设计相比,可显著改善性能,有些专家甚至预计,系…     

系统级封装（SiP）技术发展与应用综述

小型化、轻量化、高性能、多功能、高可靠性和低成本是电子产品的总体发展趋势,在过去的十几年里,MCM和SoC等技术在微电子领域发挥了重要的作用。今天,SiP技术以其设计的灵活性、产品的高可靠性和制造的低成本化等特点脱颖而出,引起了业界的高度关注和重视,成为替代MCM和SoC等技术的一种理想的系统封装技术解决方案。本文阐述了SiP技术的定义和特点,比较了SiP与SoC的技术异同点,探讨了SiP技术的关键性技术问题及其典型的应用领域。     

SiP协调设计与PI解析(1)

概述了SiP协调设计和PI解析: (1)SiP与协调设计,(2)SiP的形态.     

CADENCE最新套件推动系统级封装设计主流化

法国尼斯CDNLive大会消息：Cadence设计系统有限公司宣布推出业界第一套完整的、能够推动SiP IC设计主流化的EDA产品。Cadence解决方案针对目前SiP设计中依赖‘专家工程’的方式存在的固有局限性，提供了一套自动化、整合的、可信赖并可反复采用的工艺，以满足无线和消费产品不断提升的需求。这套新产品包括Cadence Radio Frequency SiP Methodology Kit，两款新的RFSiP产品（Cadence SiP RF架构和Cadence SiP RF版图）以及三款新的数字SiP产品（Cadence SiP数字架构，Cadence SiP数字信号完整和Cadence SiP数字版图）。     

Cadence最新套件推动系统级封装设计主流化

近日．Cadence设计系统有限公司宣布推出业界第一套完整的能够推动SiPIC设计主流化的EDA产品。Cadence解决方案针对目前SiP设计中依赖“专家工程”方式存在的固有局限性．提供了一套自动化、整合的、可信赖并可反复采用的工艺以满足无线和消费产品不断提升的需求。这套新产品包括Cadence Radio Frequency SiP Methodology Kit、两款新的RF SiP产品（Cadence SiP RF架构和Cadence SiP RF版图）以及3款新的数字SiP产品（Cadence SiP数字架构、Cadence SiP数字信号完整和Cadence SiP数字版图）。     

一种基于SiP技术的加速度计有源磁悬浮控制电路

加速度计是以加速度的观点来测量物体运动的传感器,它通过检测质量块的惯性力来测量载体的线加速度或角加速度。文中介绍的有源磁悬浮控制电路与陀螺浮子构成磁悬浮摆式积分陀螺加速度计,该加速度计具有量程大、测量精度高等优点。受整机系统内部装配空间的限制,在电路集成化产品的设计中,采用系统集成封装(SiP)技术设计与制作有源磁悬浮控制电路,减小电路产品的底面积和高度,适应整机系统对产品的装配和使用要求。同时详细介绍了基于SiP技术的电路设计方法,对HTCC工艺的SiP结构设计进行了阐述,并简述了HTCC工艺的SiP产品达到的技术性能和应用情况。     

基于SiP技术的多片DDR3高速动态存储器设计

基于系统级封装(System in Package,SiP)技术,结合自研自主可控DSP处理器“魂芯”II-A和多片DDR3颗粒,详细介绍了一款高速动态存储控制一体化SiP设备的设计方案和仿真验证分析结果。重点介绍了此款SiP的电路拓扑设计、版图设计,并从拓扑结构波形仿真、DDR3时序裕量计算、与板级实现方案对比三方面对其PCB后仿进行了分析和验证,仿真结果符合规范要求,证明了所采用的Fly-By拓扑适用于CPU与多片DDR3颗粒所组成的一体化SiP设备,且SiP设备性能优于板级实现方案。     

鱼与熊掌:SoC,还是SiP?

本文分析了SoC和SiP的各自特点,指出SiP是一种充满前途的芯片形式,但是缺乏标准和设计工具将制约SiP的成长.     

系统级封装(SiP)技术研究现状与发展趋势

系统级封装(System in Package,SiP)已经成为重要的先进封装和系统集成技术,是未来电子产品小型化和多功能化的重要技术路线,在微电子和电子制造领域具有广阔的应用市场和发展前景,发展也极为迅速。对目前SiP技术的研究现状和发展趋势进行了综述,重点关注了国际上半导体产业和重要的研究机构在SiP技术领域的研究和开发,对我国SiP技术的发展做了简单的回顾和展望。     

Signal Integrity Flow for System-in-Package and Package-on-Package Devices

As data rates required for systems in package (SiPs) increase and their complexity increases, signal integrity issues become increasingly difficult to address. The design flow of the SiP should therefore take into account these issues from the beginning. A design flow aimed at designing the SiP tracks is presented; its suitability for the design of packages comprising multiple stacked memories is verified through a design example. The proposed flow for signal integrity can be integrated easily within the complete design of the SiP.      

集成两路射频SiP发射器的设计和研究

随着移动通信和其它电子应用领域的不断进步,系统集成需求日益紧迫。除了可以应对系统性能、功能、成本和小型化的更高要求,系统级封装(SiP)在降低开发成本、实施灵活设计、缩短开发周期,和集成异质芯片上也有突出优势。这篇文章介绍了一个可用于手机基站系统的双通路发射系统SiP模块的开发。我们用计算模拟方法辅助优化设计,并成功制造和验证了SiP模块。SiP为内嵌电磁干扰屏蔽罩的12mmx12mmx1.9mm的多层栅格阵列封装(LGA)。各种射频信号性能均通过测试,包括严格的隔离度要求。电磁屏蔽测试和计算模拟结果高度吻合。最后,文章介绍了一种高效的计算模拟方法,极大地缩短了计算模拟的时间,并对未来射频SiP开发将提供有力帮助。     

SoC and SiP, the Yin and Yang of the Tao for the New Electronic Era

“More than Moore” is becoming the password for these coming years. New steps to overcome technology limitations to diffuse, on the same die, different chips to have a complete system have been developed. This approach is called system in package (SiP), a way to have in a package dies of logic, analog, memory, passive components, etc., assembled to obtain a miniaturized board. SiP performances and limitations are here analyzed to understand advantages versus system on chip (SoC). This paper is a discussion about the main items that can lead to the choice of the right approach—SiP or SoC—before a system design start. Three persons attend to our virtual meeting: an SoC technology development manager, expert in microcontroller embedded memories and technology integration; an SiP analog radio-frequency design senior expert; and a moderator that designed embedded memories and now SiP, all involved to understand how to reach a tradeoff among these two approaches. Like for the Yin and Yang, symbol of the equilibrium for the Taoist philosophy, the two opposites divide the circle of the life, with a piece of each in the other.      

一种系统级封装的ESD保护技术

介绍了一种系统级封装(SiP)的ESD保护技术.采用瞬态抑制二极管(TVS)构建合理的ESD电流泄放路径,实现了一种SiP的ESD保护电路.将片上核心芯片的抗ESD能力从HBM 2 000 V提升到8 000 V.SiP ESD保护技术相比片上ESD保护技术,抗ESD能力提升效果显著,缩短了开发周期.该技术兼容原芯片封...     

一种用于胎压传感器的新型系统级封装技术

TPMS IC是TPMS系统模块的关键核心器件,需要采用系统级封装(SiP)技术。对TPMS IC的一种新型SiP封装技术作了研究分析。在引线框架上引入电路板中介层,改善了芯片间电气互连与分布,增大了引入薄膜电阻电容元件的设计弹性。采用预成型模制部分芯片的封装技术,满足了IC与MEMS芯片不同的封装要求,还增强了SiP产品的可测试性和故障可分析性。采用敞口模封、灌装低应力弹性凝胶和传感器校准测试相结合的方法有效避免封装应力对MEMS压力传感器的影响。     

Wireless Dosimeter: System-on-Chip Versus System-in-Package for Biomedical and Space Applications

A new floating-gate (FG) MOSFET based wireless dosimeter system-in-package (SiP) is presented. This miniature and completely integrated wireless dosimeter SiP comprises a CMOS FG radiation sensor and transmitter (TX) in a low-temperature co-fired ceramic (LTCC) package. The design is very well suited to wireless transmission of radiation sensor data in radiotherapy and to Extra Vehicular Activity Radiation Monitoring (EVARM) in space. Two different solutions, namely system-on-chip (SoC) and SiP, are demonstrated. In the SoC, which is size and power efficient, the TX includes an on-chip loop antenna which also acts as the inductor for the VCO resonant tank circuit. The SiP solution has an LTCC antenna with optimized impedance to conjugate match the TX chip. The radiation sensor demonstrates a measured sensitivity of 5 mV/rad. The SoC module size is only 2 ${hbox {mm}}^{2}$, consumes 5.3 mW of power and delivers $-$0.9 dBm of radiated power, sufficient to communicate with a low noise receiver connected to an off-chip patch antenna placed 1.38 m away. The SiP design provides a larger communication range of 75 m at the cost of additional power consumption and size.      

射频系统的系统级封装

论述了高速数据处理和高密度封装技术的特点及对射频系统封装的特殊要求,介绍了射频系统封装的基本技术和一种包含LNA、PPA、滤波器及天线开关的射频系统级封装模块.概述了射频系统级封装的设计、仿真和测试的方法和步骤.     

Fast reliability qualification of SiP products

For the purpose of rapidly identifying the functional weak points of SiP products and defining appropriate design rules, a new methodology is proposed to achieve fast reliability qualification. This new methodology is based on the moisture absorption behavior along the critical interface of a SiP carrier and on the most sensitive zone to delamination of the SiP carrier, determined by simulation and experimentally checked. In this paper, a new accelerated preconditioning is proposed and a new non destructive thermal method to monitor the delamination is presented. The effectiveness of this new stress test to accelerate the failure mechanism of the SiP carrier and the ability to detect delamination are evaluated by performing a DOE.