Small Signal Analysis of Energy Factor and Mathematical Modeling for Power DC–DC Converters

Mathematical modeling for power dc-dc converters is a historical problem accompanying dc-dc conversion technology since the 1940s. The traditional mathematical modeling is not available for complex structure converters since the differential equation order increases very high. We have to search for other ways to establish mathematical modeling for power dc-dc converters. We have defined energy factor (EF) and new mathematical modeling for power dc-dc converters that have attracted much attention in recent years. This paper describes the small signal analysis of EF and mathematical modeling for power dc-dc converters in continuous conduction mode and discontinuous conduction mode. EF and the subsequential parameters can illustrate the unit-step response and interference recovery. This investigation may be helpful for system design and dc-dc converters characteristics. Two dc-dc converters: Buck converter and super-lift Luo-converter as the samples, are analyzed in this paper to demonstrate the applications of EF, pumping energy, stored energy (SE), capacitor/inductor SE ratio, energy losses, time constant tau, and damping time constant tau_d     

Analysis and Design for a New ZVS DC–DC Converter With Active Clamping

A new zero voltage switching (ZVS) boost converter is presented in this paper. By using an auxiliary switch and a capacitor, ZVS for all switches is achieved with an auxiliary winding in one magnetic core. A small diode is added to eliminate the voltage ringing across the main rectifier diode. This clamping technique can also be utilized in other dc-dc converters, and a family of new ZVS dc-dc converter is derived. A prototype (500 W/193 kHz) is made to verify the theoretical analysis. The efficiency is higher than 94% at 90-V input at full load     

Novel zero-Voltage-transition PWM DC-DC converters

A new family of zero-voltage-switching (ZVS) pulsewidth-modulated (PWM) converters that uses a new ZVS-PWM switch cell is presented in this paper. Except for the auxiliary switch, all active and passive semiconductor devices in the ZVS-PWM converters operate at ZVS turn ON and turn OFF. The auxiliary switch operates at zero-current-switching (ZCS) turns ON and OFF. Besides operating at constant frequency, these new converters have no overvoltage across the switches and no additional current stress on the main switch in comparison to the hard-switching converter counterpart. Auxiliary components rated at very small current are used. The principle of operation, theoretical analysis, and experimental results of the new ZVS-PWM boost converter, rated 1 kW, and operating at 80 kHz, are provided in this paper to verify the performance of this new family of converters.     

DC-DC变换器的大信号建模及鲁棒控制方法

本文从工程实践的要求出发,将建模和控制器的设计紧密结合,提出了一种新型DC-DC变换器大信号建模方法,基于这一模型,将线性时变不确定系统的鲁棒控制方法应用于DC-DC变换器的控制器设计.本文所提出的建模和控制器设计方法适用于全部四种基本PWM型DC-DC变换器.计算机仿真和实验证明,本文设计的控制器对输入电源电压扰动和线性负载电阻扰动具有良好的鲁棒性,且实现方案简单易行.     

Calculation and stability investigation of periodic steady states of the voltage controlled Buck DC-DC converter

A new method for investigating the complex dc-dc converters dynamics is suggested in this paper. The method is based on the formulation of a nonlinear difference equation with respect to the duty cycle. This equation embodies the nonlinear and discrete-time characteristics of dc-dc converters and allows both the calculation of normal and subharmonic steady states and their local stability analysis. The method is presented through the analysis of a voltage controlled Buck dc-dc converter.     

New family of zero-current-switching PWM converters using a new zero-current-switching PWM auxiliary circuit

A new family of zero-current-switching (ZCS) pulsewidth-modulation (PWM) converters using a new ZCS-PWM auxiliary circuit is presented in this paper. The main switch and auxiliary switch operate at ZCS turn-on and turn-off, and the all-passive semiconductor devices in the ZCS-PWM converters operate at zero-voltage-switching (ZVS) turn-on and turn-off. Besides operating at constant frequency and reducing commutation losses, these new converters have no additional current stress and conduction loss in the main switch in comparison to the hard-switching converter counterpart. The PWM switch model and state-space averaging approach is used to estimate and examine the steady-state and dynamic character of the system. The new family of ZCS-PWM converters is suitable for high-power applications using insulated gate bipolar transistors (IGBTs). The principle of operation, theoretical analysis, and experimental results of the new ZCS-PWM boost converter, rated 1.6 kW and operating at 30 kHz, are provided in this paper to verify the performance of this new family of converters.     

Sustained Slow-Scale Oscillation in Higher Order Current-Mode Controlled Converter

DC-DC converters under current-mode control have been known to exhibit slow-scale oscillation as a result of a Hopf-type bifurcation as one or more of the parameters of the outer voltage loop are varied. In the absence of the outer voltage loop (i.e., open loop), slow-scale oscillation was generally not observed in simple low-order dc-dc converters, i.e., buck, buck-boost, and boost converters. In this paper, slow-scale bifurcation in a higher order current-mode controlled converter is studied. It has been found experimentally that, even in the absence of a closed outer voltage loop, a current-mode controlled Cuk converter can exhibit a slow-scale Hopf-type bifurcation. The phenomenon was observed in a commercial low-ripple dc-dc converter which has been designed using the Cuk converter and the LM2611 controller. Such slow-scale oscillation of the inner current loop can also be observed in full-circuit SPICE simulations. An averaged model has been developed and implemented in SPICE to find the Hopf bifurcation boundaries. With this averaged model, the Hopf bifurcation can be explained conveniently using the traditional loop gain analysis. Specifically, the extra degrees of freedom in higher order dc-dc converters have opened up a new possible mode of instability which has not been found in simple low-order dc-dc converters.     

Novel zero-current-switching PWM converters

This paper presents a new family of pulsewidth-modulated (PWM) converters, featuring soft commutation of the semiconductors at zero current (ZC) in the transistors and zero voltage (ZV) in the rectifiers. Besides operating at constant frequency and with reduced commutation losses, these new converters have output characteristics similar to the hard-switching-PWM counterpart, which means that there is no circulating reactive energy that would cause large conduction losses. The new family of zero-current-switching (ZCS)-PWM converters is suitable for high-power applications using insulated gate bipolar transistors (IGBTs). The advantages of the new ZCS-PWM boost converter employing IGBTs, rated at 1.6 kW and operating at 20 kHz, are presented. This new ZCS operation can reduce the average total power dissipation in the semiconductors practically by half, when compared with the hard-switching method. This new ZCS-PWM boost converter is suitable for high-power applications using IGBTs in power-factor correction. The principle of operation, theoretical analysis, and experimental results of the new ZCS-PWM boost converter are provided in this paper to verify the performance of this new family of converters     

Dual-bridge DC-DC converter: a new topology characterized with no deadtime operation

Two new topologies characterized by no deadtime and small valued filter inductor, the Dual-Bridge dc-dc converter and the Dual-Bridge dc-dc converter with ZVS, are presented and analyzed. Compared to the conventional Full-Bridge converter, the dc-dc converters with the proposed topologies have lower input current ripple, less stress on power switching components and smaller output filter inductor. Simple self-driven synchronous rectification can be used in the new topologies for high efficiency implementation. Prototype dc-dc converters have been tested for the verification of the principles. Both simulations and experiments verify the feasibility and advantages of the new topologies. The advantages and disadvantages of the topologies are discussed.     

Low-voltage-swing monolithic dc-dc conversion

A low-voltage-swing MOSFET gate drive technique is proposed in this paper for enhancing the efficiency characteristics of high-frequency-switching dc-dc converters. The parasitic power dissipation of a dc-dc converter is reduced by lowering the voltage swing of the power transistor gate drivers. A comprehensive circuit model of the parasitic impedances of a monolithic buck converter is presented. Closed-form expressions for the total power dissipation of a low-swing buck converter are proposed. The effect of reducing the MOSFET gate voltage swings is explored with the proposed circuit model. A range of design parameters is evaluated, permitting the development of a design space for full integration of active and passive devices of a low-swing buck converter on the same die, for a target CMOS technology. The optimum gate voltage swing of a power MOSFET that maximizes efficiency is lower than a standard full voltage swing. An efficiency of 88% at a switching frequency of 102 MHz is achieved for a voltage conversion from 1.8 to 0.9 V with a low-swing dc-dc converter based on a 0.18-/spl mu/m CMOS technology. The power dissipation of a low-swing dc-dc converter is reduced by 27.9% as compared to a standard full-swing dc-dc converter.     

A design method for paralleling current mode controlled DC-DC converters

This paper proposes a new current sharing method. It is based on current mode controlled dc-dc converters and achieves the current sharing by forcing all inner current loops to have the same current reference. Meanwhile, this method decouples control loops from the voltage regulation and current-sharing regulation instead of adding control loops as in traditional master-slave methods. Therefore, the large signal performance is good while its stability is guaranteed. Further, unlike multi-module methods, the modularity of single dc-dc converter is retained. Design rules and small signal analysis are presented. The advantages of the proposed method are verified by experimental results.     

A New Family of Zero-Current-Switching (ZCS) PWM Converters

A new family of zero-current-switching (ZCS) pulsewidth-modulated (PWM) converters which uses a new ZCS-PWM switch cell is presented in this paper. The main switch and auxiliary switch operate at ZCS turn-on and turn-off, and all the passive semiconductor devices in the ZCS-PWM converter operate at zero-voltage-switching (ZVS) turn-on and turn-off. Besides operating at constant frequency and with reduced commutation losses, these new converters have no additional current stress in comparison to the hard-switching converter counterpart. The new family of ZCS-PWM converters is suitable for high-power applications using insulated gate bipolar transistors (IGBTs). The PWM switch model and state-space averaging approach is used to estimate and examine the steady-state and dynamic character of the system. The principle of operation, theoretical analysis, and experimental results of the new ZCS-PWM boost converter, rated 1 kW and operating at 30 kHz, are provided in this paper to verify the performance of this new family of converters.     

Single-phase Z-source PWM AC-AC converters

The letter proposes a new family of simple topologies of single-phase PWM ac-ac converters with a minimal number of switches: voltage-fed Z-source converter and current-fed Z-source converter. By PWM duty-ratio control, they become "solid-state transformers" with a continuously variable turns ratio. All the proposed ac-ac converters in this paper employ only two switches. Compared to the existing PWM ac-ac converter circuits, they have unique features: providing a larger range of output ac voltage with buck-boost, reversing or maintaining phase angle, reducing in-rush and harmonic current, and improving reliability. The operating principle and control method of the proposed topologies are presented. Analysis, simulation, and experimental results are given using the voltage-fed Z-source ac-ac converter as an example. The analysis can be easily extended to other converters of the proposed family. The proposed converters could be used in voltage regulation, power regulation, and so on.     

An improved ZCS-PWM commutation cell for IGBT's application

An improved zero-current-switching pulsewidth-modulation (ZCS-PWM) commutation cell is proposed, which is suitable for high-power applications using insulated gate bipolar transistors (IGBTs) as the power switches. It provides ZCS operation for active switches with low-current stress without voltage stress and PWM operating at constant frequency. The main advantage of this cell is a substantial reduction of the resonant current peak through the main switch during the commutation process. Therefore, the RMS current through it is very close to that observed in the hard-switching PWM converters. Also, small ratings auxiliary components can be used. To demonstrate the feasibility of the proposed ZCS-PWM commutation cell, it was applied to a boost converter. Operating principles, theoretical analysis, design guidelines and a design example are described and verified by experimental results obtained from a prototype operating at 40 kHz, with an input voltage rated at 155 V and 1 kW output power. The measured efficiency of the improved ZCS-PWM boost converter is presented and compared with that of hard-switching boost converter and with some ZCS-PWM boost converters presented in the literature. Finally, this paper presents the application of the proposed soft-switching technique in DC-DC nonisolated power converters     

A new family of ZVS-PWM active-clamping DC-to-DC boost converters:analysis, design, and experimentation

The purpose of this paper is to introduce a new family of zero-voltage switching (ZVS) pulse-width modulation (PWM) active-clamping DC-to-DC boost power converters. This technique presents ZVS commutation without additional voltage stress and a significant increase in the circulating reactive energy throughout the power converters. So, the efficiency and the power density become advantages when compared to the hard-switching boost power converter. Thus, these power converters may become very attractive in power factor correction applications. In this paper, the complete family of boost power converters is shown, and one particular circuit, taken as an example, is analyzed, simulated and experimented. Experimental results are presented, taken from a laboratory prototype rated at 1600 W, input voltage of 300 V, output voltage of 400 V, and operating at 100 kHz. The measured efficiency at full load was 98%, and the power converter kept an efficiency up to 95% from 17% to 100% of full load, without additional voltage and current stresses     

Performance prediction of DC-DC converters with impedances as loads

This paper presents a method of predicting the outer loop gain of dc-dc converters when there is a general (nonresistive) impedance as a load. Based on this prediction, it is possible to then derive a corresponding phase margin, gain margin and bandwidth in order to define a dc-dc converter's stable operating area. Two applications of the method are presented for performance prediction in: 1) dc-dc converters with additional capacitors placed across their load; 2) source converters in a distributed power system. In both applications, the theoretical predictions match closely to the experimental data.     

The design and experimentation of the new cascaded DC-DC boost converter for renewable energy

After renewable energy generated, a direct current value is converted to a direct current value at another level for a power electronics and power system application that is often considered. In this article, the design and application of a new generation multi-time cascaded DC-DC converter are discussed. The dc-to-dc converter is three-levels, and the switches for each step have a working time and a non-working time. Mathematical models are established depending on the relationship between current and voltage according to the operating and non-operating states of the switches at each stage. After these mathematical models are creating, the new generation multi-timed DC-DC converter is run in Matlab Simulink and simulation results are validated in experimentation. The output voltage and inductor current are observed with a scope. Then, the results from the proposed converter are compared with the results of the traditional converters. The results show the effectiveness of the proposed dc-dc converter.     

DC-DC converter: four switches V/sub pk/=V/sub in//2, capacitive turn-off snubbing, ZV turn-on

A new four-switch full-bridge dc-dc converter topology is especially well-suited for power converters operating from high input voltage: it imposes only half of the input voltage across each of the four switches. The two legs of a full-bridge converter are connected in series with each other, across the dc input source, instead of the usual topology in which each leg is connected across the dc source. The topology reduces turn-off switching losses by providing capacitive snubbing of the turn-off voltage transient, and eliminates capacitor-discharge turn-on losses by providing zero-voltage turn-on. (Switching losses are especially important in converters operating at high input voltage because turn-on losses are proportional to the square of the input voltage, and turn-off losses are proportional to the input voltage). The topology is suitable for resonant and nonresonant converters. It adds one bypass capacitor and one commutating inductor to the minimum-topology full-bridge converter (that inductor is already present in many present-day converters, to provide zero-voltage turn-on, or is associated with one or two capacitors to provide resonant operation), and contains a dc-blocking capacitor in series with the output transformer, primary winding, and some nonresonant converters (that capacitor is already present in resonant power converters). The paper gives a theoretical analysis, and experimental data on a 1.5-kW example that was built and tested: 600-Vdc input, 60-Vdc output at up to 25A, and 50-kHz switching frequency. The measured performance agreed well with the theoretical predictions. The measured efficiency was 93.6% at full load, and was a maximum of 95.15% at 44.8% load.     

Modeling the closed-current loop of PWM boost DC-DC converters operating in CCM with peak current-mode control

This paper derives the transfer function from error voltage to duty cycle, which captures the quasi-digital behavior of the closed-current loop for pulsewidth modulated (PWM) dc-dc converters operating in continuous-conduction mode (CCM) using peak current-mode (PCM) control, the current-loop gain, the transfer function from control voltage to duty cycle (closed-current loop transfer function), and presents experimental verification. The sample-and-hold effect, or quasi-digital (discrete) behavior in the current loop with constant-frequency PCM in PWM dc-dc converters is described in a manner consistent with the physical behavior of the circuit. Using control theory, a transfer function from the error voltage to the duty cycle that captures the quasi-digital behavior is derived. This transfer function has a pole that can be in either the left-half plane or right-half plane, and captures the sample-and-hold effect accurately, enabling the characterization of the current-loop gain and closed-current loop for PWM dc-dc converters with PCM. The theoretical and experimental response results were in excellent agreement, confirming the validity of the transfer functions derived. The closed-current loop characterization can be used for the design of a controller for the outer voltage loop.