A new complementary monolithic transistor structure

A novel complementary monolithic bipolar transistor structure has been developed. By adding one extra diffusion to the standard monolithic bipolar transistor process a pair of high current gain and very low saturation resistance n-p-n and p-n-p transistors can be fabricated on the same chip. High sheet resistances are also present in this structure.     

A new trench base-shielded bipolar transistor

In this paper, a new power bipolar transistor structure called the trench base-shielded bipolar transistor (TBSBT) Is proposed and experimentally demonstrated. This structure incorporates deep p⁺ poly-Si trenches into the base of a conventional bipolar transistor. With the base shielded effectively by the p⁺ trenches, the base of the TBSBT can be made very narrow to achieve high current gain h_FE and high cut-off frequency f_T without compromising on the breakdown voltage. Experimental results show that the on-state anti switching characteristics of the TBSBT are significantly better than those of the existing power bipolar transistors     

A new epitaxial lateral overgrowth silicon bipolar transistor

A new device structure and method of fabricating a silicon bipolar transistor is proposed. The device has reduced collector parasitic capacitance and resistance as compared to other advanced bipolar technologies. By using selective and lateral epitaxial overgrowth techniques the buried (N+) layer is not necessary. Two-dimensional computer simulations show theC_{CS} times R_{C}product to be reduced by a factor of 5.45 along with reduced CCB.     

A new MOS-gate bipolar transistor for power switches

A new monolithic integrated power device, the MOS-gate transistor (MGT), which consists of a bipolar transistor for an output stage and two MOSFET's for a driver stage, has been investigated. The purpose of the study was to obtain a power switch having characteristics of an easy drive, a short turn-off time, and a high current density. The developed device structure featured the integration of three elements into a small cell from a large number of which the MGT chip was constructed. This device had no parasitic thyristor, making it free from the latchup phenomenon. Unit MGT devices with a blocking voltage of 400-500 V were fabricated. A high current density of 90 A/cm²at a collector-emitter voltage of 2 V and a short turn-off time of less than 1 µs were obtained. The MGT devices, which contained 36 cells, were fabricated with chip sizes of 5 × 5 mm. They exhibited a blocking voltage of 500 V, on-state voltage of 2.3 V at a current of 10 A, and turn-off time of 0.5 µs at 150°C.     

A new trench bipolar transistor for RF applications

A new vertical trench SiGe heterojunction bipolar transistor (HBT) is proposed that improves the tradeoff between the cutoff frequency (f/sub T/) and the off-state collector-base breakdown voltage (BV/sub cbo/). Extensive device simulations show that a record f/sub T//spl middot/BV/sub cbo/ product of about 2375 GHz/spl middot/V can be obtained for an HBT having a trench field plate connected to the emitter and a linearly graded doping profile in the collector drift region, while about 700 GHz/spl middot/V can be obtained for a standard optimized HBT. This large improvement is explained mainly by the suppression of the base-widening effect.     

HBT结构的新进展

介绍了以In0.03Ga0.97As0.99N0.01材料为基区的GaAs异质结双极型晶体管和以GaAs0.51Sb0.49材料为基区的InP HBT.讨论了GaAs和InP HBT结构的新进展及其对性能的改善,并对各结构的适用范围和优缺点进行了比较.     

A bipolar lock-layer transistor

A bipolar transistor and a junction field effect transistor are integrated into a “merged” cascode configuration. Viewed as a modified bipolar transistor, this device has a new and favorable combination of common-emitter breakdown voltage and current gain, and is largely free of the Early effect.     

Thin-film lateral bipolar transistor in silicon-on-sapphire structure

Heteroepitaxial films of silicon-on-sapphire were used to fabricate lateral bipolar n-p-n transistors. The devices have a common-base direct-current amplification factor of 0.9 and a maximum frequency of oscillation of 2.4 GHz. As a result of the vertical p-n-junction arrangement, small junction areas are possible, e.g. 1×10?6cm2, which yield depletion-layer capacitances of 0.02?0.05 pF.     

Horizontal current bipolar transistor (HCBT): a new concept ofsilicon bipolar transistor technology

A new concept of silicon bipolar transistor technology is proposed. The resulting horizontal current bipolar transistor (HCBT) is simulated assuming the 0.25 μm technology. The surface of the device is smaller than conventional super-self aligned bipolar transistors. The same doping profile as in known vertical current devices is achieved by simpler technology using single polysilicon layer, without conventional epitaxial and n⁺ buried layers and with reduced number of lithography masks and technological steps. The simulated dc and ac characteristics of HCBT are similar to the characteristics of standard SST devices     

A tunneling emitter bipolar transistor

We propose a new device-a Tunneling Emitter Bipolar Transistor (TEBT)-where the enhancement of the emitter injection efficiency is achieved by utilizing a very large difference in the tunneling probabilities for electrons and holes in a thin doped graded AlGaAs layer. This layer is inserted between the n-type GaAs emitter and p-type GaAs base. This device should have a high emitter efficiency and low parasitic resistances.     

The complementary insulated-gate bipolar transistor (CIGBT)-a newpower switching device

A new power switching device, the complementary insulated-gate bipolar transistor (CIGBT), is described. The device achieves very high switching speeds typical of DMOS transistors, while it maintains the low on-state resistance of the insulated-gate bipolar transistor (IGBT) on which it is based. The device incorporates a p-channel MOS transistor which acts to draw excess charge out of the base region of the IGBT as the device is turned off. Fabricated devices whose specific on-resistance is only 20% greater than that of equal-area IGBTs display turn-off times under 700 ns, while the IGBTs require 35 μs to reach the off state. The device is compared to equal-area IGBTs, DMOS transistors, and IGBTs whose minority-carrier lifetime has been reduced to achieve 700-ns turn-off times     

A new LDD transistor with inverse-T gate structure

A new submicrometer inverse-T lightly doped drain (ITLDD) transistor structure for alleviating hot-electron effects is demonstrated. A thin extension of the polysilicon gate under the oxide sidewall spacer is formed, giving the gate cross section the appearance of an inverted letter T. Due to the unique self-aligned n+ T-to-gate feature facilitated by the conducting polysilicon extension, the "spacer-induced degradation" existing in a conventional LDD transistor is eliminated in ITLDD devices. This allows the use of low n- LDD doses for optimum channel electric field reduction and minimum post-implant drive-in for future VLSI compatibility. Submicrometer ITLDD transistors with good transconductance and hot-electron reliability have been achieved. The new ITLDD transistor offers a promising device structure for future VLSI applications.     

A fully planar heterojunction bipolar transistor

A fully planar heterojunction bipolar transistor (HBT) in the normal emitter-up configuration is reported. The process utilizes a two-step epitaxial deposition with an intervening selective ion implant of bases. A process is described, the aluminum lift-off (ALL) process, with which refractory metal contacts have been used. Large test devices fabricated have dc gains of β = 600.     

A column-base InP lateral bipolar transistor

An InP lateral bipolar transistor has been successfully fabricated on a semi-insulating substrate by implanting Si⁺ as the emitter and collector contacts and Mg⁺ as the column base. An array of 33 1-μm-diameter columns with 1-μm separation between each was formed between the emitter-collector spacing of 3 μm. A current gain of 290 was obtained at 77 K; it was over 12 at room temperature     

A new InGaP/GaAs tunneling heterostructure-emitter bipolar transistor (T-HEBT)

Excellent characteristics of an InGaP/GaAs tunneling heterostructure-emitter bipolar transistor (T-HEBT) are first demonstrated. The insertion of a thin n-GaAs emitter layer between tynneling confinement and base layers effectivelty eliminates the potential spike at base-emitter junction and reduces the collector-emitter offset voltage, while the thin InGaP tunneling confinement layer is employed to reduce the transporting time across emitter region for electrons and maintain the good confinement effect for holes. Experimentally, the studied T-HEBN exhibits a maximum current gain of 285, a relatively low offset voltage of 40 mW, and a current-gain cutoff frequency of 26.4 GHz.     

The insulated gate transistor: A new three-terminal MOS-controlled bipolar power device

A new three-terminal power device, called the insulated gate transistor (IGT), with voltage-controlled output characteristics is described. In this device, the best features of the existing families of bipolar devices and power MOSFET's are combined to achieve optimal device characteristics for low-frequency power-control applications. Devices with 600-V blocking capability fabricated using a vertical DMOS process exhibit 20 times the conduction current density of an equivalent power MOSFET and five times that of an equivalent bipolar transistor operating at a current gain of 10. Typical gate turn-off times have been measured to range from 10 to 50 µs.     

The MGBT: a new MOS-gated power bipolar transistor

A new device called the MGBT is described in which the upper regions of the device structure are conductivity-modulated by a positive feedback mechanism to give a lower on-state voltage drop compared to a power DMOSFET while having fast switching and fully gate-controlled characteristics. In the MGBT, a P⁺ injector coupled to the drain potential by a vertical driver DMOSFET in an emitter-switched configuration is used to inject holes which is then diverted to the entire surface region of the device by a novel cell design. 750 V MGBT devices fabricated along with DMOSFET devices on the same wafer showed 33% improvement in current density at room temperature and 46% improvement at 75°C at a forward drop of 3.5 V. The turn-off time of the MGBT was 80 ns equal to that of the DMOSFET     

一种积累型沟道的半超结结构绝缘栅双极型晶体管

A high performance trench insulated gate bipolar transistor which combines a semi-superjunction struc- ture and an accumulation channel （sSJTAC-IGBT） is proposed for the first time. Compared with the TAC-IGBT, the new device not only retains the advantages of the accumulation channel, but also obtains a larger breakdown voltage （BV）, a faster turn-off speed and a smaller saturation current level while keeping the on-state voltage drop lower as the TAC-IGBT does as well. Therefore, the new structure enlarges the short circuit safe operating area （SCSOA） and reduces the energy loss during the turn-off process.     

A fundamental limitation for bipolar transistor scaling

A microscopic model of minority-carrier diffusion in a heavily doped emitter is proposed. Monte Carlo simulation demonstrates that statistical fluctuation in the base current is one of the fundamental limitations in high-speed applications of scaled bipolar transistors. For the transistor presently investigated, with 5.0-μm² emitter area, 0.1-μm junction depth, 8.5-ps measurement time, and 0.75-V emitter/base bias, the base current deviation is 43%. This sets up the maximum operating frequency for the transistor. More lightly doped emitters (such as for heterojunction bipolar transistors) will relax this limitation, but at a cost of increased contact resistance, especially when poly-emitters are utilized. Increasing the emitter/base bias will also make the base current rate more deterministic, but the other limitations such as power dissipation and contact resistance will become more obvious