精简热模型在集成电路封装中的应用研究

探讨了为一款FBGA封装产品建立DELPHI型热阻网络的新方法。首先利用恒温法为芯片封装建立星型网络,在此基础之上求解支路耦合热阻值,构成DELPHI型热阻网络。经过仿真验证显示,所建立的两种DELPHI型热阻网络模型与详细热模型(DTM)的结温误差均在10%以内,从而具备较好的边界条件独立性。     

精简热模型在集成电路封装中的应用研究

探讨了为一款FBGA封装产品建立DELPHI型热阻网络的新方法。首先利用恒温法为芯片封装建立星型网络,在此基础之上求解支路耦合热阻值,构成DELPHI型热阻网络。经过仿真验证显示,所建立的两种DELPHI型热阻网络模型与详细热模型(DTM)的结温误差均在10%以内,从而具备较好的边界条件独立性。     

用有限元方法对双列直插式封装进行的热分析

由于元件封装密度越来越大,电子系统的热失效正成为一个越来越困难的设计问题。本文介绍的是用有限元方法(FEM)对双列直插式(DIP)微电子封装中的稳态热传导进行的研究。虽然文章给封装设计专家提供了数据,但为了说明所使用方法的广泛适应性,也介绍了一些热传导的背景资料和有限元分析法。先后介绍了8脚和16脚DIP有限元模型的各级研究阶段。对一个先用自然对流然后用强制对流方法在空气中冷却的16脚DIP有限元模型进行了系统的热分析。通过FEM分析发现,封装中有一个复杂的三维热场。通过一功耗范围内的计算机运算,发现了温度分布和热阻随外部对流变化的规律。这项研究向用户提供了封装冷却的数据,同时着重强调了提供热阻标准定义存在的一些困难。     

面向引线框架封装的热阻建模与分析

针对通用的QFP48引线框架封装,首先探讨了封装中的热传输机制,给出了热阻的理论计算结果;接着利用Ansys Icepak软件建立起QFP48的有限元模型,热阻仿真结果较好地验证了热传输机制的理论分析;最后讨论了减小封装热阻、提高热可靠性的方法。结果表明:适当提高塑封材料的热传导率、增加PCB面积和施加一定风速的强迫对流均可降低QFP48封装的热阻,提高散热效果。     

微热板阵列的热干扰

针对微热板阵列建立了热路模型,并对热干扰进行分析.结果表明,由于微热板悬窄结构的热阻比硅芯片的热阻高3个数量级.因此微热板阵列芯片的热干扰温度取决于封装对环境的热阻,而芯片上器件的间距对热干扰温度的影响可以忽略.研制了3种布局、T05和DIPl6两种封装形式的微热板阵列,并对阵列中的热干扰问题进行了实验测试.测试数据验证了热路模型的结论.因此,减小微热板阵列或集成芯片的热干扰的关键在于,尽可能增大微热板悬空结构的热阻以及选用热阻小的封装形式.     

微热板阵列的热干扰

针对微热板阵列建立了热路模型,并对热干扰进行分析.结果表明,由于微热板悬窄结构的热阻比硅芯片的热阻高3个数量级.因此微热板阵列芯片的热干扰温度取决于封装对环境的热阻,而芯片上器件的间距对热干扰温度的影响可以忽略.研制了3种布局、T05和DIPl6两种封装形式的微热板阵列,并对阵列中的热干扰问题进行了实验测试.测试数据验证了热路模型的结论.因此,减小微热板阵列或集成芯片的热干扰的关键在于,尽可能增大微热板悬空结构的热阻以及选用热阻小的封装形式.     

基于热测试芯片的2.5D封装热阻测试技术研究

2.5D多芯片高密度封装中,多热源复杂热流边界、相邻热源热耦合增强,高精准的热阻测试与仿真模拟验证是封装热设计的关键。设计开发了基于百微米级发热模拟单元的热测试验证芯片（TTC）,并基于多热点功率驱动电路系统和多通道高速采集温度标测系统,实现了2.5D多芯片实际热生成的等效模拟与芯片温度的多点原位监测。通过将实际热测试结构函数导入热仿真软件,实现了仿真模型参数的拟合校准,采用热阻矩阵法表征多芯片封装热耦合叠加效应,实现了多热源封装热阻等效表征。结果表明,多芯片封装自热阻和耦合热阻均随着芯片功率密度的增加而提高,芯片的热点分布对封装热阻值的影响更为显著,因此模拟实际芯片发热状态、建立等效热仿真模型是实现高精准封装热仿真和散热结构设计的关键。     

多芯片组件（MCM）的热模拟研究

介绍了MCM的封装热阻及相应的几种热阻计算方法。利用有限元分析软件ANSYS对多芯片组件(MCM)进行了热模拟。在常用两种MCM结构的热流模型基础上，分析并比较了这两种热模型差异及对散热的影响。根据ANSYS模拟结果，讨论了空气流速、基板热导率及其厚度、芯片粘结层热导率及其厚度对MCM封装热特性的影响，分析了控制MCM封装内、外散热的主要因素。     

建立封装芯片热阻网络模型的方法研究

针对电子设备系统级热分析中封装芯片模型复杂程度与计算精度的矛盾,引入热阻网络法,替代系统级分析中封装芯片的详细物理模型;并以某PBGA封装芯片为例,进行两种建模方法的对比分析,同时介绍一种快速确定网络中热阻值的方法.结果表明,热阻网络等效方法具有模型简单、分析快速、准确度高的优点,在系统级热分析中可完全替代详细的物理模型.     

IC封装中的热设计探讨

简要介绍了集成电路各项热阻的含义及热阻的测试方法,并从封装材料的热传特性、电路的封装形式以及电路的内部机械参数等方面,探讨了改善集成电路热阻的方法,供从事封装热设计的工程技术人员参考.     

A step forward in the transient thermal characterization of chips and packages

Generating compact dynamic thermal models is a key issue in the thermal characterization of packages. A further but related problem is the modeling of the thermal coupling between chip locations, for the use in electro-thermal circuit simulators. The paper presents a measurement based method which provides a way to solve both problems. A thermal benchmark chip has been designed and realized, to facilitate thermal transient measurements. The developed evaluation method provides the compact thermal multiport model of the IC chip including package effects, for the accurate electro-thermal simulation of the ICs. The evaluation method is also suitable to generate the compact thermal model of the package.     

Compact thermal models for stochastic thermal analysis

An effective approach is proposed for constructing compact thermal models for the stochastic thermal analysis of electronics components and packages. This approach exhibits high levels of accuracy for small state space dimensions of the model. The achieved compact thermal models can be used to accurately approximate the stochastic properties not only of junction temperatures but also of the whole space–time temperature rise distribution within the electronics component or package.     

Evaluation of analytical models for thermal analysis and design of electronic packages

The objective of this study is to evaluate the use of several analytical compact heat transfer models for thermal design, optimization, and performance evaluation in electronic packaging. A model for heat spreading in orthotropic materials is developed. The developed model is used in conjunction with the other available heat transfer models in a resistance network for calculation of heat transfer rate and junction temperatures in a multi-chip module (MCM). Refrigeration cooled MCM of an IBM server is used to illustrate the methodology. Results of the analytical model and resistance network analysis are compared with a numerical solution. Capability of the analytical model in predicting the thermal field is discussed and effectiveness of using the analytical models in thermal design and optimization of electronic packages is demonstrated.     

A study of compact thermal model topologies in CFD for a flip chipplastic ball grid array package

A previously validated detailed model of a 119-pin flip-chip plastic ball grid array (FC-PBGA) package was created and validated against experimental data for natural convection and forced convection environments. Next, two compact models mere derived, a two-resistor model (created using the JEDEC-standard based computational approach), and a multiresistor model (created using the DELPHI optimization approach that was boundary condition independent within engineering accuracy). The compact models were placed in natural convection and forced convection (velocities of 1 and 2 m/s) environments with and without a heatsink. Based on the agreement obtained between the detailed model and compact model simulations, the accuracy and validity of the two compact models was assessed. Of the two compact thermal models considered, the Delphi multiresistor model provided the same predictive estimates (within 5%) as simulations involving a detailed thermal model of the package in natural and forced convection environments both with and without attached heatsinks. Some thermal modeling issues were addressed with respect to implementation of compact thermal models with attached heatsinks     

A compact multilayer IC package model for efficient simulation, analysis, and design of high-performance VLSI circuits

A multilayered integrated circuit (IC) package structure is composed of many signal layers, power layers, and ground layers. Particularly, the whole planes are assigned for the power and ground of the system. Accordingly, the generic circuit representation of such a complicated multilayer IC package becomes too complicated to efficiently evaluate its electrical performance. In this work, a novel compact package circuit model for the efficient simulation and analysis of such complicated IC packages is presented. Unlike the conventional models, current distributions within the package are modeled by introducing a compact partial plane circuit model. Thus, the proposed package model is much simpler than the conventional generic circuit models, while its accuracy is preserved. Thereby, today's complicated IC packages can be efficiently evaluated and analyzed. Its accuracy and efficiency are verified by benchmarking it with a conventional generic package circuit model; this conventional model may not be practical to use for package evaluation and analysis. It is then shown that the proposed model can be efficiently applied for the signal integrity verification of complicated IC packages and high-performance VLSI circuits.     

聚合物整体灌装电路板热应力分析

电路板的聚合物整体灌装是一种提高电子器件在极端工况下可靠性的方法。针对该方法所面临的热应力失效问题,采用有限元数值方法研究了含15个元器件的整体灌装电路板在环境温度改变和器件产热两种热载荷下的热应力分布,并通过参数化模拟分析了不同几何和材料参数对元器件及其接合层中热应力分布的影响。结果表明整体灌装加剧了IC器件及其接合层的热应力,该模拟工作为提高整体灌装方案的热应力可靠性提供参考。     

Prediction and verification of process induced warpage of electronic packages

During the manufacturing, testing and service, thermally induced deformations and stresses will occur in IC devices and packages, which may cause various kinds of product failures. FEM techniques are widely used to predict the thermal deformations and stresses and their evolutions. However, due to the complexity of the real engineering problems, various assumptions and simplifications have to be made in conducting FEM modelling. Therefore, the applicability of the predicted results depend strongly on the reliability and accuracy of the developed FEM-based prediction models which should be verified before applications.In this paper, FEM models are developed to predict the thermal deformations of certain electronic packages and naked die samples under packaging and testing loading. For all the package constituents, appropriate material properties and models are used, including temperature-dependent visco-elasticity, anisotropy, and temperature-dependent elasticity and plasticity. To verify the developed FE models, a series of optical metrology tests are performed. A compact 3D interferometry testing system that can measure simultaneously out-of plane and in-plane deformations has been developed. Thermal deformation measurements are performed on samples of both real electronic packages and naked dies attached on a leadframe. Identical deformation patterns were found for the measured fringe patterns in the U-, V-, and W-fields and the simulated ones. Also, quantitatively, the maximum deformation mismatch between the predicted and tested results is within 15%. It is concluded that the thermally induced deformations predicted by the non-linear FEM models match well with measured deformations for both the naked die and the real packages.     

Thermal compact modeling of parallel plate heat sinks

Growing complexity of electronic systems has resulted in an increased computational effort in CFD modeling of electronic systems. To reduce the computational effort, one or several heat sinks can be represented by a compact "porous block" model, with an effective thermal conductivity and pressure loss coefficient. In this study of parallel plate heat sinks in laminar forced convection, a methodology is developed to rigorously determine the thermal properties of compact heat sink models that provide a high level of accuracy. The results of an extensive set of CFD simulations for a three heat sink channel covering two distinct heat sink geometries, air velocities from 0.25 m/s to 2 m/s and various spacings between the heat sinks, were used to create and evaluate the fidelity of compact models. The results of this study establish the validity and value in using the porous block compact model representation for noncritical heat sinks in an electronic assembly. The results also reveal that a location-independent porous-block representation can yield excellent agreement in the prediction of the thermal characteristics of state-of-the-art heat sinks.