Functionalized Poly(phenylene ether) with high thermal stability as flexible dielectrics and substrates for organic field-effect transistors

Extensive research efforts are devoted into seeking the thermally and mechanically durable dielectric materials for flexible electronics. In this work, a series of sulfonylated poly (phenylene ether)s (PPEs) were synthesized and served as gate dielectrics in the flexible OFET devices with crosslinked poly (2-allyl-6-methylphenol-co-2,6-dimethylphenol) (APPE) as substrate. The chemical structure, thermal, morphology, and dielectric properties were investigated, and the corresponding OFET devices were accordingly fabricated and characterized. We found that the discrepancy in sulfone content of PPE-xS renders the difference in thermal stability, surface polarity and dielectric constants. Among them, PPE-9kS with the highest sulfone content of 63% shows the best dielectric properties in the flexible OFET devices with hole mobility (μ_p) of 0.45 cm² V⁻¹ s⁻¹, outperforming its parent polymer without sulfone group (PPE-9k) with μ_p of 0.14 cm² V⁻¹ s⁻¹. Besides, the flexible device with PPE-9kS as dielectric exhibits highly retained device performance after cyclic bending or thermal treatment, which indicates the decent mechanical and thermal durability. The present study documents a practical methodology to fabricate a high-performance flexible OFET with excellent thermal and mechanical stability.     

Forming semiconductor/dielectric double layers by one-step spin-coating for enhancing the performance of organic field-effect transistors

We report one-step formation of the gate dielectric and conduction channel for enhancing the performance of organic field effect transistors (OFETs). The resulting OFET with the semiconductor/dielectric bi-layers spun in ambient conditions exhibits μ_FET up to 1.6 cm²/V s and on–off ratio higher than 10⁶, no additional treatment needed. Contact angle measurements and absorption spectra reveals that a well-defined semiconductor-top and dielectric-bottom film form after spin-coating the mixture of the two components, which is due to the surface induced self-organized phase separation. Compared to the single layer semiconductor film, the staggered film exhibits over 5 times higher mobility and nearly 90% reduced hysteresis in OFET. The higher performance is attributed to the simultaneous optimization in the dielectric interface and semiconductor crystallization. The approach is significant for the fabrication of low cost, easy processed and high performance OFETs.     

Low-operating-voltage polymeric transistor with solution-processed low-k polymer/high-k metal-oxide bilayer insulators

We have successfully demonstrated a polymeric semiconductor-based transistor with low-k polymer/high-k metal-oxide (TiO₂) bilayer as gate dielectric. The TiO₂ layers are readily processable from solution and cured at low temperature, instead of traditionally sputtering or high temperature sintering process, thus may suitable for a low-cost organic field effect transistors (FETs) manufacture. The low-k polymer capped on TiO₂ layer could further smooth the TiO₂ dielectric surface and suppress the leakage current from grain boundary of TiO₂ films. The resulting unpatented P3HT-OFETs could operate with supply voltage less than 10 V and the mobility and threshold voltage were 0.0140 cm²/V s and 1.14 V, respectively. The on/off ratio was 1.0 × 10³.     

Optical and Dielectric Properties and Microstructures of rf-Magnetron Sputtered ZnO-Doped Zr<Subscript>0.8</Subscript>Sn<Subscript>0.2</Subscript>TiO<Subscript>4</Subscript> Films on Indium Tin Oxide/Glass Substrates

Optical and dielectric properties and microstructures of ZnO-doped (Zr_0.8Sn_0.2)TiO₄ thin films prepared by radiofrequency (rf)-magnetron sputtering on indium tin oxide/glass substrates at different rf powers and substrate temperatures have been investigated. Selected-area diffraction patterns showed that the deposited films exhibited a polycrystalline microstructure. All films exhibited the ZnO-doped (Zr_0.8Sn_0.2)TiO₄ structure with the (111) orientation perpendicular to the substrate surface. The grain size as well as the deposition rate of the film increased with an increase in both rf power and substrate temperature. At an annealing temperature of 700°C, the ZnO-doped (Zr_0.8Sn_0.2)TiO₄ film possessed a dielectric constant of 47 at 10 MHz, a dissipation factor of 0.02 at 10 MHz, a leakage current density of 7.35 × 10⁻⁹  A/cm² at an electrical field of 1 kV/cm, average transmission in the visible range of over 70%, and an optical bandgap of 3.6 eV. This film will allow fabrication of fully transparent semiconductor devices such as a resistive random-access memory (RRAM) and thin-film transistors (TFTs) completely based on ZnO-doped (Zr_0.8Sn_0.2)TiO₄ thin films.     

Photo-patternable high-k ZrOx dielectrics prepared using zirconium acrylate for low-voltage-operating organic complementary inverters

Solution-processed dielectric materials with a high dielectric constant (k) have attracted considerable attention due to their potential applications in low-voltage-operating organic field-effect transistors (OFETs) for realizing large-area and low-power electronic devices. In terms of device commercialization, the patterning of each film component via a facile route is an important issue. In this study, we introduce a photo-patternable precursor, zirconium acrylate (ZrA), to fabricate photo-patterned high-k zirconium oxide (ZrO_x) dielectric layers with UV light. Solution-processed ZrA films were effectively micro-patterned with UV exposure and developing, and transitioned to ZrO_x through a sol-gel reaction during deep-UV annealing. The UV-assisted and ∼10 nm-thick ZrO_x dielectric films exhibited a high capacitance (917.13 nF/cm² at 1 KHz) and low leakage current density (10⁻⁷ A/cm² at 1.94 MV/cm). Those films could be utilized as gate dielectric layers of OFETs after surface modification with ultrathin cyclic olefin copolymer layers. Finally, we successfully fabricated organic complementary inverters exhibiting hysteresis-free operation and high voltage gains of over 42 at low voltages of ≤3 V.     

Electrical properties of low-dielectric-constant films prepared by PECVD in O2/CH4/HMDSO

Low-dielectric constant (low-k) films have been prepared by plasma-enhanced chemical vapor deposition (PECVD) from hexamethyldisiloxane (HMDSO) mixed with oxygen or methane. The films are analyzed by ellipsometry, infrared absorption spectroscopy while their electrical properties are deduced from C–V, I–V and R–f measurements performed on Al/insulator/Si structures. For an oxygen and methane fraction equal to 50% and 22%, respectively, the dielectric constant and losses are decreased compared with those of the film prepared in a pure HMDSO plasma. The effect of adding 22% of CH₄ in HMDSO plasma increases the Si–CH₃ bonds containing in the polymer film and as the constant of methyl groups in the film increased the dielectric constant of the film decreases. For this film, the dielectric constant is 2.8, the dielectric losses at 1 kHz are equal to 2×10⁻³, the leakage current density measured for an electric field of 1 MV/cm is 3×10⁻⁹ A/cm² and the breakdown field is close to 5 MV/cm.     

High performance sol–gel spin-coated titanium dioxide dielectric based MOS structures

High-κ TiO₂ thin films have been fabricated using cost effective sol–gel and spin-coating technique on p-Si (100) wafer. Plasma activation process was used for better adhesion between TiO₂ films and Si. The influence of annealing temperature on the structure-electrical properties of titania films were investigated in detail. Both XRD and Raman studies indicate that the anatase phase crystallizes at 400 °C, retaining its structural integrity up to 1000 °C. The thickness of the deposited films did not vary significantly with the annealing temperature, although the refractive index and the RMS roughness enhanced considerably, accompanied by a decrease in porosity. For electrical measurements, the films were integrated in metal-oxide-semiconductor (MOS) structure. The electrical measurements evoke a temperature dependent dielectric constant with low leakage current density. The Capacitance–voltage (C–V) characteristics of the films annealed at 400 °C exhibited a high value of dielectric constant (~34). Further, frequency dependent C–V measurements showed a huge dispersion in accumulation capacitance due to the presence of TiO₂/Si interface states and dielectric polarization, was found to follow power law dependence on frequency (with exponent ‘s’=0.85). A low leakage current density of 3.6×10⁻⁷ A/cm² at 1 V was observed for the films annealed at 600 °C. The results of structure-electrical properties suggest that the deposition of titania by wet chemical method is more attractive and cost-effective for production of high-κ materials compared to other advanced deposition techniques such as sputtering, MBE, MOCVD and ALD. The results also suggest that the high value of dielectric constant ‘κ‘ obtained at low processing temperature expands its scope as a potential dielectric layer in MOS device technology.     

TiSiOx gate dielectrics produced by reactive sputtering for high performance InGaZnO thin film transistors

High dielectric constant TiSiOx thin films are produced by reactive sputtering under different oxygen partial pressure ratio (P_O2) from 15% to 30%. All the TiSiOx films show an excellent transmittance value of almost 95%. The TiSiOx film has a low leakage current density by optimizing oxygen partial pressure, and the leakage current density of TiSiOx film under P_O2 of 20% is 4.88×10⁻⁷ A/cm² at electrical field strength of 2 MV/cm. Meanwhile, their associated InGaZnO thin-film transistors (IGZO-TFTs) with different P_O2 TiSiOx thin films as gate insulators are fabricated. IGZO-TFTs under P_O2 of 20% shows an optimized electrical performance, and the threshold voltage, sub-threshold swing, field effect mobility and I_on/I_off ratio of this device are 2.22 V, 0.33 V/decade, 29.3 cm²/V s and 5.03×10⁷, respectively. Moreover, the density of states (DOS) is calculated by temperature-dependent field-effect measurement. The enhancements of electrical performance and temperature stability are attributed to better active/insulator interface and smaller DOS.     

Acrylate-based nanocomposite zirconium-dispersed polymer dielectric for flexible oxide thin-film transistors with a curvature radius of 2 mm

Novel hybrid dielectric film is synthesized at a low temperature of 150 °C using a solution process. Zirconium acrylate (ZrA) and poly(methyl methacrylate) (PMMA) comprise the inorganic and organic components, respectively. The acrylate-based molecular structure of both ingredients allows the facile formation of hybrid ZrA/PMMA dielectric film with neither additional coupling agent nor ultraviolet photon irradiation. The high quality of the hybrid ZrA/PMMA dielectric film is confirmed by its high dielectric constant of 5.5 and low leakage current density of 1.7 × 10⁻⁸ A/cm² at the electric field of 1 MV/cm. The indium gallium tin oxide (IGTO) transistors with the optimal ZrA/PMMA gate insulator layer are fabricated on the polyimide substrate at the maximum high temperature of 150 °C. They exhibit hysteresis-free high performance with high carrier mobility of 24.3 cm²V⁻¹s⁻¹, gate swing of 0.61 V/decade and I_ON/OFF ratio of 4 × 10⁶. Owing to the intrinsic deformability of hybrid dielectric film, these transistors maintained electrical performance after 100 cycles of mechanical bending to the extremely small radius of curvature of 2 mm.     

Optimization of nanocomposite gate insulators for organic thin film transistors

Nanocomposite gate insulators consisting of (Ba, Sr)TiO₃ (barium strontium titanate; BST) nanoparticles and crosslinked poly(4-vinyl phenol) (PVP) polymers were fabricated. Well-dispersed nanocomposite films were prepared by optimizing the BST nanoparticle size sorting process (ultrasound crushing and centrifuge method). The size-sorted BST nanoparticles (∼30 nm in size) were homogeneously mixed in the PVP host polymer in various BST contents, from 0 to 70 wt%, to tune the dielectric constant (κ) of the resulting nanocomposite films. The composite films exhibit three-fold increase in the κ value from 3.9 to 11.3. The physical properties including leakage current and surface roughness of the composites were also measured as a function of the BST loading content and particle dispersion. The relationship between these properties and the electrical performance of the corresponding organic thin film transistor were explored.     

High-k TixSi1−xO2 thin films prepared by co-sputtering method

We report on high-k Ti_xSi_1−xO₂ thin films prepared by RF magnetron co-sputtering using TiO₂ and SiO₂ targets at room temperature. The Ti_xSi_1−xO₂ thin films exhibited an amorphous structure with nanocrystalline grains of 3-30 nm having no interfacial layers. The XPS analyses indicate that stoichiometric TiO₂ phases in the Ti_xSi_1−xO₂ films increased due to stronger Ti-O bond with increasing TiO₂ RF powers. In addition, the electrical properties of the Ti_xSi_1−xO₂ films became better with increasing TiO₂ RF powers, from which the maximum value of the dielectric constant was estimated to be ∼30 for the samples with TiO₂ RF powers of 200 and 250 W. The transmittance of the Ti_xSi_1−xO₂ films was above 95% with optical bandgap energies of 4.1-4.2 eV. These results demonstrate a potential that the Ti_xSi_1−xO₂ thin films were applied to a high-k gate dielectric in transparent thin film transistors as well as metal-oxide-semiconductor field-effect transistors.     

Improved manufacturability of ZrO2 MIM capacitors by process stabilizing HfO2 addition

A broad compositional range of the dielectric material Zr_1?xHf_xO₂ was evaluated with respect to its applicability in DRAM storage capacitors. The paper reports on phase composition, crystallization behavior, and electrical properties of the mixed system in planar metal-insulator-metal (MIM) capacitors. Admixture of HfO₂ into ZrO₂ proved to stabilize the deposition process at high temperatures without degrading the dielectric properties of the film. Compared to pure ZrO₂ the 30–40% HfO₂ containing films showed improved scalability (capacitance equivalent thickness 0.73 nm at 8 * 10^?9 A/cm²) as well as improved reliability.     

The microwave properties of Li doped 0.7(Ba,Sr)TiO3-0.3MgO thick film interdigital capacitors on the alumina substrates

The crystalline and electrical properties of Li doped 0.7(Ba,Sr)TiO₃-0.3MgO thick film interdigital capacitors have been investigated. Screen printing method was employed to fabricate Li doped 0.7(Ba,Sr)TiO₃-0.3MgO thick films on the alumina substrates. (Ba,Sr)TiO₃ materials have high dielectric permittivity (>500 @ 1 MHz) and low loss tangent (0.01 @ 1 MHz) in the epitaxial thin film form. To improve dielectric properties and reduce sintering temperature, MgO and Li were added, respectively. 10 μm thick films were screen printed on the alumina substrates and then interdigital capacitors with seven fingers of 200 μm finger gap were patterned with Ag electrode. Current-voltage characteristics were analyzed with elevated temperature range. Up to 50 °C, the thick films showed positive temperature coefficient of resistivity (dρ/dT) of 6.11 × 10⁸ Ω cm/°C, then film showed negative temperature coefficient of resistivity (dρ/dT) of −1.74 × 10⁸ Ω cm/°C. From the microwave measurement, the relative dielectric permittivity of Li doped 0.7(Ba,Sr)TiO₃-0.3MgO thick films interdigital capacitors were between 313 at 1 GHz and 265 at 7 GHz.     

Small-signal characteristics of fully-printed high-current flexible all-polymer three-layer-dielectric transistors

All-polymer, semi-transparent, three-layer-dielectric (3L) organic field effect transistors (OFETs) are fabricated on polyethylene terephthalate plastic substrate, using high-throughput printing techniques. Analog small-signal characteristics of the 3L OFET are presented and are compared against the previous version of this technology, which was based on a single-layer dielectric and a metal gate electrode. The 3L transistor withstands 50 V, can continuously drive 50 μA/mm, reaches an excellent intrinsic-gain (A_v0) of 43 dB, an equivalent mobility of 0.85 cm²/V, and a transit frequency (f_T) of 68 kHz, well suited for applications such as driving printed piezoelectric loudspeakers and flexible audio systems. The effects of the relaxor-ferroelectric high-k layer in the 3L stack on the gate capacitance, g_m, and A_v0 are measured in the frequency domain. In addition, it is observed that PEDOT:PSS makes a better interface with polymer dielectric comparing to copper particle ink. Five-hour small- and large-signal bias stress tests are performed. A novel direct A_v0 measurement technique, and an improved transconductance extraction method are also presented.     

Electrical properties of SiO2/TiO2 high-k gate dielectric stack

The trapping/detrapping behavior of charge carriers in ultrathin SiO₂/TiO₂ stacked gate dielectric during constant current (CCS) and voltage stressing (CVS) has been investigated. Titanium tetrakis iso-propoxides (TTIP) was used as the organometallic source for the deposition of ultra-thin TiO₂ films at low temperature (<200 °C) on strained-Si/relaxed-Si_0.8Ge_0.2 heterolayers by plasma-enhanced chemical vapor deposition (PECVD) in a microwave (700 W, 2.45 GHz) plasma cavity discharge system at a pressure of 66.67 Pa. Stress-induced leakage current (SILC) through SiO₂/TiO₂ stacked gate dielectric is modeled by taking into account the inelastic trap-assisted tunneling (ITAT) mechanism via traps located below the conduction band of TiO₂ layer. The increase in the gate current density observed during CVS from room temperature up to 125 ^oC has been analyzed and modeled considering both the buildup of charges in the layer as well as the SILC contribution. Trap generation rate and trap cross-section are extracted. A capture cross-section in the range of 10⁻¹⁹ cm² as compared to 10⁻¹⁶ cm² in SiO₂ has been observed. A temperature-dependent trap generation rate and defects have also been investigated using time-dependent current density variation during CVS. The time dependence of defect density variation is calculated within the dispersive transport model, assuming that these defects are produced during random hopping transport of positively charge species in the insulating high-k stacked layers. SILC generation kinetics, i.e. defect generation probability under different injected fluences for various high-constant stress voltages in both polarities have been studied. An empirical relation between trap generation probability and applied stress voltage for various injected fluences has been developed.     

Effects of Ti content and wet-N2 anneal on Ge MOS capacitors with HfTiO gate dielectric

Thin HfTiO gate dielectric is deposited by reactive co-sputtering method followed by wet or dry N₂ anneal. The effects of Ti content on the performance of HfTiO gate dielectric are investigated by using different sputtering powers for the Ti target. Experimental results indicate that as the Ti content increases, the dielectric constant (κ) can increase up to 40 for a Ti content of 28%. However, when the Ti content is too high, the interface properties and gate leakage properties are deteriorated. On the contrary, results show that owing to the hydrolyzable property of GeO_x, the wet-N₂ anneal can greatly suppress the growth of unstable low-κ GeO_x interlayer, resulting in lower interface-state density and gate leakage current, in addition to larger κ value. In this study, when the sputtering power of the Ti target is 80 W together with a 25-W power for the Hf target and a post-deposition anneal (PDA) in wet-N₂ ambient at 500 °C for 300 s, excellent device performance is achieved: equivalent oxide thickness of 0.72 nm, equivalent dielectric constant of 39, interface-state density of 6.5 × 10¹¹ eV⁻¹ cm⁻² and gate leakage current of 5.7 × 10⁻⁴ A/cm² at V_g = 1 V. Therefore, in order to obtain high-quality HfTiO gate dielectric for small-scaled Ge MOS devices, not only should the Ti content be optimized, the PDA should also be done in a wet-N₂ ambient.     

Sm2O3 gate dielectric on Si substrate

High dielectric constant (κ) materials have become a necessity for down scaling of metal-oxide-semiconductor (MOS) based devices. Rare-earth oxides have been studied as alternative dielectric material to replace SiO₂ gate for future Si-based technology due to their excellent dielectric properties and thermodynamic stability with Si. This paper reviews reasons behind the use of rare-earth oxides as alternative high-κ dielectric materials and their requirements. Of these rare-earth oxides, Sm₂O₃ is one of the potential candidates that capture the attention of researchers owing to its intrinsic properties. These properties have been reviewed in comparison with the properties of other rare-earth oxides. Various deposition methods of Sm₂O₃ thin films on Si are also described, compared, and related to their physical and electrical properties. Based on the outcome of this review, Sm₂O₃ thin film has a huge potential to be the alternative dielectric for future MOS based devices when the listed challenges are resolved.     

ZrO2 insulator modified by a thin Al2O3 film to enhance the performance of InGaZnO thin-film transistor

A high-performance InGaZnO (IGZO) thin-film transistor (TFT) with ZrO₂–Al₂O₃ bilayer gate insulator is fabricated. Compared to IGZO-TFT with ZrO₂ single gate insulator, its electrical characteristics are significantly improved, specifically, enhancement of I_on/I_off ratios by one order of magnitude, increase of the field-effect mobility (from 9.8 to 14 cm²/Vs), reduction of the subthreshold swing from 0.46 to 0.33 V/dec, the maximum density of surface states at the channel-insulator interface decreased from 4.3 × 10¹² to 2.5 × 10¹² cm⁻². The performance enhancements are attributed to the suppression of leakage current, smoother surface morphology, and suppression of charge trapping by using Al₂O₃ films to modify the high-k ZrO₂ dielectric.     

Structural and frequency-dependent dielectric properties of PVP-SiO2-TMSPM hybrid thin films

In the present study, thin films of PVP-SiO₂-TMSPM (polyvinylpyrrolidone-silicon dioxide- 3-trimethoxysilyl propyl metacrylate) were deposited on p-type Si (111) substrates using spin coating technique. Fourier transform infrared spectroscopy (FTIR), X-ray diffraction (XRD), and energy dispersive X-ray spectrometry (EDS) were applied to investigate the chemical bonds and structural properties of the samples. Morphology of the hybrid thin films was studied using atomic force microscopy (AFM) and scanning electron microscopy (SEM) techniques. The frequency dependence of dielectric properties such as dielectric constant (ε^′), dielectric loss (ε″), loss tangent (tan δ) as well as the real component of electric modulus (M′), imaginary component of electric modulus (M″), and AC electrical conductivity (σ_AC) was studied in Al/PVP-SiO₂-TMSPM/PSi used as a metal-polymer-semiconductor (MPS) device. Analysis of dielectric relaxation behavior was performed in the frequency range of 0.1 KHz to 1 MHz. In the frequency range of 1 KHz to 1 MHz, the σ_AC data were varied from 6.35 × 10⁻⁶ to 9.02 × 10⁻⁶ for the sample with 0.15 wt ratios of TMSPM and equivalent values of both PVP and SiO₂. The dielectric, modulus, and AC conductivity analyses were considered the useful factors to detect the effects of the capacitance, ionic conductivity, and dielectric relaxation process.