改进遗传算法应用于超低副瓣天线阵的综合设计

提出了一种改进的遗传算法.在同一代中对各个个体采用不重复交叉和不重复变异的策略和分别在交叉和变异后采用精英保留的策略,并改进了自适应规则.将该算法应用于实现线阵超低副瓣方向图.将各个天线单元的电流幅度和单元间距作为参量进行优化.给出了线阵天线单元在不同单元个数和不同间距条件下的优化结果.结果表明,该改进的遗传算法能够优化实现低于-40dB的超低副瓣,优于已有文献中遗传算法对天线阵副瓣的综合设计结果.     

A routing framework for providing robustness to node failures in mobile ad hoc networks

Nodes in a mobile ad hoc network are often vulnerable to failures. The failures could be either due to fading effects, battery drainage, or as a result of compromised nodes that do not participate in network operations. Intermittent node failures can disrupt routing functionalities. As such, it is important to provide redundancy in terms of providing multiple node-disjoint paths from a source to a destination. In line with this objective, we first propose a modified version of the widely studied ad hoc on-demand distance vector routing protocol to facilitate the discovery of multiple node-disjoint paths from a source to a destination. We find that very few of such paths can be found. Furthermore, as distances between sources and destinations increase, bottlenecks inevitably occur and thus, the possibility of finding multiple paths is considerably reduced. We conclude that it is necessary to place what we call reliable nodes (in terms of both being robust to failure and being secure) in the network to support efficient routing operations. We propose a deployment strategy that determines the positions and the trajectories of these reliable nodes such that we can achieve a framework for reliably routing information. We define a notion of a reliable path which is made up of multiple segments, each of which either entirely consists of reliable nodes, or contains a preset number of multiple paths between the end points of the segment. We show that the probability of establishing a reliable path between a random source and destination pair increases tremendously even with a small number of reliable nodes when we use our algorithm to appropriately position these reliable nodes.     

Comparative Performance Evaluation of Scatternet Formation Protocols for Networks of Bluetooth Devices

This paper describes the results of the first ns2-based comparative performance evaluation among four major solutions presented in the literature for forming multi-hop networks of Bluetooth devices (scatternet formation). The four protocols considered in this paper are BlueTrees [1], BlueStars [2], BlueNet [3] and the protocol presented in [4] which proposes geometric techniques for topology reduction combined with cluster-based scatternet formation. We implemented the operations of the four protocols from device discovery to scatternet formation. By means of a thorough performance evaluation we have identified protocol parameters and Bluetooth technology features that affect the duration of the formation process and the properties of the produced scatternet. We have investigated how possible modifications of the BT technology (e.g., backoff duration, possibility for a BT inquirer to identify itself) make device discovery more efficient for scatternet formation in multi-hop networks. We have then discussed implementation concerns for each of the selected protocols. Finally, we have analyzed the protocols overhead as well as the effect of the different protocols operations on key metrics of the generated scatternets, which includes the time needed for forming a scatternet, the number of its piconets, the number of slaves per piconet, the number of roles assumed by each node and the scatternet route lengths.     

A Closed-form Solution for the Pre-image Problem in Kernel-based Machines

The pre-image problem is a challenging research subject pursued by many researchers in machine learning. Kernel-based machines seek some relevant feature in a reproducing kernel Hilbert space (RKHS), optimized in a given sense, such as kernel-PCA algorithms. Operating the latter for denoising requires solving the pre-image problem, i.e. estimating a pattern in the input space whose image in the RKHS is approximately a given feature. Solving the pre-image problem is pioneered by Mika’s fixed-point iterative optimization technique. Recent approaches take advantage of prior knowledge provided by the training data, whose coordinates are known in the input space and implicitly in the RKHS, a first step in this direction made by Kwok’s algorithm based on multidimensional scaling (MDS). Using such prior knowledge, we propose in this paper a new technique to learn the pre-image, with the elegance that only linear algebra is involved. This is achieved by establishing a coordinate system in the RKHS with an isometry with the input space, i.e. the inner products of training data are preserved using both representations. We suggest representing any feature in this coordinate system, which gives us information regarding its pre-image in the input space. We show that this approach provides a natural pre-image technique in kernel-based machines since, on one hand it involves only linear algebra operations, and on the other it can be written directly using the kernel values, without the need to evaluate distances as with the MDS approach. The performance of the proposed approach is illustrated for denoising with kernel-PCA, and compared to state-of-the-art methods on both synthetic datasets and realdata handwritten digits.     

Fast,Flexible Text Search Using Genomic Short‐Read Mapping Model

The searching of an extensive document database for documents that are locally similar to a given query document, and the subsequent detection of similar regions between such documents, is considered as an essential task in the fields of information retrieval and data management. In this paper, we present a framework for such a task. The proposed framework employs the method of short‐read mapping, which is used in bioinformatics to reveal similarities between genomic sequences. In this paper, documents are considered biological objects; consequently, edit operations between locally similar documents are viewed as an evolutionary process. Accordingly, we are able to apply the method of evolution tracing in the detection of similar regions between documents. In addition, we propose heuristic methods to address issues associated with the different stages of the proposed framework, for example, a frequency‐based fragment ordering method and a locality‐aware interval aggregation method. Extensive experiments covering various scenarios related to the search of an extensive document database for documents that are locally similar to a given query document are considered, and the results indicate that the proposed framework outperforms existing methods.     

Parallel implementation of neural networks

This paper presents systematic methods, based on graph theoretic approach, for mapping of neural networks onto mesh connected SIMD arrays. The methods are applicable to a large class of multilayer network models, which can be represented in terms of sparse matrix vector operations. The class of computers, that the mappings are suitable for, encompasses most of the experimental and commercial mesh-connected SIMD arrays of processors. There are three methods described in the paper, one for the case of a processor array, which is larger or equal to the network size and two for the partitioned case, i.e. array smaller than the input data size. The methods are illustrated on an example of a multilayer perceptron with back-propagation learning, which consists ofn nuerons ande synaptic connections. For the first method, the processor array is assumed to be of sizeN×N, whereN ² n+e, and the required local memory of processors is limited to only a few registers. The implementation of a single iteration of a recall phase according to the method requires 24(N-1) shifts. For this method we have developed a software tool, which generates a sequence of pseudo instructions, such as elemental data shift and arithmetic operations, that implement a given neural network on a given size processor array. For the two partitioned methods, the processor array is of sizeP×P, whereP ²n+e, and the local memory in the processors is of sizeO(K). The faster of the two methods requiresO(N ³/P ³ K) time for an iteration of the recall or learning phase.This research was supported in part by the National Science Foundation under grant MIP-8714689 and IRI-9145810.Preliminary versions of the results contained in this paper appear in the International Conference on Applications-Specific Array Processors 1990 and the IEEE Workshop on VLSI Signal Processing 1990.     

Route optimization in mobile ATM networks

This paper presents an algorithm for optimizing the route of a connection that becomes suboptimal due to operations such as handoffs and location-based reroutes, and applies this algorithm to the handoff management problem in mobile ATM (Asynchronous Transfer Mode) networks based on the PNNI (Private Network-to-Network Interface) standard. The route optimization algorithm uses hierarchical route information of the connection and summarized topology and loading information of the network to determine a “crossover node” such that adjusting the connection from that crossover node results in an optimally routed connection. Handoff management schemes that perform local rerouting of connections have been proposed in order to support fast handoffs. These methods result in suboptimally routed connections. In this paper, we demonstrate how this route optimization algorithm can be used to optimize the route of a connection after such a handoff is executed, as the second phase of a two-phase handoff scheme. This route optimization procedure can also be executed as part of the handoff procedure resulting in a one-phase handoff scheme. Applying this route optimization algorithm, we propose two one-phase schemes, the one-phase optimal scheme and the one-phase minimal scheme. A comparative performance analysis of one- and two-phase handoff schemes is presented. Measures of comparison are handoff latency and the amount of network resources used by a connection. Handoff latency in the one-phase optimal scheme is greater than that in the two-phase schemes, and handoff latency in the one-phase minimal scheme is smaller than that in the two-phase schemes. The one-phase methods show a significant increase in efficiency of the connection compared to the two-phase methods. This revised version was published online in June 2006 with corrections to the Cover Date.     

Models and Approximation Algorithms for Channel Assignment in Radio Networks

We consider the frequency assignment (broadcast scheduling) problem for packet radio networks. Such networks are naturally modeled by graphs with a certain geometric structure. The problem of broadcast scheduling can be cast as a variant of the vertex coloring problem (called the distance-2 coloring problem) on the graph that models a given packet radio network. We present efficient approximation algorithms for the distance-2 coloring problem for various geometric graphs including those that naturally model a large class of packet radio networks. The class of graphs considered include (r,s)-civilized graphs, planar graphs, graphs with bounded genus, etc.     

A batch‐type time‐true ATM‐network simulator—design for parallel processing

This paper presents a new type of network simulator for simulating the call‐level operations of telecom networks and especially ATM networks. The simulator is a pure time‐true type as opposed to a call‐by‐call type simulator. It is also characterized as a batch‐type simulator. The entire simulation duration is divided into short time intervals of equal duration, t. During t, a batch processing of call origination or termination events is executed and the time‐points of these events are sorted. The number of sorting executions is drastically reduced compared to a call‐by‐call simulator, resulting in considerable timesaving. The proposed data structures of the simulator can be implemented by a general‐purpose programming language and are well fitted to parallel processing techniques for implementation on parallel computers, for further savings of execution time. We have first implemented the simulator in a sequential computer and then we have applied parallelization techniques to achieve its implementation on a parallel computer. In order to simplify the parallelization procedure, we dissociate the core simulation from the built‐in call‐level functions (e.g. bandwidth control or dynamic routing) of the network. The key point for a parallel implementation is to organize data by virtual paths (VPs) and distribute them among processors, which all execute the same set of instructions on this data. The performance of the proposed batch‐type, time‐true, ATM‐network simulator is compared with that of a call‐by‐call simulator to reveal its superiority in terms of sequential execution time (when both simulators run on conventional computers). Finally, a measure of the accuracy of the simulation results is given. Copyright © 2002 John Wiley & Sons, Ltd.     

Transformation champ proche — champ lointain bidimensionnelle et monodimensionnelle appliquée à des mesures de SER

In high frequency thercs measurement of large target must be done at important distances, so the distance of measurement (Fraunhofer’s distance) R is given by R ≥ 2d² /λ where d is the tranversal length of the target and λ the radiation wavelength. In this paper we present a method for target that are large relative to the curvature of the spherical wavefront and the curvature of the cylindrical wavefront. A two-dimensional analytical algorithm transforms the spherical wave (near-field) measurement into the desired plane wave (far-field) and a one-dimensionnal analytical algorithm transforms the cylindrical wave (near-field) measurement into the desired plane wave (far-field). We present some results on simulations and measurements. A comparison of one-dimensional and two-dimensional methods demonstrates the efficiency of the two dimensional methods.     

混合扫描多子阵平板天线旁瓣电平优化研究

多子阵技术是平板天线动中通降低天线系统高度的重要方法,但其离散口径却带来了高旁瓣,且难以通过传统的不等幅馈电技术得以抑制.文中从理论上分析了混合扫描多子阵平板天线的方向图特性,给出了几种降低旁瓣电平的方法.以降低天线扫描范围内的最高旁瓣电平为目标,采用遗传算法对子阵间距进行优化研究,仿真结果表明子阵间距优化可以显著降低天线的旁瓣电平.该方法与分析结果可为多子阵平板天线的设计提供参考.     

Non-interactive Timestamping in the Bounded-Storage Model

A timestamping scheme is non-interactive if a stamper can stamp a document without communicating with any other player. The only communication done is at validation time. Non-Interactive timestamping has many advantages, such as information theoretic privacy and enhanced robustness. Non-Interactive timestamping, however, is not possible against polynomial-time adversaries that have unbounded storage at their disposal. As a result, no non-interactive timestamping schemes were constructed up to date. In this paper we show that non-interactive timestamping is possible in the bounded-storage model, i.e., if the adversary has bounded storage, and a long random string is broadcast to all players. To the best of our knowledge, this is the first example of a cryptographic task that is possible in the bounded-storage model but is impossible in the “standard cryptographic setting,” even when assuming “standard” cryptographic assumptions. We give an explicit construction that is secure against all bounded storage adversaries and a significantly more efficient construction secure against all bounded storage adversaries that run in polynomial time. A preliminary version of this paper appeared in CRYPTO 2004 [24]. Tal Moran: Some of this work was done while at Tel-Aviv University. Ronen Shaltiel: Some of this work was done while at the Weizmann Institute of Science and supported by the Koshland Scholarship. This research was also supported by Grant No 2004329 from the United States-Israel Binational Science Foundation (BSF) and by ISF grant 686/07. Amnon Ta-Shma: Supported by the Binational Science Foundation, by the Israel Science Foundation, and by the EU Integrated Project QAP.     

New Error Control Algorithms for Residue Number System Codes

We propose and describe new error control algorithms for redundant residue number systems (RRNSs) and residue number system product codes. These algorithms employ search techniques for obtaining error values from within a set of values (that contains all possible error values). For a given RRNS, the error control algorithms have a computational complexity of t·O(log₂ n + log₂ m?) comparison operations, where t denotes the error correcting capability, n denotes the number of moduli, and m? denotes the geometric average of moduli. These algorithms avoid most modular operations. We describe a refinement to the proposed algorithms that further avoids the modular operation required in their respective first steps, with an increase of ?log₂ n? to their computational complexity. The new algorithms provide significant computational advantages over existing methods.     

An optimization technique for lowering the iteration bound of DSP programs

The throughput of a parallel execution of a DSP algorithm is limited by the iteration bound, which is the minimum period between the starts of consecutive iterations. It is given byT _i=max (T _i/D _i), whereT _i andD _i are the total time of operations and the number of delays in loopi, respectively. The execution throughput of a DSP algorithm can be increased by reducing theT _is, and this reduction can be realized by taking as many operations as possible out of loops without changing the semantic of the calculation. Since many DSP algorithms extensively use the four basic arithmetic operations, a simple and effective way of doing this reduction is to apply commutativity, associativity and distributivity on these operations. This paper presents an optimization technique, calledLoop Shrinking, which reduces the iteration bound by using the above method. Loop Shrinking is based on a heuristic method which is time-efficient for simple cases but can also tackle complex examples. An implementation of Loop Shrinking is presented in this article. The results show that it can yield a reduction in the iteration bound near or equal to careful hand-tuning.     

Intermediate Representations for Design Automation of Multiprocessor DSP Systems

Self-timed scheduling is an attractive implementation style for multiprocessor DSP systems due to its ability to exploit predictability in application behavior, its avoidanceof over-constrained synchronization, and its simplified clocking requirements.However, analysis and optimization of self-timed systems under real-time constraintsis challenging due to the complex, irregular dynamics of self-timed operation.In this paper, we review a number of high-level intermediate representationsfor compiling dataflow programs onto self-timed DSP platforms, including representationsfor modeling the placement of interprocessor communication (IPC) operations;separating synchronization from data transfer during IPC; modeling and optimizinglinear orderings of communication operations; performing accurate design spaceexploration under communication resource contention; and exploring alternativeprocessor assignments during the synthesis process. We review the structureof these representations, and discuss efficient techniques that operate onthem to streamline scheduling, communication synthesis, and power managementof multiprocessor DSP implementations.     

Hybrid formation control of the Unmanned Aerial Vehicles

An essential issue in the formation control of Unmanned Aerial Vehicles (UAVs) is to design a reliable controller in their path planner level to handle all interactions between the continuous dynamics of the system and inherent discrete nature of the decision making unit, which has been embedded to coordinate the control submodules. In this paper, we have proposed a new approach of hybrid supervisory control of UAVs for a two-dimensional leader follower formation scenario. The approach is able to comprehensively capture internal relations between the path planner dynamics and the decision making unit of the UAVs. To design such a hybrid supervisory controller for the formation problem, we have introduced a new method of abstraction, based on polar partitioning of the state space. Furthermore, we have utilized the properties of multi-affine vector fields over the polar partitioned space. Within this framework, we design a modular decentralized supervisor in the path planner level of the UAVs to achieve two major goals: first, reaching the formation and second, keeping the formation. In addition, an inter-collision avoidance mechanism has been considered in the controller structure. The approach is robust against uncertainty in the initial state of the system, in the sense that it can bring the follower UAV to the desired position, starting from any arbitrary initial position inside the control horizon. Moreover, the velocity bounds are applied through the design procedure so that the generated velocity references can be given to the lower level of the control hierarchy, as the references to be followed.     

New algorithms for reconfiguring VLSI/WSI arrays

In this paper we present new algorithms for reconfiguring arrays of identical Processing Elements (PEs) in the presence of faults. In particular, we consider a well-studied reconfiguration model which consists of a rectangular array of PEs with spare columns of PEs on one side. In the presence of faulty PEs, reconfiguration is achieved by constructing alogical array using only the healthy non-spare and spare PEs. Note that one can always successfully reconfigure the array as long as the number of faulty PEs is no more than the number of spare PEs. The general objective, however, is to derive a logical array such that the geometric distances betweenlogical neighbors (i.e., PEs that are connected in the reconfigured array) are kept small. This criterion is motivated by the fact that shorter interconnects reduce the communication delays among the PEs, and also lead to less routing hardware. The problem of determining a reconfiguration that minimizes the length of the longest interconnect ishard and several researchers have presented sub-optimal algorithms that seem to have satisfactory performance. In this paper we develop anew efficient algorithm that can reconfigure any array with arbitrary patterns of faulty PEs. Furthermore we show that our algorithm performs better than most of the other algorithms developed for similar models.This work was supported in part by the SDIO/IST U.S. Army Research Office through Contract DAAL03-90-G-0108.     

Dynamic Task-Based Anycasting in Mobile Ad Hoc Networks

Mobile ad hoc networks (MANETs) have received significant attention in the recent past owing to the proliferation in the numbers of tetherless portable devices, and rapid growth in popularity of wireless networking. Most of the MANET research community has remained focused on developing lower layer mechanisms such as channel access and routing for making MANETs operational. However, little focus has been applied on higher layer issues, such as application modeling in dynamic MANET environments. In this paper, we present a novel distributed application framework based on task graphs that enables a large class of resource discovery based applications on MANETs. A distributed application is represented as a complex task comprised of smaller sub-tasks that need to be performed on different classes of computing devices with specialized roles. Execution of a particular task on a MANET involves several logical patterns of data flow between classes of such specialized devices. These data flow patterns induce dependencies between the different classes of devices that need to cooperate to execute the application. Such dependencies yield a task graph (TG) representation of the application.We focus on the problem of executing distributed tasks on a MANET by means of dynamic selection of specific devices that are needed to complete the tasks. In this paper, we present simple and efficient algorithms for dynamic discovery and selection (instantiation) of suitable devices in a MANET from among a number of them providing the same functionality. This is carried out with respect to the proposed task graph representation of the application, and we call this process Dynamic Task-Based Anycasting. Our algorithm periodically monitors the logical associations between the selected devices, and in the event of a disruption in the application owing to failures in any component in the network, it adapts to the situation and dynamically rediscovers the affected parts of the task graph, if possible. We propose metrics for evaluating the performance of these algorithms and report simulation results for a variety of application scenarios differing in complexity, traffic, and device mobility patterns. From our simulation studies, we observed that our protocol was able to instantiate and re-instantiate TG nodes quickly and yielded high effective throughput at low to medium degrees of mobility and not much below 70% effective throughput for high mobility scenarios.     

Spectral Efficiency of WRAN Spectrum Overlay in the TV White Space

In this letter, we investigate the spectral efficiency of IEEE 802.22 wireless regional area network (WRAN) spectrum overlay when it is used in TV white space. Since 2004, when the FCC published the notice of proposed rule making 04‐186 to make use of unused TV spectrum, the IEEE 802.22 working group has been standardizing specifications for WRAN operations. There have been a few papers investigating the spectral efficiency of this, but their analyses were limited to the cases for various guard distances between WRAN base stations. Since WRAN base station (BS) power for WRAN service may differ from country to country, it is important to analyze the spectral efficiency for various WRAN BS powers. In this letter, we analyze the spectral efficiency of WRAN spectrum overlay as a function of the power of WRAN BSs. The simulation results show that spectral efficiency decreases as the power of WRAN BSs and guard distances increase.     

Solvability and error bounds for nonlinear circuits containing operational amplifiers

Although an operational amplifier is a nonlinear device, the existing methods of analysis of circuits with operational amplifiers view it as a linear element which possibly has an infinite gain. As a result, it is not clear to what extent the results thus obtained hold. In this paper we construct a general model of a (nonlinear) circuit containing operational amplifiers. Viewing such a network as an interconnection of a multiport withn operational amplifiers, we give conditions for solvability (i.e., for the existence of an input-output operator), and establish estimates for the error incurred by replacing such a system by an idealized system whose operational amplifiers have infinite gain. In this way we determine ranges for variables within which the traditional linear analysis gives results that fulfill given accuracy requirements.