Harmonic and Intermodulation Performance of Metallic Carbon Nanotube (MCNT) and Complementary Carbon Nantube Field Effect Transistor (CNTFET) Amplifier

This paper presents a simple mathematical model for the output-voltage (current)/ input-voltage characteristic of the carbon nanotube field effect transistor (CNTFET) complementary inverting amplifier and the metallic carbon nanotube (MCNT) interconnect. The model, basically a Fourier series, yields closed-form expressions for the amplitudes of the harmonic and intermodulation components of the output voltage (current) resulting from a multisinusoidal input voltage. The special case of a two-tone equal-amplitude input voltage is considered in detail. The results show that the harmonic and intermodulation performance of the complementary CNTFET-based inverting amplifier and the MCNT interconnect is strongly dependent on the values of the amplitudes of the input tones with the third-order intermodulation component dominating over a wide range of the input voltage amplitudes. The results also show that while the harmonics may exhibit minima, the intermodulation products are almost monotonically increasing with the increase in the input voltage amplitude and exhibit no minima.     

Theoretical Analysis of Carbon-Nanotube-Based Mixers and Frequency Multipliers

In this paper closed-form expressions are presented for the current components in a CNT-based p-n junction diode resulting from a multisinusoidal input voltage. The expressions obtained, in terms of the modified Bessel functions, are simple and can be used for calculating the amplitudes of the fundamental, harmonics and intermodulation (mixing) current components in the CNT-based p-n junction diode. Using these expressions the performance of the CNT-based p-n junction diode excited by an equal-amplitude two-tone was studied in detail. The results obtained show that the amplitudes of the harmonic and mixing components are strongly dependent on the DC bias voltage, the series resistance and the ideality factor of the p-n junction diode.     

A nonlinear model for the GaAs ballistic diode

A simple formula is presented for the current-voltage relationship of the GaAs ballistic diode. Also, closed-form expressions are derived for the harmonics and intermodulation current contents resulting from exciting the diode by a multisinusoidal input voltage.     

Surface and geometry effects on large signal base input voltage and input resistance of junction transistors

A design theory for large signal base input voltage and input resistance of junction transistors is presented with emphasis on the effect of surface recombination and transistor geometry. Two-dimensional distributions of minority carrier density and electric field are obtained for the separate portions of the base region. These distributions are then expressed in terms of emitter current and are used to derive expressions for the large signal base input voltage and resistance. The dependence of carrier distribution on surface recombination velocity and transistor geometry is illustrated by curves. The theory is corroborated by a series of experiments carried out with p-n-p power transistors. The parameters varied are surface recombination velocity (by baking), emitter diameter, base ring diameter, dice thickness and base region resistivity. The measured base input voltage and resistance are plotted and compared with calculated values based on the theory presented. Good agreement is found between calculated and measured values. The results deviate in several interesting respects from the values predicted by the small signal or low injection level theory. Based on this theory, design considerations for the large signal input voltage and input resistance are discussed.     

A physical theory of junction transistors in the collector-voltage-saturation region

A physical theory has been formulated for the operation of junction transistors in the "collector-voltage-saturation" region or "on" region. Transistor characteristics in this region are important for switching applications, Class A or Class B amplifiers, as well as other large signal applications. The formulation is based on the physical consideration that in the "collector-voltage-saturation" region the collector-base junction is forwardly biased, and that the injection level is high. Two-dimensional distributions of carrier densities, current densities, and electric field are obtained for separate portions of the base region. Using these distributions, theoretical expressions are derived for the characteristics of p-n-p and n-p-n transistors including saturation voltage, base input voltage, and dc current amplification factor. Good agreement between theoretical and experimental results indicates that the approximations used in the theory are valid. Numerical calculations have been carried out for the saturation voltage, base input voltage, and dc current amplification factor for different geometrics and material properties. The calculation illustrates the use of the theory for quantitative designs of transistor characteristics.     

Four-terminal analysis of the Hall generator

The four-terminal parameters of the Hall generator are derived and then used to develop expressions for input impedance, output impedance, current gain, and voltage gain. The theoretically determined expressions are then verified for a Hall generator using indium antimonide. The four-terminal equations are given as a function of conductivity, Hall constant, temperature, magnetic field, and dimensions of the material. Thus, the designer may use these expressions in the application of Hall-effect devices.     

Single-stage amplifier characteristics of the super-beta composite transistor†

A study has been made of the single-stage amplifier characteristics of the super-beta composite transistor system, in which the circuit has been analysed and the expressions for its voltage gain, current gain, input resistance and the power gain have been obtained in terms of the various parameters of the individual transistor. Further, the expressions obtained have been simplified by taking similar transistors of the composite system. The variations of input resistance, current gain and the power gain with load resistance have also been studied and a set of curves is given showing these variations.     

Current-mode signaling in deep submicrometer global interconnects

This paper addresses propagation delay and power dissipation for current mode signaling in deep submicrometer global interconnects. Based on the effective lumped element resistance and capacitance approximation of distributed RC lines, simple yet accurate closed-form expressions of delay and power dissipation are presented. A new closed-form solution of delay under step input excitation is first developed, exhibiting an accuracy that is within 5% of SPICE simulations for a wide range of parameters. The usefulness of this solution is that resistive load termination for current mode signaling is accurately modeled. This model is then extended to a generalized delay formulation for ramp inputs with arbitrary rise time. Using these expressions, the optimum-line width that minimizes the total delay for current mode circuits is found. Additionally, a new power-dissipation model for current-mode signaling is developed to understand the design tradeoffs between current and voltage sensing. Based on the results and derived formulations, a comparison between voltage and current mode repeater insertion for long global deep submicrometer interconnects is presented.     

Harmonic and intermodulation performance of moderate inversion MOSFET transconductors

This article discusses the harmonic and intermodulation performance of moderate inversion MOSFET transconductors. The bulk of the nMOS transistor is tied to ground, at all levels of inversion, including moderate inversion and the transistor is operating in the saturation region where it behaves qualitatively as a constant current source. The current–voltage characteristic of the transistor is approximated using a Fourier-series model. Using this model, analytical expressions are obtained for amplitudes of the harmonics and intermodulation products resulting from multi-sinusoidal gate-to-source input voltages. The special case of a two equal-amplitude sinusoidal input is considered in detail and the results are compared with previously published results.     

Active input-voltage and load-current sharing in input-series and output-parallel connected modular DC-DC converters using dynamic input-voltage reference scheme

This paper explores a new configuration for modular DC/DC converters, namely, series connection at the input, and parallel connection at the output, such that the converters share the input voltage and load current equally. This is an important step toward realizing a truly modular power system architecture, where low-power, low-voltage, building block modules can be connected in any series/parallel combination at input or at output, to realize any given system specifications. A three-loop control scheme, consisting of a common output voltage loop, individual inner current loops, and individual input voltage loops, is proposed to achieve input voltage and load current sharing. The output voltage loop provides the basic reference for inner current loops, which is modified by the respective input voltage loops. The average of converter input voltages, which is dynamically varying, is chosen as the reference for input voltage loops. This choice of reference eliminates interaction among different control loops. The input-series and output-parallel (ISOP) configuration is analyzed using the incremental negative resistance model of DC/DC converters. Based on the analysis, design methods for input voltage controller are developed. Analysis and proposed design methods are verified through simulation, and experimentally, on an ISOP system consisting of two forward converters.     

非晶IGZO薄膜晶体管开启区电流的解析模型

对非晶In-Ga-Zn-Oxide薄膜晶体管,假设能隙中陷阱态密度呈指数分布,给出了解析的电流模型。运用薄层电荷近似的方法推导陷落电荷和自由电荷表达式,并基于此给出了基于表面势的电流表达式。在此电流表达式的基础上,通过泰勒展开,给出了基于阈值电压的电流表达式。基于表面势和基于阈值电压的电流表达式的计算结果与测量数据相比较,符合得很好。     

Harmonic and intermodulation performance of double-gate CMOS inverting voltage amplifier

This paper presents a simple mathematical model for the transfer characteristic of the double gate (DG) CMOS inverting voltage amplifier. The model yields closed-form expressions for the amplitudes of the fundamental and distortion components of the output voltage resulting from a multisinusoidal input voltage for different scenarios and values of the bottom gates voltages. The special case of a two-tone equal-amplitude input voltage is considered in detail. The results show that the distortion performance of the DG-CMOS inverting voltage amplifier is strongly dependent on the bottom gates voltages and the amplitudes of the input sinusoids with the third-order intermodulation component dominating over the whole range of the input voltage amplitudes and different bottom gates voltages.     

基于锁相放大器的光纤电流互感器研究

为了测试光纤电流互感器中由于Faraday效应引起的旋转量,提出了采用锁相放大器处理信号的方法,改进了传统的将交流成分与直流成分相除的方法。系统将采集信号做单端电压输入测试和差分电压输入测试,并比较了单端输入与差分输入的测试效果,定性分析了输出幅值与被测电流的关系。测试结果表明,锁相放大器输出幅值与被测电流具有线l陛关系,且差分输入较单端输入幅值大、线性度好、对外界干扰抑制性强。其成果为进一步研究基于旋光效应的光纤电流互感器的应用奠定了基础。     

Harmonic and intermodulation performance of MoS2FET- and GFET-based amplifiers

This paper presents a simple mathematical model for the output–input voltage characteristic of the graphene field effect transistor (GFET)- and the molybdenum disulfide field effect transistor (MoS₂FET)-based inverting amplifiers. The model, basically a Fourier series, yields closed-form expressions for the amplitudes of the harmonic and intermodulation components of the output voltage resulting from a multisinusoidal input voltage. The special case of a two-tone equal-amplitude input voltage is considered in detail. The results show that the harmonic and intermodulation performance of the complementary GFET- and the MoS₂FET-based inverting amplifiers is strongly dependent on the bias voltage and the amplitudes of the input tones with the third-order intermodulation component dominating over a wide range of the input voltage amplitudes.     

Low-voltage constant-gm rail-to-rail CMOS operational amplifier input stage

This paper presents a rail-to-rail constant-g_m operational amplifier input stage. The proposed circuit changes the tail current of the input differential pairs dynamically for a constant-g_m by using dummy input differential pairs. The problem which causes total g_m variation is input pairs and dummy input pairs can not take effect at the same time with the common-mode input voltage changes, because the tail current transistor of the input pairs are in triode region when the input pairs are turned off, the dummy input pairs will enter subthreshold region from cut-off region before the input pairs when common-mode voltage changes. The effect of this problem is more obviously in low supply voltage design. To solve this problem, compensate current sources is added to the tail current transistors of each dummy input differential pairs for lower g_m variation. The g_m of this Op Amp’s input stage varies around ±2%.     

Single current sensor control for single-phase active power factor correction

This paper presents the realization of a boost-type active power factor corrector (APFC) using a single current sensor to sense the inductor current for input current shaping and output voltage regulation. Neither input voltage nor output voltage sensing is needed. The sensed inductor current is used for two main functions. The first one is for comparing with a sawtooth signal in order to shape the input current waveform. The second one is for determining the input and output voltages by processing the rate of change of the inductor current when the main switch is in on and off states, respectively. Compared with conventional APFCs, the proposed technique has several advantages. First, no dissipative voltage divider is required. Second, electrical isolation between the power conversion stage and the control stage can be achieved inherently. Finally, no complicated or sophisticated digital sampling and numerical computations are needed. The applicability and accuracy of the proposed technique have been studied experimentally. Steady-state behavior and large-signal response under output load disturbance are also investigated.     

A novel technique to achieve unity power factor and fact transientresponse in AC-to-DC converters

This paper presents a novel power factor correction technique for single-phase boost type AC-to-DC converters in continuous conduction mode. Instead of using the inductor current or switching device current, in this paper, the diode current in the boost converter is used to formulate the duty ratio of the switch in a special way which makes the input current sinusoidal and in phase with the input voltage. To improve the dynamic performance and minimize the input current harmonic components, a new double-injection compensation method is employed in the voltage feedback loop. The power factor corrector has the following advantages: (1) operation with constant switching frequency; (2) elimination of input voltage sensing, error amplifier in the current loop and multiplier in the output voltage feedback loop; (3) minimal total harmonic distortion in the input current; (4) fast dynamic response of the output voltage loop; and (5) simple implementation of the control circuit. The principles of operation of the proposed control scheme are explained. Simulation and experimental results are presented to verify the feasibility of the control strategy     

一种低压CMOS衬底驱动共源共栅电流镜

基于PMOS衬底驱动技术设计了低压PMOS衬底驱动CMOS共源共栅电流镜电路(BDCCM),并讨论分析了其输入阻抗、输出阻抗和频率特性。BDCCM的最低输入压降要求只有0.4V,但是其输入输出线性度和频率带宽要比传统的共源共栅电流镜低,是低频低压CMOS模拟集成电路设计的新型高性能共源共栅电流镜。     

基于模块串联的小功率变流器

提出一种基于模块串联的适用于高压输入（1kV以上）的DC／DC小功率变流器拓扑,分析其均压均流原理,讨论元器件参数对均压均流的影响。采取模块化设计,利用基本模块在输入侧串联的方法解决直流输入电压高于开关管最高耐压的矛盾。在不增加控制复杂度的前提下,适当选取输入侧串联模块的级数,可使输入电压高到几千伏甚至上万伏。     

A Unity Power Factor Correction Preregulator With Fast Dynamic Response Based on a Low-Cost Microcontroller

Low cost passive power factor correction (PFC) and single-stage PFC converters cannot draw a sinusoidal input current and are only suitable solutions to supply low power levels. PFC preregulators based on the use of a multiplier solve such drawbacks, but a second stage dc-dc converter is needed to obtain fast output voltage dynamics. The output voltage response of PFC preregulators can be improved by increasing the corner frequency of the output voltage feedback loop. The main drawback to obtaining a faster converter output response is the distortion of the input current. This paper describes a simple control strategy to obtain a sinusoidal input current. Based on the static analysis of output voltage ripple, a modified sinusoidal reference is created using a low cost microcontroller in order to obtain an input sinusoidal current. This reference replaces the traditional rectified sinusoidal input voltage reference in PFC preregulators with multiplier control. Using this circuitry, PFC preregulator topologies with galvanic isolation are suitable solutions to design a power supply with fast output voltage response (10 or 8.33 ms) and low line current distortion. Finally, theoretical and simulated results are validated using a 500 W prototype.