金属氧化物半导体控制晶闸管的di/dt优化

金属氧化物半导体控制晶闸管(MCT)相比于绝缘栅双极型晶体管(IGBT)具有高电流密度、低导通压降和快速开启等优势,在高压脉冲功率领域具有广阔的应用前景.作为脉冲功率开关,MCT开启过程对输出脉冲信号质量有很大影响.采用理论分析并结合仿真优化重点研究了MCT开启瞬态特性.通过对MCT开启过程进行详细地理论分析推导,给出了MCT开启过程中阳极电流和上升时间的表达式.结合Sentaurus TCAD仿真优化,将MCT开启过程中电流上升速率(di/dt)由40 kA/s提升至80 kA/s,极大地改善了器件开启瞬态特性.最后,总结提出了提高器件开启瞬间di/dt的设计途径.     

Temperature-Dependent Dynamic Behaviors of Organic Light-Emitting Diode

A systematic investigation of temperature-dependent dynamic behaviors of NPD-Alq₃ organic light-emitting diodes (OLEDs) is carried out. Through an in-depth numerical analysis, it has been found that the luminance decreases and consequently the turn-on voltage increases with decreasing temperature due to a reduction of thermally activated hopping speed, which retards the rise of electroluminescence (EL) upon turn-on as well as the discharge upon turn-off of OLEDs. Most importantly, however, the device efficiency is literally raised as the temperature decreases, a direct consequence of enhanced charge-balance factor. It is also demonstrated that the EL delay upon turn-on is mostly determined by the electron transport through the electron transport layer (ETL), while the fast EL decay (short-lived EL tail) upon turn-off is mainly by the rapid discharge of the steep pileup of carriers at the NPD/Alq₃ interface. The long-lived EL tail is shown to be more pronounced under lower temperatures. In response to a train of voltage pulses, the delay of EL occurring for the first voltage pulse has vanished for the subsequent pulses regardless of temperature due to space charges remaining inside the device after turn-off (in the "off-state"). However, it appears that the pulse-to-pulse interference by the space charge effects is more significant under lower temperatures     

丝网印刷碳纳米管阴极场发射点开启场强的分布统计

由于碳纳米管阴极场发射点数量巨大，分布无规律，无法单独测量各个场发射点的开启阈值，所以一直没有效的实验方法获得碳纳米管阴极中场发射点开启阈值的分布规律。本文采用丝网印刷碳纳米管点阵作为阴极，通过不同电压下该阴极场发射发光亮点的统计，间接地获得了丝网印刷碳纳米管阴极中场发射点开启阈值的分布规律。在此基础上，通过过压老炼的方法，有效地压缩了碳纳米管阴极场发射开启阈值的分布，显著提高了碳纳米管阴极场发射的均匀性。     

A method for the measurement of the turn-on condition in MOS transistors

Metal-oxide-silicon (MOS) integrated circuits usually consist of MOS transistors and interconnections. Both, interconnections and MOS transistors are built up of diffused regions in the bulk substrate and conductive strips (metal or polycrystalline silicon) on top of the oxide. For proper electrical operation the interconnection paths should not exhibit MOS transistor effects, i.e. should not induce inversion layers at the silicon-silicon dioxide interface. Furthermore from a designer's point of view it will be desired that some transistors operate in the saturated mode and others in the non-saturated mode. This implies that a method for the determination of the turn-on of channel conduction is highly desirable for designers of MOS integrated circuits. Using a straightforward definition of turn-on, a fast and simple measurement method will be presented for the determination of the relation between gate voltage and diffused region voltage for MOST structures in the turn-on condition.     

Active gate voltage control of turn-on di/dt and turn-off dv/dt in insulated gate transistors

As the characteristics of insulated gate transistors [like metal-oxide-semiconductor field-effect transistors and insulated gate bipolar transistors (IGBTs)] have been constantly improving, their utilization in power converters operating at higher and higher frequencies has become more common. However, this, in turn, leads to fast current and voltage transitions that generate large amounts of electromagnetic interferences over wide frequency ranges. In this paper, a new active gate voltage control (AGVC) method is presented. It allows us to control the values of di/dt at turn-on and dv/dt at turn-off for insulated gate power transistors, by acting directly on the input gate voltage shape. In an elementary switching cell, it enables us to strongly reduce over-current generated by the reverse recovery of the free-wheeling diode at turn-on, and oscillations of the output voltage across the transistor at turn-off. In the following sections, the AGVC in open and closed-loop for IGBT is presented, and its performance is compared with that of a more conventional method, i.e., increasing the gate resistance. Robustness of the AGVC is estimated under variations of dc-voltage supply and transistor switched current.     

Geometry of thyristor cathode shunts

In the all-diffused thyristor, the shunt pattern can easily be introduced by photo masking or silk screen techniques. It is known that the emitter shunts of various designs affected the rate of rise of forward blocking voltage, the forward I-V characteristics, the loop effect, the turn-on time, the dynamic forward voltage drop, and the reverse recovery time. This paper will show their relations to several shunt patterns based on experimental results.     

Turn-on process in 4H-SiC thyristors

Detailed turn-on measurements of 4H-Silicon Carbide (SiC) npnp thyristors are presented for a wide range of operating conditions. Comparisons with similarly-rated silicon and Gallium Arsenide thyristors show a superior rise time and pulsed turn-on performance of SiC thyristors. Rise time for a 400 V blocking voltage, 4 V forward drop (2.8×10³ A/cm²) SiC thyristor has been found to be of the order of 3-5 ns. Pulsed turn on measurements show a residual voltage of only 50 V when a current density of 10⁵ A/cm² (35 A) was achieved in 20 ns     

A simple technique to induce and control short pulses of deepdrain-source breakdown conditions

A simple method to induce drain-source breakdown, followed by the parasitic bipolar action, is reported for time intervals and energies sufficiently small to avoid thermal runaway. A relatively large capacitor, connected in parallel to the device under test, is charged up using a sufficiently large resistor and discharges automatically as the breakdown voltage (BV_DSS) is reached, thus eliminating the need for a fast and `ringing-free' switch in the test setup. Since the discharge process is controlled by the small dynamic device resistance, rather than the large external resistor, the resulting transitions are fast enough and therefore compatible with electrostatic discharge (ESD) or latch-up turn-on conditions. Such pulses were successfully used to study soft ESD damage in lightly-doped-drain (LDD) devices, using simple on-wafer probing     

A computer modeling approach for LSI digital structures

The paper presents a novel modeling approach to LSI MOST circuits performed at the gate level. A macromodel is analytically derived and provides a direct relationship between the input function and output response of the gate. This approach or macromodeling has been implemented for over 10 000 devices in LSI with only 32K of computer core and very fast computing time. The method employed relates directly the performance parameters (e.g., turn-on voltage, rise, and fall times, etc.) to the device parameters. An insight into the propagation delay of LSI structures is gained by statistically studying the transient performance of the system using Monte-Carlo techniques. Experimental results give ample evidence of good agreement with the computed results, for which various values of x0, oxide thickness, are used.     

A simple and reliable wafer-level electrical probing technique forIII-nitride light-emitting epitaxial structures

We report an easy-to-implement wafer-level electroluminescence characterization technique for InGaN/GaN light-emitting diodes (LED's) epi-wafers by means of multiple electrical probes. By first damaging the p-n junctions of the LED epilayer at localized spots, diode-like current versus voltage characteristics and emission spectra can be obtained at injection currents as high as 100 mA. This allows a relative but reliable comparison of device-related parameters such as differential quantum efficiency, leakage current, and series resistance among LED epi-wafers     

A novel GaAs FET with double camel-like gate structure

Extremely high potential barrier height and gate turn-on voltage of a novel GaAs field-effect transistor with n/sup +//p/sup +//n/sup +//p/sup +//n double camel-like gate structure are demonstrated. The maximum electric field and potential barrier height of the double camel-like gate are substantially enhanced by the addition of another n/sup +//p/sup +/ layers in gate region, as compared with the conventional n/sup +//p/sup +//n single camel-like gate. For a 1/spl times/100 /spl mu/m/sup 2/ device, a potential barrier height up to 2.741 V is obtained. Experimentally, a high gate turn-on voltage up to +4.9 V is achieved because two reverse-biased junctions of the double camel-like gate absorb part of positive gate voltage. In addition, the transistor action shows a maximum saturation current of 730 mA/mm and an extrinsic transconductance of 166 mS/mm.     

Bistable operation of two semiconductor lasers in an external cavity: Rate-equation analysis

The steady-state and dynamic behavior of a bistable laser resonator containing two semiconductor elements is examined theoretically. We derive necessary conditions for the bistable operation of the cavity and the constraints on the amplifier and absorber element characteristics imposed by these conditions. Our rate equation model demonstrates turn-on and turn-off of the output via current pulses, overshoot and ringing using fast rise time pulses, and critical slowing down when either the absorber or amplifier is switched. We give numerical results on switching.     

Optical drive requirements for laser-activated semiconductor switches

Laser-activated semiconductor switch (LASS) devices of the thyristor type exhibit three regimes of operation. At low optical drive, optical triggering is obtained with delay time before conduction and relatively low current rise rates. At intermediate drive levels, fast switching is obtained with no appreciable delay time and fast current rise rates (greater than 10⁹A/s) but with substantial power lost in the switch element. At higher optical drives, saturated switching is observed with the rise rate and power loss relatively independent of the optical drive level. LASS thyristors of 1- and 4-kV operating voltage ratings have been characterized in the lossy fast switching regime. For pulses of 100-ns duration, the devices act as resistive elements. The magnitude of the resistance varies inversely with the optical drive, and can be understood as conductivity modulation of the conduction path by the photogenerated carriers. Such characterization allows switch system design tradeoff between the required optical drive level and the tolerable power loss in the switch elements.     

An all solid-state modulator for the ARSR-3 transmitter

This paper describes an all solid-state, high-power pulse modulator used in the ARSR-3 system (an FAA air route surveillance radar system). The modulator, the culmination of a number of years of both device and circuit development, uses fast switching Reverse Blocking Diode Thyristors (RBDT's) to directly switch 14-MW, 3-µs video pulses at high current without the use of magnetic switching aids. The modulator consists of five identical PFN modules, a trigger amplifier, and a pulse transformer which matches the modulator output to the beam characteristics of a klystron. Each module contains its own PFN, discharge RBDT switch assembly, and associated circuitry. This modulator is the first production equipment to use the new Westinghouse T62R RBDT devices. The devices switch 2200-A pulses with a turn-on rate of rise of up to 3000 A/µs.     

Calculation of the turn-on behavior of most

All papers formerly published on the transient behavior of MOST have been subjected to certain restrictions. Therefore a more general mathematical model has been developed. It describes the turn-on process in the linear and the saturation region, when an exponential or ramp voltage is applied to the gate of a MOST with ohmic load. For the first time the influence of the build up of the carrier concentration in the inversion layer and the influence of the parasitic capacitances are considered at the same time. This allows the calculation of the exact drain response. There is no restriction for the geometrical dimensions as far as the gradual channel approximation is applicable. The nonlinear partial differential equation which describes the switching phenomena is solved numerically. There is excellent agreement between the results of the calculations and measurements on transistors with channel lengths between 10 and 80 μm. For typical examples the dependence of the turn-on time on the transistor parameters, the gate pulse and the drain load is discussed.     

Voltage shifts in the forward V-I characteristics of p-n-p-n power switches

The forward V-I characteristics of p-n-p-n power switches usually consist of one or more voltage shifts having negative resistance characteristics at small forward current. This phenomenon is attributed to local turning on of the switch due to shorted emitter and/or shorting dots used to enhance the dv/dt capability of the device, since lateral current flow plays a significant role in determining the V-I characteristics at small current, It is shown that the threshold current responsible for the voltage shift phenomenon has an empirical temperature dependence of the formI_{T} sim exp [- a(T - T_{0})]over the temperature range 20-125°C. The hysteresis loop associated with each negative resistance region can be explained in terms of the difference in turn-on current and holding current of a localized area in the vicinity of shorted emitter or shorting dots.     

Temperature dependence of turn-on voltage of gold-doped MOSFETs

The temperature dependence of the turn-on voltage of gold-doped and control n- and p-channel MOSFETs has been measured. To account for the large positive shift of turn-on voltage, VT Au, of gold treated n- and p-channel devices, it has been proposed that the gold eliminates the fast interface traps of continuous energy distribution, and that additional acceptor states very close to the valence band can cause additional charge QA Au, which can dominate the effect of acceptor and donor levels of gold ions in the silicon surface space charge region, and can also over-compensate the surface state charge, Qss. To fit the theoretical VT Auversus T curve to experimental curves, an accumulation of electrically active gold within the surface space charge region has been considered in n-channel devices and depletion in p-channel devices.     

Thermal stability analysis of AlGaAs/GaAs heterojunction bipolartransistors with multiple emitter fingers

A numerical electro-thermal model was developed for AlGaAs/GaAs heterojunction bipolar transistors (HBT's) to describe the base current, current gain and output power dependence on junction temperature. The model is applied to microwave HBT devices with multi-emitter fingers. The calculated results of the common-emitter, current-voltage characteristics in the linear active region show a “current crush” effect due to inherent nonuniform junction temperature, current density and current gain distribution in the device. The formation of highly localized high temperature regions, i.e., hot spots, occur when the device is operating beyond the current-crush point. This thermally induced current instability imposes an upper limit on the power capability of HBT's. The dependence of this effect on various factors is discussed. These factors include the intrinsic parameters such as the base current ideality factor, the “apparent” valence band discontinuity, and the temperature coefficient of the emitter-base turn-on voltage, as well as the extrinsic factors such as the emitter contact specific resistance, the substrate thermal conductivity and the heat source layout     

High-Gain Low Turn-On Voltage AlGaAs/GaAsNSb/GaAs Heterojunction Bipolar Transistors Grown by Molecular Beam Epitaxy

AlGaAs/GaAsNSb heterojunction bipolar transistors (HBTs) with low turn-on voltage have been fabricated. The turn-on voltage of the device fabricated from an as-grown sample is ~180 mV lower than that of a conventional AlGaAs/GaAs HBT. The effect of rapid thermal annealing on device performance is an increase in the gain from ~8.5 to ~20. However, the knee voltage of the annealed sample (~3 V), as well as the turn-on voltage, is also higher compared with that of the as-grown sample (~1.5 V).     

Low turn-on voltage InGaP/GaAsSb/GaAs double HBTs grown by MOCVD

A novel InGaP/GaAs_0.92Sb_0.08/GaAs double heterojunction bipolar transistor (DHBT) with low turn-on voltage has been fabricated. The turn-on voltage of the DHBT is typically 150 mV lower than that of the conventional InGaP/GaAs HBT, indicating that GaAsSb is a suitable base material for reducing the turn-on voltage of GaAs HBTs. A current gain of 50 has been obtained for the InGaP/GaAs_0.92Sb_0.08/GaAs DHBT. The results show that InGaP/GaAsSb/GaAs DHBTs have a great potential for reducing operating voltage and power dissipation