一种通过激光修调产生精确时钟的方法

文章介绍了一种通过修调,可在片内得到精确时钟的方法。该方法由于内部集成了检测电路,只需通过判断pad的输出结果即可得到修调状态,因此可应用于大规模工业化生产。在文章中给出了修调值的选取方法,同时还讨论了影响修调精度的因素。     

适用于片内集成的可修调低失调LDO

提出了一种新型可修调低失调LDO电路,该电路适于片内集成应用.现有的修调方法一般直接作用在反馈网络中,修调电路的自身失调会造成修调精度损失.本文提出一种失调隔离模块,以大大减小修调电路引入的误差.仿真结果表明,在修调电路发生10％的电流失调时,输出电压仅变化0.31％,使LDO输出电压的修调获得很好的线性度.     

一种带有Trimming电路的Gm-C带通滤波器的设计

针对红外接收芯片中带通滤波器的功能要求,在G_m-C二阶带通滤波器架构的基础上,设计了引入非平衡差分对的跨导运算放大器、驱动外部负载的缓冲器、修调电路以及外部中心频率调整电路。该G_m-C二阶带通滤波器的中心频率、通带增益、带宽均正交可调。电路采用0.25μm标准CMOS工艺设计,然后使用Hspice软件对整体电路进行了仿真验证。仿真结果显示:该带通滤波器的中心频率为36.3 kHz,带通增益为23.2 dB,带宽为5.8 kHz,品质因数为5.3。该电路结构简单、容易集成,可广泛应用于红外遥控接收系统中。     

基于电阻网络修调的高精度基准源

针对高精度集成电路系统,工艺条件导致的误差需要通过修调弥补。基于 0.18 μm CMOS 工艺设计了一种针对片上基准源的修调电路,通过调整数字输入信号,对电阻网络修调电路进行控制,通过重配置输出级电阻比例,从而达到对基准源电压的调整。基准源采用改进的 Neuteboom 带隙电路,在 5 V 电源电压的工艺条件下进行仿真测试,在-40～125 ℃温度范围内,实现了 2.98×10^-6/℃的温度系数。通过电阻网络修调的基准电压变化范围为 2.3840～2.5154 V,电压修调步长为 2 m V。     

应用于TCXO的新型五次方电压发生器的设计

采用VIS 0.40 μm BCD工艺,设计并实现了一种带有修调技术的应用于温度补偿晶体振荡器(TCXO)的新型五次方电压发生器电路,该五次方电压发生器电路主要由五次方电压产生电路与修调电路两部分构成.其中,五次方电压产生电路采用曲线拟合技术,相较于传统的乘法器级联结构具有更高的精度;新型修调电路用来改变五次方电压发生器的系数,采用双路开关技术提高了修调结果的精度.仿真结果显示,该五次方电压发生器的最大拟合误差为1.2％.测试结果显示,采用该新型五次方电压发生器电路设计的TCXO,其频率-温度稳定度达到(±0.45)×10-6,相位噪声为-135 dBc/Hz@1 kHz,芯片面积为2 782 μm×2 432 μm.     

霍尔传感器芯片灵敏度调整电路

通过在霍尔传感器芯片上集成双向灵敏度调整电路,对芯片磁场灵敏度进行修调,提高产品良率,并可通过调整传感器的灵敏度,产品调整至目标磁场灵敏度,可有效的针对目标客户。     

一种用于模拟电路测试与修调的方法

针对模拟电路中一些基准量的测试与修调,本文提出了一种通过管脚复用技术和单多晶的EEPROM相结合的方法对模拟电路中的基准电压进行了测试与修调,然后通过仿真验证了该方法实现的电路功能。     

一种基于标准工艺的熔丝修调电路设计

为了减小芯片生产过程对集成电路的影响,使生产芯片参数符合设计要求,分析现有修调技术特点,提出了一种基于标准工艺的金属熔丝修调电路,并成功应用到一个开关电源芯片中。其结构简单,成本低,可在标准工艺线上实现;在节约电路版图面积的同时,减小了电路的功耗。基于TSMC 0.5μm BCD工艺,通过Hspice仿真工具验证了电路功能的正确性,并完成电路版图设计,满足修调要求。     

一种用于TCOCXO的数据修调电路

采用VIS 0.15 pm BCD工艺设计了一款应用于温度补偿恒温晶体振荡器(TCOCXO)专用集成电路(ASIC)的数据修调电路.该数据修调电路由逻辑控制电路和一种电可擦可编程只读存储器(EEPROM)构成,主要功能是完成TCOCXO ASIC中温度补偿的控制及实现芯片的多模式工作.与通过模拟函数发生器实现的补偿方式相比,使用该数据修调电路实现的温度补偿方法可以实现更高的补偿精度和更小的芯片面积.通过该电路对TCOCXO ASIC进行调试与配置,搭载该ASIC的晶体振荡器在温度为-40～85℃时频率-温度稳定度可达±5×10-9.TCOCXO ASIC的测试结果表明,这种修调方法在减小芯片面积的同时可以实现更高精度的频率-温度补偿.     

熔丝类电路的修调探索

随着熔丝在电路设计中的应用普及,测试环节对熔丝修调的要求也越来越高,对测试人员提出了更大挑战。修调熔丝的目的是为了获得更精确的电压或者频率,按照制造材料和工艺可分为金属和多晶硅两种类型。不同的工艺结构决定了不同电路的熔丝有不同的特性,修调时需要针对具体电路具体分析,选择适宜的修调方案,并且编写简洁高效的修调程序。文章介绍了常见熔丝的特性,总结几种常用的修调熔丝方法,并分析了这些方法的各自特点,同时对修调熔丝的程序算法做了探讨。     

Precision electrical trimming of very low TCR poly-SiGe resistors

Precision electrical trimming of stacked Si/SiGe polycrystalline resistors available from the extrinsic base structure of a SiGe BiCMOS technology has been demonstrated for the first time. It is shown that pulse current trimming techniques can be used to trim the poly-SiGe resistors by up to 50% from their original values with accuracy better than ±0.5%. The temperature coefficient of resistance (TCR) is shown to be linearly proportional to the percent change in electrically trimmed poly-SiGe resistance. Finally, we demonstrate resistance cycling using an electrical trim/recovery sequence, indicating that the technique is reversible and is governed by dopant segregation/diffusion mechanisms. The results are consistent with those obtained on conventional polysilicon resistors suggesting that the introduction of a strained SiGe layer does not adversely affect the electrical trim properties of these resistors     

An approach to ensure stability of precision laser trimmed thick film resistors

In view of its complete automation, very high throughput, least in process variation, etc., laser trimming has been an industry standard in thick film technology. Random variations in print thickness, uncertainty of sheet resistivity in a paste lot and other process variations in a production line make it difficult to ensure a reasonably good yield for high precision resistors, where the tolerances under consideration are of the order of ±0.30%. Special attention has to be given to the resistor configuration type of laser cut and post trim processing. The studies were performed on samples drawn from a regular production line which contained two resistor—one with AR (L/W) > 1 where an L cut/Vernier cut combination was used for trimming and the other with AR < 1 where a P cut/Vernier cut combination was used. The post trim resistors' performance was studied under two conditions—one at room temperature and the other after baking at 150°C for 100hr and then maintained at room temperature. These studies lead to the conclusion that for high precision resistors the resistors should be so designed that the L cut/Vernier cut combination can be adopted for trimming. Secondly the trimmed resistor should be stored at 150°C for a period of 100 hr to make the post trim behaviour more predictable and also to achieve better yield.     

The influence of Er-doped fiber source under irradiation on fiber optic gyro

The relationship between the parameters of Er-doped fiber source (EDFS) and the performance of fiber optic gyro (FOG) is analyzed in theory firstly. Then, the irradiation resistance characterizations of FOG using EDFS with and without spectrum trimming are compared. Through the theory analysis and experimental research, it is confirmed that the mean wavelength of the EDFS with spectrum trimming varies less than the EDFS without spectrum trimming under irradiation, and the FOG used EDFS with spectrum trimming have more stable performance under irradiation. Therefore, to trim EDFS’s spectrum into a Gaussian-like spectrum is an effective manner to suppress the irradiation influence on FOG.     

多管芯并行测试的熔丝修调方法探索

随着熔丝在电路设计中的应用普及,测试环节对熔丝修调的要求也越来越高,对测试人员提出了更大挑战。修调熔丝的目的是为了获得更精确的电压、频率或其他特性。为了提高测试效率,需要在多管芯并行测试的情况下,提高熔丝修调的准确性和修调速度。文章介绍了常见的熔丝特性及典型熔丝类集成电路在多管芯并行测试情况下的熔丝修调方法,并进一步研究了降低修调环节对测试系统资源的占用、提高修调效率、简化测试程序等几个方面的优化方法。     

New trim configurations for laser trimmed thick-film resistors—theoretical analysis, numerical simulation and experimental verification

In this paper a new approach to laser trimming is investigated and compared with traditional trimming. It relies on creating an additional contact for lowering resistance values thus simplifying the design and widening resistance trimming ranges. This enables to achieve a correction with shorter cut length of, so it can lead to a faster and cheaper fabrication process of hybrid integrated circuit. This paper analyses trimming range and trimming characteristics computed for different shapes of added contact using a new, very fast and easily programmable method. Moreover the experimental verification of such approach is presented. The relative trimming range and sensitivity are analyzed as a function of additional contact shape and cut length. Next long-term stability, pulse durability and low frequency noise are compared for two- and three-contact resistors versus trim pathway length.     

An assessment of the applicability of embedded resistor trimming and rework

The successful use of embedded resistors in many applications will require that the fabricated resistors be trimmed prior to lamination into printed circuit boards to attain required design tolerances. Depending on the application, the economic value of the board being fabricated, and the process used to create the embedded resistors, it may also be prudent to consider reworking resistors that are incorrectly trimmed or with initial values that are too large (untrimmable resistors). This paper uses a model of the resistor/board yield coupled with a cost model of the trim and rework processes to identify conditions under which applications should neither trim nor rework, trim but not rework, or perform both trimming and rework of embedded resistors, as a function of the design tolerance for the resistors and the accuracy with which the embedded resistors can be fabricated. Example results are presented for several applications ranging from small boards with a high density of embedded resistors to large boards with a low density of embedded resistors. Distinct regions of trimming and rework applicability that are nearly application independent can be identified as a function of design tolerance, printing/plating/etching variation, and the characteristics of the trimming process.     

一种用于温补晶振的EEPROM修调电路设计

设计了一种用于温度补偿晶体振荡器(TCXO)的数字修调电可擦除只读存储器(EEPROM)电路.该电路具有正常工作模式和RAM WRITE、EEPROM WRITE、EEPROM READ三种测试模式,用于TCXO中模拟补偿电压的修调.在SMIC 0.35μm工艺下,采用HSPICE工具对设计的电路进行了仿真与验证,结果表明该电路具有可靠性高和功耗低的优点.     

Pulse current trimming of polysilicon resistors

The practical application of pulse current trimming of polysilicon resistors has been investigated and successfully implemented in large scale integrated circuit production. In-package pulse current trimming of heavily doped polysilicon resistors allows precise control of the final resistor value and can effectively compensate for process variation in polysilicon sheet resistance. The technique requires no additional process complexity, is layout efficient, remarkably accurate, and is quick and inexpensive from a test perspective. Resistance reduction occurring during the trim process is shown to be reversible to a small, but usable, extent for n-type polysilicon. Thermal modeling of the resistor trim process shows that the peak temperature reached within the polysilicon film must exceed the highest temperature encountered during wafer fabrication before any permanent resistance change occurs. As the resistor is further trimmed, the film temperature approaches the melting point of silicon     

Lightly trimming the hybrids

Laser resistor trimming, an effective tool for producing accurate and reliable electrical elements is discussed. Laser trimming has minimum effect on power handling capability; element value variation with time, temperature, and voltage; and electrical noise. The principles of laser trimming, laser types used, trimming techniques, and technology trends are described. Laser cutting of ceramics in such applications as electronic packaging and the use of lasers to pattern thin films are also discussed