使用零电流开关的电容器充电电源

介绍一种为电容器充电面临别设计的电源。这种电源使用了串联谐振拓扑结构，运用了较为成熟的零电流开关技术以及导通时间和开关频率都固定的简单控制方式。实验样机是给一个１．０μＦ的人工线电容充电，从０Ｖ充到５６００Ｖ，约需２．８ｍｓ，充电能量达５６００Ｊ／ｓ。当重复频率为３００Ｈｚ时，平均输出功率为４７００Ｗ。     

开关增益运算放大器作为检相器或混频器

一些运算放大器．比如Analog Devices公司的AD8041和Intersil公司的EL5100,提供禁用引脚．它使人们能把数个运算放大器的输出并联用于视频多路传输。除了这种多路传输以外．人们还能用这种禁用功能把运算放大器配置作为检相器或混频器。图1描绘了禁用功能如何实现低频检相器。人们可以按相位参考信号的速率来开关该电路的放大器的增益。     

半导体光开关工作电流和速率的理论分析

本文从载流子连续性方程出发，采用半导体双异质结概念，从理论上推出了计算半导体光波导开关工作电流和速率的理论公式，为器件选取工作电流和提高开关速率提供了理论依据．     

半导体光开关工作电流和速率的理论分析

本文从载流子连续性方程出发，采用半导体双异质结概念，从理论上推出了计算半导体光波导开关工作电流和速率的理论公式，为器件选取工作电流和提高开关速率提供了理论依据。     

铝电解电容器的低漏电研究与控制

介绍了铝电解电容器漏电流产生的根源,分析了影响漏电流的因素,通过研制工作电解液、选用高品质材料、改进制造工艺来控制铝电解电容器的低漏电。     

数值模拟研究半导体断路开关的电流截断特性

半导体断路开关（SOS）效应的发现,促进了全固态脉冲功率源技术的发展和应用。采用一维流体模型,利用SOS数值模拟程序对SOS二极管P^＋-P-N-N^＋结构的电流截断特性进行了数值模拟研究。研究了SOS二极管P区扩散深度、外电路参数对SOS电流截断特性的影响。结果表明：P区扩散深度、次级储能电容C2、反向泵浦电感L^-的大小对SOS的反向电流截断时间均有较大影响;随着次级储能电容和反向泵浦电感的增大,电流截断时间增大,反向电流峰值和反向电压峰值减小。该研究对SOS二极管工艺设计和外电路优化设计具有理论意义和实用价值。     

钽电解电容器生产工艺和漏电流分析

钽电解电容器在电子元器件中占据着非常重要的地位,钽电容器是电容器中体积小而又能达到较大电容量的产品,最早在1956年由美国贝尔实验室首先研制成功的,它的性能稳定,可靠性优异,在将尽一个世纪以来没有哪种电容器通过完全替代钽电解电容器,钽电容器封装形式多种多样,体积尺寸设计多样化,其所具备的稳定性高、容量大、小型方便、高性能以及较强的自愈能力等优势使钽电容器不仅广泛在军事通讯,航空航天等领域应用,而且还在向工业控制,影视设备、通讯仪表、手机、电脑、飞机、工业控制电子线路或者火箭雷达等领域扩展,覆盖范围非常广,其地位和重要性在电子电路中可圈可点。文章主要针对钽电解电容器关键生产工艺流程以及漏电流情况做了简单阐述,希望能进一步提高钽电解电容器的生产制造水平。     

用带有半导体开关的塞纳克干涉仪转换全光波长和脉宽

提出用带有半导体光学放大器的塞纳克干涉仪开关对全光波长和脉宽变换，这种开关结构简单，开关速度不受半导体载流子恢复时间限制。输入数据的脉宽1．5ps被变换成24-18．1ps。在1539nm输入数据波长变换为可调谐波长，带宽为15nm(1550—1565nm)。     

改进的光耦电路可降低LED电流并防止老化

光耦似乎能在不同地电势工作的电路之间实现简单的直流隔离．但这只是表面现象。光耦会从被隔离电路上吸取电能．转换相对缓慢,并且具有LED老化的不确定性。现在有一些不用光耦的替代品．如Analog Devices公司的ADUM 12xx或德州仪器公司的ISO72x。本设计实例将描述一种光耦的简单改进方法。     

基于漏电保护开关的几点探讨

随着我国经济的不断发展,我国工业生产以及居民用电不断增加,漏电保护已经成为了人们最为重视的问题之一.国家对于用电安全方面已经制定了有关强制性方面的要求,在很多地方都要安装漏电保护开关,这对于避免漏电造成火灾以及防止人身触电都具有非常重要的作用,所以要充分重视智能漏电保护开关的研究.本文主要探讨了有关智能漏电保护开关的相关问题,希望能够对相关人士有所帮助.     

Simple implementation of sampled-data filters using current multipliers, switches and capacitors

An approach is discussed for a simple implementation of sampled-data filters. The implementation uses m.o.s. current multipliers, switches and capacitors and is useful for the design of integrated m.o.s. analogue filters. Compared with other approaches, the filters designed with this method require smaller area, use no operational amplifiers and have no consumption of d.c. static power. An example is presented showing good agreement between experimental and theoretical results.     

表面层型半导体陶瓷电容器

对表面层型半导体陶瓷电容器的基本结构原理、关键生产技术、关键设计参数、关键生产设备以及电容器规格和典型特性作了简要介绍。     

Characterization of leakage currents in long-lifetime capacitors

The purpose of this paper is to present a new procedure that yields the material parameters characterizing leakage currents in MOS devices (generation lifetime in the depletion region τg, recombination lifetime in the bulk τr, interfacial generation velocity S) by means of the linear-sweep technique at different temperatures and at different depths of the depletion region. This characterization method is applied to long-lifetime MOS capacitors for which different contributions to the leakage current (generation in the depletion region, diffusion from the neutral bulk and interfacial generation) are of the same order of magnitude.     

Recovery of high-field GaAs photoconductive semiconductor switches

Three categories of circuits were explored to induce fast recovery, after lock-on by temporarily reducing the field across the switch. Measurements of recovery times from 35 to 80 ns, multiple monopolar and bipolar bursts at 5-40 MHz, and hold-off fields ranging from 5-44 kV/cm (corresponding to 15-66 kV across individual switches) are presented. A comparison is made of the different circuits used to induce recovery from lock-on, and the various factors that influence the recovery are discussed     

Mechanism of stress-induced leakage current in MOS capacitors

Stress-induced leakage current (SILC) is examined both below and above the voltage at which the preexisting Fowler-Nordheim tunneling current dominates. Based on these results, it is argued that SILC is the result of inelastic rather than elastic trap-assisted tunneling. This clarification explains the well-known thickness dependence of the SILC at low fields that has identified it as a scaling limitation for nonvolatile memory tunnel oxide. It also explains a newly observed different thickness dependence at high fields and facilitates modeling of the electric field/voltage and trap density dependencies of the SILC     

Optical drive requirements for laser-activated semiconductor switches

Laser-activated semiconductor switch (LASS) devices of the thyristor type exhibit three regimes of operation. At low optical drive, optical triggering is obtained with delay time before conduction and relatively low current rise rates. At intermediate drive levels, fast switching is obtained with no appreciable delay time and fast current rise rates (greater than 10⁹A/s) but with substantial power lost in the switch element. At higher optical drives, saturated switching is observed with the rise rate and power loss relatively independent of the optical drive level. LASS thyristors of 1- and 4-kV operating voltage ratings have been characterized in the lossy fast switching regime. For pulses of 100-ns duration, the devices act as resistive elements. The magnitude of the resistance varies inversely with the optical drive, and can be understood as conductivity modulation of the conduction path by the photogenerated carriers. Such characterization allows switch system design tradeoff between the required optical drive level and the tolerable power loss in the switch elements.     

Pre-threshold conductance and polarization effects in amorphous semiconductor switches

It is shown that the conductance and threshold parameters of threshold switches depend on the manner in which switching systems are addressed. Slow voltage ramps lead to internal polarization; fast square pulses do not. The polarization processes influence all switching operations performed sequentially; their room-temperature relaxation time is of the order of several milliseconds. The observations are interpreted on the basis of a space charge model involving injected carriers, subsequently trapped.     

利用半导体pn结结电容构成的沟道式电容器

为满足对电子系统中元器件性能提升、面积减小、成本降低等需求,利用感应耦合等离子体刻蚀技术(ICP),对低阻p型硅采用刻蚀、扩散、磁控溅射Al电极等工艺,使之形成凹槽状三维结构,制造出一种特殊的具有高密度电容量的硅基电容器。其特点是结构简单,电容量大(电容密度可达2.2×10–9F/mm2),容值可调,与现有微电子工艺兼容,可用于200MHz至数GHz的退耦或其他场合。同时由于半导体pn结固有的特性,该电容器可取代传统的贴片电容广泛用于电子系统中的退耦、滤波、匹配、静电和电涌防护等场合。     

Gain optimization in switches based on semiconductor opticalamplifiers

The distribution of unsaturated gains that minimizes the noise figure of a three-stage optical switch based on semiconductor-optical-amplifier (SOA) gates is found. Gain saturation under both unidirectional (isolators inserted) and bidirectional (no isolators) propagation of spontaneous emission noise is analyzed, and a noise figure penalty associated with the absence of isolators is determined. Determination of the optimal set of pump currents is a nonlinear optimization problem, while determination of the optimum set of saturated gains is a linear optimization problem. The latter solution is found analytically, while the former solution requires a nonlinear optimization approach. The results are extended to the case of a sequence of N SOA's