Hardware implementation of a differential QAM modem

A QAM modem based on certain modifications of the CCITT Recommendation V.29, is presented. A predominantly digital implementation without the use of DSP devices is given. Although the implementation is for telephone bandwidth the idea can be expanded to achieve higher rates. In this design approach the modulation is based on ROM-stored symbols while the demodulation is based on a symbol-by-symbol determination for the recovery of the original information bits. Specifically, the paper refers to a D16QAM design. Most of the stages are digital, a feature that simplifies the VLSI implementation. The synchronisation (timing recovery) is based on a modified phase locked loop     

Time synchronisation without specific symbols for OFDM

A time synchronisation method without specific symbols for an orthogonal frequency division multiplexing (OFDM) system is investigated. The coarse time synchronisation and the fine time synchronisation algorithms are described. The problem of the time synchronisation of a coded OFDM terrestrial digital video broadcasting receiver in the presence of long echoes and pre-echoes is then analysed and worked out by an optimum use of both algorithms, which prove complementary     

Enhanced trellis extracted synchronisation for block codes usinginterleavers

Previously, trellis extracted synchronisation techniques (TEST) have been presented as a purely digital method of providing bit/symbol and word synchronisation for block codes using auxiliary data obtained through trellis decoding. One of the factors affecting the complexity of the algorithm has been that any cyclic properties within the code must be countered by building confidence in a particular synchronisation point. This problem is further exasperated by a long sequence of the all-zeros (or all-ones) codeword, which presents all cyclic shifts as valid codewords. The novel algorithm presented in this Letter uses an interleaver with an inversion to overcome these two problems and significantly reduce the complexity without reducing performance     

HF信道块式数据检测技术的研究

本文研究了一种适用于ＨＦＭＯＤＥＭ的短块式数据检测技术，该技术中使用已知的训练符号对信道特性进行跟踪并对未知数据进行检测，采用判决反馈的形式，可以减小数据块长度，进而采用一种简化的Ｃｈｏｌｅｓｋｙ矩阵分解的算法，计算机模拟表明；该方案能有效地消除高频信道上的码间串扰，适用于高速串行ＨＦＭＯＤＥＭ。     

PDA在短波数据通信上的应用

传统的短波信道上的数据传输系统是通过短波调制解调器和PC终端实现的,而PDA(个人数字助理)凭借其良好的便携性,低廉的价格能够为短波数据通信系统提供一种良好的补充方案。作者介绍了如何在PDA上开发短波数据传输软件。     

CHIRP调制解调器的软判译码和信道误码率的CHIRP估值分析

介绍了ＣＨＩＲＰ调制解调器的特点,对ＣＨＩＲＰ调解器采用的ＧＯＬＡＹ（２４,１２）码的软判译码方法进行了讨论,提出了一套快速灵活的软判译码综合优化方案,对方案的编码增益进行了测试,结合短波信道的误码率估值值技术,利用软判译码器的输出实现了对误码率参数快速、准确的估计。     

A single-chip frequency-shift keyed modem implemented using digital signal processing

A single-chip modem that uses digital signal processing (DSP) to perform the modem functions is described. The DSP modem is a complete single-chip modem which handles all of the popular international standards for frequency-shift keyed modems. These specifications include the Bell 103 and 202 specifications for North America, and the CCITT V.21 and V.23 specifications in Europe. The authors describe modem system aspects, the architecture and philosophy underlying the design of this modem, and some of the special features that are incorporated into the modem through the use of digital signal processing.     

短波窄带OFDM调制解调器设计与实现

在技术和参数上设计实现了应急通信系统中短波窄带正交频分复用(Orthogonal Frequency DivisionMultiplexing,OFDM)调制解调器。依据短波多径信道传输特性和应急通信分组突发传输的特点,研究了适合系统传输的延时相关帧检测、载波频率同步、符号定时同步和信道估计等算法。在3 kHz话音带宽上按照系统速率要求研究设计了短波OFDM调制解调技术参数和技术方案,分析了接收信号帧检测和符号定时同步响应,仿真实现了多径信道下短波窄带数据的高速传输。     

Multidimensional frame synchronisation strategy for4D-Q2 PSK

A novel multidimensional double complex correlation frame synchronisation strategy is proposed for the four-dimensional quadrature-quadrature phase-shift keying modulation technique. The synchronisation method is intended for application in high speed spectrally efficient burst mode mobile digital communications     

Programmable implementations of xDSL transceiver systems

After a background on digital subscriber line (DSL) technology, this article evaluates the trade-offs between programmable and custom implementations of communications products with an emphasis on xDSL modems. These trade-offs include time to market, risk, flexibility, power consumption, and cost. A key issue is the processing power required to implement the modem. The article takes a detailed look at the processing power required to implement an ADSL or VDSL modem on a programmable platform. It is demonstrated that today's digital signal processors meet the processing power requirements for an ADSL modem, and it is estimated that the processing requirements of a VDSL modem will be met in the near future     

基于分形特征的高频雷达目标检测技术

在现代化战争中,高频雷达起着越来越重要的作用,同时由于各种强杂波的干扰,对高频雷达目标(小目标)的检测需要寻找更好的算法.针对传统相干积累算法对高频雷达舰船目标检测的不足,文中提出了一种基于分形特征的高频雷达目标检测的新方法,利用合维数法计算分形维数,给出了自适应检测门限.在实测数据基础上对分形算法进行验证,实验结果表...     

基于Watterson模型的短波信道实时软件模拟

针对短波信道多径、衰落、多普勒频移及扩展等特点，设计了一种基于Watterson模型的短波信道模拟器，该模拟器采用全软件实现，具有简单易行、可移植性强、费用低等优点，并可实时嵌入到调制解调器中。通过对仿真中关键技术进行改进，提高了系统性能。仿真结果验证了该模拟器的有效性。     

Synchronisation in data networks

Synchronisation is of fundamental importance to the performance of digital networks, but the effects of poor network timing on the information being transported are often largely ignored. This paper provides an introduction to the subject of synchronisation, discusses the current BT network synchronisation arrangements and describes the platform being deployed to address both the current network requirements and the needs of future telecommunications technologies.     

短波宽带自适应跳频波形体制与性能分析

传统3 kHz短波窄带通信难以实现高速通信.采用适当扩展信号带宽和多种无线通信技术,提出了一种新型的短波宽带波形体制—短波宽带自适应跳频通信体制,并介绍了系统原理和功能技术指标.实际的天波和海面波信道试验表明：短波宽带自适应跳频波形技术体制性能指标优于传统短波波形体制,实现了短波宽带高速数据传输,是我国现代短波通信新技术体制研究的一种有益探索.     

Use of error patterns in coded communication systems

In digital communication systems, receivers often have trouble in deriving the correct bit synchronisation from transitionless received signals. The letter shows that transitionless signals can come from four sources, and that this problem can be easily eliminated by injecting a detectable error pattern into the transmitted coded signal.     

Digital outside-broadcasting-link using OFDM modulation scheme

A study on digital broadcasting systems has been conducted for the multimedia era. Regarding program production, a digital outside-broadcasting-link (OBL), in particular, from mobile source is required to gather digital video and audio sources in severe multipath environments. The orthogonal frequency division multiplexing (OFDM) modulation scheme is robust under multipath fading conditions. A digital OFDM modem for OBL in the 800 MHz band has been developed to enable stable transmission of digital sources from moving vehicles. In the experimental OFDM-OBL, the compressed digital video and audio data are distributed to 572 carriers in the 9 MHz bandwidth, using differential quadrature phase shift keying (DQPSK) modulation for each carrier. In computer simulation and indoor/outdoor experiments, it is confirmed that digital OFDM-OBL can stably transmit signals, even under severe multipath fading conditions, while pictures transmitted with conventional FM-OBL are seriously degraded. This paper describes the features of the OFDM modem for the digital OBL which transmits program sources from moving vehicles, and also discusses aspects of gathering digital program sources     

一种新型数字化中频调制解调器设计

对新型调制解调器的总体设计进行了简要介绍,对比了零中频方案及数字化中频方案的优缺点。对数字化中频调制解调器设计方案需要重点解决问题进行了分析。详细论述了新设计中采用的关键技术及实现方法。对调制解调器性能进行了测试,结果表明误码率性能满足设计要求,体积及重量大幅降低,可有效满足便携站等小型化应用的需求。     

Implementation of secure digital communication by hyperchaoticsynchronisation

By active-passive-decomposition synchronisation, the application of the one-way coupled ring map lattice hyperchaotic system in secure digital speech communication is demonstrated. Synchronisation guarantees strong security and recovery without error     

Dual-loop DLL-based clock synchroniser

A clock synchronisation scheme based on a newly proposed dual-loop delay locked loop (DLL) is presented. The proposed scheme incorporates analogue and digital DLLs to align phases of two different frequency clocks. Simulation results show that the internal clock can be synchronised to the reference clock by tracking the dual feedback loop. The whole circuit design was implemented using 0.35 μm CMOS technology. Power dissipation is ~42 mW with a single 3.3 V supply     

Fast word synchronisation for digital pulse-position modulation

A new word synchronisation method for digital pulse-position modulation is proposed which allows faster frame acquisition. Application is intended in high-speed wireless optical communications