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1.
Abstract— This study proposes the iterative Simulation‐Based Release (ISR) policy for color‐filter (CF) fabs based on iterative simulation. In the studied CF fabs, multi‐domain vertical‐alignment (MVA) equipment has the capability and flexibility to provide additional production capacity of black‐matrix (BM) and red, green, and blue (RGB) layers. Fab throughput can be increased by setting up MVA equipment to process BM and RGB layers when its available production capacity is larger than the scheduled manufacturing target. An AutoMod simulation model was developed and validated based on a real CF fab in Taiwan. A heuristic lot release plan was developed and used as the input of simulation. A better release plan can be developed by taking advantage of the MVA's line idle periods over the planning horizon generated from simulation and releasing new lots to the MVA line to increase its throughput. Release plans can be modified iteratively when the simulation results of the previous release plans show sufficient idle periods for the MVA line operation. The case study demonstrated that the proposed ISR is effective in idle‐time reduction (more than 60%) and throughput improvement (more than 2% in following months).  相似文献   

2.
This paper presents a capacity planning system (CPS) to generate a feasible production schedule, improve production efficiency, and avoid overcapacity for the packaging industry. CPS applies the concept of workload leveling and finite capacity planning to assign orders to production lines by considering several production characteristics such as drying time, quantity splitting owing to the cutting pattern of the product type, and the variability of machine capacity threshold. CPS consists of five modules, namely, order treatment module (OTM), order priority module (OPM), lot release module (LRM), workload accumulation module (WAM), and workload balance module (WBM). The experimental design is used to evaluate the effectiveness and efficiency of the proposed CPS with five factors (number of orders, order size, order size variance, order priority, and balance policy) with various levels and three response variables, namely, machine workload balance, order due date deviation, and lateness. Moreover, this result extends into finding the best settings of order priority and balance policy to generate the best favorable responses under the given three environment factors.  相似文献   

3.
This article presents an overview of the automation systems for a semiconductor fab. In particular, two key systems are presented: 1) a manufacturing execution systems (MES) that formulates manufacturing methods and procedures and 2) a cell controller (C/C) that serves as the automation link between the upper MES and the lower equipment within a production tunnel. At the end of the article, lot operation of one manufacturing step is detailed to highlight the interaction between MES and C/C in a fully automated semiconductor fab. The C/C, in contrast, are to respond to equipment requests for processing, to coordinate intrabay or interbay lot transportation, and to keep the MES the most updated WIP information within a production channel. This overview presents the most essential automation functions needed in general semiconductor fabs. Yet, in terms of future technology trends, reported work on specification, design methods, and implementation platforms has taken advantage of the latest development of computer technology in general, and object-oriented technology in particular.  相似文献   

4.
Compound priority dispatching (CPD) is a new dispatching strategy for semiconductor wafer fabrication. It takes into account both work-in-progress (WIP) management and wafer start control. The compound priority of wafers is calculated based upon fab wafer start status, the current processing step, and the amount of WIP in the current, the upstream, and the downstream steps. Simulation results demonstrate that, for a given fab model, CPD can reduce the mean total queue time (MTQT) by 50% and increase the throughput rate by 20% compared with first- in-first-out (FIFO) and shortest remaining processing time (SRPT) scheduling (dispatching) strategies.  相似文献   

5.
Big data analytics is playing a more and more prominent role in the manufacturing industry as corporations attempt to utilize vast amounts of data to optimize the operation of plants and factories to gain a competitive advantage. Since the advent of Industry 4.0, also known as smart manufacturing, big data analytics, combined with expert domain knowledge, is facilitating ever-greater levels of speed and automaticity in manufacturing processes. The semiconductor industry is a fundamental driver of this transformation; moreover, due to the highly complex and energy-consuming nature of the semiconductor manufacturing process, semiconductor fabrication facilities (fabs) can also benefit greatly from incorporating big data analytics to improve production and energy efficiency. This paper developed a big data analytics framework, along with an empirical study conducted in collaboration with a semiconductor manufacturer in Taiwan, to optimize the energy efficiency of chiller systems in semiconductor fabs. Chiller systems are one of the most energy-consuming systems within a typical modern fab. The developed big data analytics framework allows production managers to ensure that chiller systems operate at an optimized level of energy efficiency under dynamically changing conditions, while fulfilling the chilling demands. Compared to the commonly-used heuristics previously employed at the fab to tune chiller system parameters, by the utilization of big data analytics, it is shown that fabs can achieve substantial energy savings, greater than 12%. The developed framework and the lessons learned from the empirical study are not only generalizable but also useful for practitioners who are interested in applying big data analytics to optimize the performance of other equipment systems in fabs.  相似文献   

6.
Array manufacturing in thin film transistor-liquid crystal display (TFT-LCD) production network is characterized as a capital-intensive and capacity-constrained production system with re-entrance and batch operations. Effectively using associated machines through optimal capacity planning and order scheduling decisions is a critical issue for array manufacturing. This study develops a capacity planning system (CPS) for TFT-LCD array manufacturing. CPS uses information including master production schedule, order due date, process routing, processing time, and number of machines. In addition, CPS derives the order release time, estimated machine start and finish time, machine allocation, and order completion time to maximize machine workload, improve lateness, and eliminate setup time. This research also develops ant colony optimization (ACO) to seek the optimal order release schedule to maximize a combination of the above objectives. The preliminary experiments are first applied to identify the optimal tuning parameters of the ACO algorithm. Computational experiments are then conducted to evaluate the significance and the robustness of the proposed algorithm compared with other competitive algorithms by full factorial experimental design.  相似文献   

7.
This paper presents a multiple criteria decision approach for trading weekly tool capacity between two semiconductor fabs. Due to the high-cost characteristics of tools, a semiconductor company with multiple fabs (factories) may weekly trade their tool capacities. That is, a lowly utilized workstation in one fab may sell capacity to its highly utilized counterpart in the other fab. Wu and Chang [Wu, M. C., & Chang, W. J. (2007). A short-term capacity trading method for semiconductor fabs with partnership. Expert Systems with Application, 33(2), 476–483] have proposed a method for making weekly trading decisions between two wafer fabs. Compared with no trading, their method could effectively increase the two fabs’ throughput for a longer period such as 8 weeks. However, their trading decision-making is based on a single criterion—number of weekly produced operations, which may still leave a space for improving. We therefore proposed a multiple criteria trading decision approach in order to further increase the two fabs’ throughput. The three decision criteria are: number of operations, number of layers, and number of wafers. This research developed a method to find an optimal weighting vector for the three criteria. The method firstly used NN + GA (neural network + genetic algorithm) to find an optimal trading decision in each week, and then used DOE + RSM (design of experiment + response surface method) to find an optimal weighting vector for a longer period, say 10 weeks. Experiments indicated that the multiple criteria approach indeed outperformed the previous method in terms the fabs’ long-term throughput.  相似文献   

8.
Because of the low equipment utilization during periods of economic recession, managers of wafer fabs are forced to plan equipment shutdowns in order to reduce variable cost and reallocate resources. Unfortunately, few studies have proposed effective solutions for equipment shutdown planning in response to economic downturns. Taking into consideration the product mix, corresponding output target, excessive capacity, production performance impact and the variable cost savings, this paper presents a new mechanism for equipment shutdown planning using a developed integer programming model. The proposed mechanism effectively provides valuable recommendations for the managements of wafer fabs regarding the type and quantity of equipment to shut down.  相似文献   

9.
Economic Efficiency Analysis of Wafer Fabrication   总被引:1,自引:0,他引:1  
Economic efficiency analysis of semiconductor fabrication facilities (fabs) involves tradeoffs among cost, yield, and cycle time. Due to the disparate units involved, direct evaluation and comparison is difficult. This article employs data envelopment analysis (DEA) to determine relative efficiencies among fabs over time on the basis of empirical data, whereby cycle time performance is transformed into monetary value according to an estimated price decline rate. Two alternative DEA models are formulated to evaluate the influence of cycle time and other performance attributes. The results show that cycle time and yield follow increasing returns to scale, just as do cost and resource utilization. Statistical analyses are performed to investigate the DEA results, leading to specific improvement directions and opportunities for relatively inefficient fabs. Note to Practitioners-Speed of manufacturing is an important metric of factory performance, yet it has long been a challenge to integrate its value into overall performance evaluation. However, for many semiconductor products, a predictable rate of decline in selling prices makes it possible to transform time value into monetary value. This study employs a novel method to incorporate a speed metric into economic efficiency evaluation and thereby provide a guideline for improving fab efficiency in manufacturing practice. Furthermore, this study integrates factory productivity and cycle time into a relative efficiency analysis model that jointly evaluates the impact of these two factors in manufacturing performance. In particular, we validate this approach with data from ten leading wafer fabs obtained by the Competitive Semiconductor Manufacturing Program and we discuss managerial implications.  相似文献   

10.
We propose a work-in-process (WIP) estimation flow control method which serves as a countermeasure against the throughput degradation problem caused by the redundant blocking time of conventional flow control. This method is based on a scheduling technique of which the most important features are: 1) breaking down the entire schedule into individual lot schedules; 2) lot scheduling to reduce redundant blocking time; and 3) WIP estimation for contiguous finite buffer scheduling. The method, first, schedules operational lots at each equipment unit in a fabrication line by using our scheduling procedure for contiguous finite buffers to satisfy the limit capacity of the buffers. Next, the method estimates the future WIP at each equipment group based on predetermined schedules for performing operations. Finally, the method improves the operation timings by continuously supplying WIP estimation to the scheduling procedure. In an actual liquid crystal display (LCD) fabrication line simulation, we have confirmed that the proposed WIP estimation method is a promising one from the standpoint of the line throughput which we obtained.  相似文献   

11.
This study presents a look‐ahead release planning approach on the basis of AutoMod simulation model for a sixth‐generation thin film transistor liquid crystal display color filter (CF) fab in north Taiwan. The studied CF fab has two identical lines with the processes of black matrix (BM), color layer [red, green, and blue (RGB)], indium tin oxide, and photo spacer (PS). These two lines share two supporting processes, multi‐domain vertical alignment (MVA) and laboratory (LAB). MVA has the capability and flexibility to provide the functions of RGB and PS, whereas LAB can provide the functions of BM and RGB. The production release planning becomes complex because of the equipment flexibility in supporting each other. An AutoMod simulation model is therefore developed and validated using real data from the fab. The AutoMod simulation model is well representative of the real system with less than 10% difference in throughput in all production stations. Using simulation to look ahead, a production controller can predict potential equipment idleness and make adjustment to better utilize equipment capacity. On the basis of simulation with design of experiments, the proposed simulation‐based look‐ahead release plan is demonstrated to be effective in improving system throughput.  相似文献   

12.
We present an analytical approach for estimating the expected time for an automated material handling system (AMHS) to respond to move requests at loading stations in a vehicle-based, unidirectional, closed-loop AMHS. The expected response times are important for estimating the expected work-in-process (WIP) levels at the loading stations for design purposes, and for evaluating the performance of the AMHS as delayed response can impact the production cycle times. The expected response time approximation is validated by comparing the analytical model to the simulation results using a SEMATECH 300 mm hypothetical fab data set. Note to Practitioners - This paper describes an analytic method for estimating the average time for the AMHS to respond to lots ready for movement in a 300 mm wafer fab. The analysis is based on a large-scale model, requires standard solvers, and provides a very fast and reasonably accurate alternative to high-fidelity simulation. It is intended to support the early stage of fab design/redesign, allowing engineers to examine many different options before committing to the time and expense of simulation.  相似文献   

13.
Serial flow or production lines are modeled as tandem queueing networks and formulated as continuous-time Markov chains to investigate how to maximize throughput or minimize the average work-in-process (WIP) when the total service time and the total number of service phases among the stations are fixed (these are the workload and ‘phaseload’ allocation problems, respectively). This paper examines both the effect of the kind of service time distribution on the optimal workload allocation in order to maximize throughput or minimize the average WIP of perfectly reliable production lines.

The new approach of this work is the differentiation of the number of service phases of the service time distribution which is assumed to be of phase type at all stations of the flow line and the placement of storage space (buffers) between any two successive stations in order to examine the effect of these factors to the form of the optimal workload vector t and the optimal service phase vector ph.  相似文献   


14.
Wafer fabrication is a capital-intensive and highly complex manufacturing process. In the wafer fabrication facility (fab), wafers are grouped as a lot to go through repeated sequences of operations to build circuitry. Lot scheduling is an important task for manufacturers to improve production efficiency and meet customers’ requirements of on-time delivery. In this research we propose a dispatching rule for lot scheduling in wafer fabs, focusing on three due date-based objectives: on-time delivery rate, mean tardiness, and maximum tardiness. Although many dispatching rules have been proposed in the literature, they usually perform well in some objectives and bad in others. Our rule implements good principles in existing rules by means of (1) an urgency function for a single lot, (2) a priority index function considering total urgency of multiple waiting lots, (3) a due date extension procedure for dealing with tardy lots, and (4) a lot filtering procedure for selecting urgent lots. Simulation experiments are conducted using nine data sets of fabs. Six scenarios formed by two levels of load and three levels of due date tightness are tested for each fab. Performance verification of the proposed rule is achieved by comparing with nine benchmark rules. The experimental results show that the proposed rule outperforms the benchmark rules in terms of all concerned objective functions.  相似文献   

15.
In a personalized and various production mode, the production line needs to be updated quickly to meet market demand. The Optimization of production line is taken as the object. To address the coupling problems, such as unreasonable production line layout, unbalanced process capability, inaccurate logistics distribution and unintelligent equipment testing, a method of flexible cellular manufacturing based on digital twin is put forward. Decoupling based on event mechanisms and multi-objective optimization will be used in the design of methods, which will be continuously optimized in the simulation and will eventually be validated. After the implementation of an air conditioner line, the production capacity increased by 58.3 %, the WIP decreased by 77.8 %, the balance rate of the production line increased by 25.2 %, and the per capita production capacity increased by 29.8 %. The number of operators decreased by 28.3 %. The results show that the optimization method of flexible cellular manufacturing based on digital twin has practical value and guiding significance to improve the efficiency of production line.  相似文献   

16.
Aggressive capacity ramp rate of a semiconductor wafer fabrication is vital for the commercial success of the enterprise. Basic requirements are short and stable production cycle times to timely qualify equipment and to provide acceptable yield. Therefore, in the ramp-up environment which is characterized by high variability and uncertainty, an adequate methodology is required to properly manage the conflict of short cycle times and fast throughput increase. This paper presents a methodology to manage cycle time by closely monitoring and limiting the work in process (WIP), by means of the so-called “WIP caps”. Used consequently, this methodology allows the ramp rate to accelerate as soon as the factory performance enables this while keeping cycle times under control.  相似文献   

17.
A single-machine multiproduct manufacturing system with random breakdowns and random repair times is considered. Under a weak capacity condition on the system it is shown that the total work-in-progress (WIP) is a recurrent stochastic process. By replacing the stochastic model by a deterministic one with preventive maintenance activities scheduled on a regular basis or by strengthening the capacity condition, the boundaries of WIP and expected WIP, respectively, over time can be shown  相似文献   

18.
The most critical property exhibited by a heavy-tailed workload distribution (found in many WWW workloads) is that a very small fraction of tasks make up a large fraction of the workload, making the load very difficult to distribute in a distributed system. Load balancing and load sharing are the two predominant load distribution strategies used in such systems. Load sharing generally has better response time than load balancing because the latter can exhibit excessive overheads in selecting servers and partitioning tasks. We therefore further explored the least-loaded-first (LLF) load sharing approach and found two important limitations: (a) LLF does not consider the order of processing, and (b) when it assigns a task, LLF does not consider the processing capacity of servers. The high task size variation that exists in heavy-tailed workloads often causes smaller tasks to be severely delayed by large tasks.This paper proposes a size-based approach, called the least flow-time first (LFF-SIZE), which reduces the delay caused by size variation while maintaining a balanced load in the system. LFF-SIZE takes the relative processing time of a task into account and dynamically assigns a task to the fittest server with a lighter load and higher processing capacity. LFF-SIZE also uses a multi-section queue to separate larger tasks from smaller ones. This arrangement effectively reduces the delay of smaller tasks by larger ones as small tasks are given a higher priority to be processed. The performance results performed on the LFF-SIZE implementation shows a substantial improvement over existing load sharing and static size-based approaches under realistic heavy-tailed workloads.  相似文献   

19.
In this paper, the simulation analysis of an automated material handling system (AMHS) for a photobay in a 300 mm wafer fab was analyzed, considering the effects of the dispatching rules. Discrete-event simulation models were developed in an e-M Plant to study this system. Currently, the combination of the shortest distance with the nearest vehicle (SD_NV) and the first-encounter first-served (FEFS) dispatching rule was used in this system. In order to improve the system performance, a hybrid push/pull (PP) dispatching rule was proposed. The simulation results reveal a substantial improvement of the AMHS performance and reduced the WIP and cycle time as a consequence of implementing a PP dispatching rule.  相似文献   

20.
邱华  聂明军 《计算机工程》2010,36(6):224-226
针对视频会议系统中多点控制单元(MCU)负载均衡问题,提出一种基于Agent的MCU负载均衡方法和一种具有较低MCU级联的组优先负载分配算法。该方法通过负载Agent和负载均衡Agent收集区域内MCU的动态负载信息并执行负载均衡操作,使MCU的负载得到平衡。实验结果证明该方法与FRFA算法相比,传输时延约减少8%。  相似文献   

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