Circuit/device modeling at the quantum level

Quantum mechanical (QM) effects, which manifest when the device dimensions are comparable to the de Broglie wavelength, are becoming common physical phenomena in the current micro-/nano-meter technology era. While most novel devices take advantage of QM effects to achieve fast switching speed, miniature size, and extremely small power consumption, the mainstream CMOS devices (with the exception of EEPROMs) are generally suffering in performance from these effects. Solutions to minimize the adverse effects caused by QM while keeping the downscaling trend (technology feasibility aside) are being sought in the research community and industry-wide. This paper presents a perspective view of modeling approaches to quantum mechanical effects in solid-state devices at the device and circuit simulation levels. Specifically, the macroscopic modeling of silicon devices to include QM corrections in the classical transport framework is discussed. Both device and circuit models will be provided. On the quantum devices, such as the single electron junctions and transistors, the emphasis is placed on the principle of logic circuit operation     

Quantization effects in inversion layers of PMOSFETs on Si (100)substrates

The 2-D hole gas distributions within inversion layers of PMOSFETs have been evaluated by solving the coupled Schrodinger equation and Poisson equation self-consistently based on the effective mass approximation with the light hole and heavy hole subbands taken into account. The threshold voltage shift resulting from the carrier redistribution due to quantization effects is found to be more significant for PMOSFETs than NMOSFETs on (110) Si substrates. For a certain substrate doping concentration the threshold voltage shift from the classical value due to quantization effects is found to be a combination of substrate band bending and oxide potential differences between the classical and the quantum mechanical models     

A simple model for quantum mechanical effects in hole inversionlayers in silicon PMOS devices

The effects of quantization of the inversion layer of MOSFET devices is an area of increasing importance as technology is aggressively scaled below 0.25 μm. Although electron inversion layers have attracted considerable interest, very little work has been reported for holes. This paper describes the implementation and results of a simple, computationally efficient model, appropriate for device simulators, for predicting the effects of hole inversion layer quantization. This model compares very favorably with experimental results and the predictions of a full-band, self-consistent Schrodinger-Poisson solver     

GaAs/AlAs异质谷间转移电子器件动态工作模式的模拟研究

使用量子阱能带混合隧穿共振理论及MonteCarlo模拟方法计算了GaAs／AlAs异质谷间转移电子器件的静态和动态工作特性．发现有源层中的电场及Г、X和L三能谷的电子布居基本上可分为强场立能谷区和弱场耿氏区两部分．控制掺杂接日的浓度能调制这两区域的相对大小，控制两种谷间转移电子效应的相互作用，从而改变器件的静态和动态性能动态模拟给出了器件的新射频工作模式：上能谷电子区的宽度调制和低场耿氏区电场的上下浮动．运用这一工作模式解释了器件的各类新工作特性，并且提出了利用这种量子阶控制极来制作新的异质谷间转移电子三极管的可能性     

Quantum mechanical aspects of transport in nanoelectronics

The authors discuss some of the effects quantum mechanics has on the performance of nanometer-scale devices. At low temperature, the confinement and the coherence of the electronic motion on the scale of the electron wavelength give rise to gross deviations from classical charge transport that describes the resistance found in large conventional devices. The authors examine three examples of the quantum mechanical nature of the resistance of a split-gate MODFET, that are not accounted for in conventional classical models of a FET, and yet may influence device speed, noise performance and device isolation. The authors consider the temperature and electric field ranges where quantum mechanical effects are manifested in the charge transport, and speculate about the conditions in which parasitic quantum mechanical effects might be found in a conventional device     

Study of a 50 nm nMOSFET by ensemble Monte Carlo simulationincluding a new approach to surface roughness and impurity scattering inthe Si inversion layer

A 50 nm nMOSFET has been studied by Ensemble Monte Carlo (EMC) simulation including a novel physical model for the treatment of surface roughness and impurity scattering in the Si inversion layer. In this model, we use a bulk-like phonon and impurity scattering model and surface-roughness scattering in the silicon inversion layer, coupled with the effective/smoothed potential approach to account for space quantization effects. This approach does not require a self-consistent solution of the Schrodinger equation. A thorough account of how these scattering mechanisms affect the transport transient response and steady-state regime in a 50 nm gate-length nMOSFET is given in this paper. A set of I_ds-V_ds curves for the transistor is shown. We find that the smoothing of the potential to account for quantum effects has a strong impact on the electron transport properties, both in transient and steady-state regimes. We also show results for the impact that impurity and surface-roughness scattering mechanisms have on the average velocity of the carriers in the channel and the current flowing through the device. It was found that time-scales as short as 0.1-0.2 ps are enough to reach a steady-state channel electron average velocity     

Theory of the doped quantum well superlattice APD: A new solid-state photomultiplier

A new superlattice avalanche photodiode structure consisting of repeated unit cells formed from a p-i-n Al0.45Ga0.55As region immediately followed by near intrinsic GaAs and Al0.45Ga0.55As layers is examined using an ensemble Monte Carlo calculation. The effects of various device parameters, such as the high-field layer width, GaAs well width, low-field AlGaAs layer width, and applied electric field on the electron and hole ionization coefficients is analyzed. In addition, the fraction of electrons which ionize in a spatially deterministic way, at the same place in each stage of the device, is determined. As is well known, completely noiseless amplification can be achieved if each electron ionizes in each stage of the device at precisely the same location while no holes ionize anywhere within the device. A comparison is made between the doped quantum well device and other existing superlattice APD's such as the quantum well and staircase APD's. It is seen that the doped quantum well device most nearly approximates photomultiplier-like behavior when applied to the GaAs/AlGaAs material system amongst the three devices. In addition, it is determined that none of the devices, when made from GaAs and AlGaAs, fully mimic ideal photomultiplier-like performance. As the fraction of electron ionizations per stage of the device is increased, through variations in the device geometry and applied electric field, the hole ionization rate invariably increases. It is expected that ideal performance can be more closely achieved in a material system in which the conduction band edge discontinuity is a greater fraction of the band gap energy in the narrow-band gap semiconductor.     

量子点发光器件的制备与仿真分析

为研究量子点发光器件结构与性能的关系,制备了以CdSe/ZnS量子点作为发光层、poly-TPD作为空穴传输层,Alq3作为电子传输层的量子点发光二极管,对器件结构及性能参数进行了表征,结果显示器件具有开启电压低、色纯度高等特点.结合测试数据,对量子点发光二极管进行了器件结构建模,利用隧穿模型及空间电荷限制电流模型对实验结果进行了分析,研究了器件中载流子的注入与传输机理.器件测试与仿真结果表明:各功能层厚度会影响载流子在量子点层的注入平衡,同时器件中载流子的注入与传输存在一转变电压,当外加电压低于转变电压时,器件中载流子的注入主要符合隧穿模型;当外加电压高于转变电压时,器件中载流子的注入主要符合空间电荷限制电流模型.研究结果验证了器件结构建模的合理性,可以利用仿真的方法进行器件结构优化并确定相关参数,这对器件性能的提高具有指导意义.     

Quantum coupling effects on charging dynamics of nanocrystalline memory devices

A model is proposed to account for the impacts of the quantum coupling between the longitudinal and transverse components of the channel electron motion on the charging dynamics of memory devices. The calculations demonstrate that the quantum coupling effects on the charging dynamics of Ge NC (germanium nanocrystalline) memory devices cannot be neglected for high temperature and drift velocity of the channel electrons higher than the thermal velocity. The calculations also show that the charging current of Ge NC memory devices strongly depends on the temperature, drift velocity and effective electron mass of the tunneling oxide layer. The reduction in the barrier height caused by the quantum coupling is its origin. The sensitivity of the effective electron mass of the tunneling oxide layer on the charging current of Ge NC memory devices is a potential method to improve the performance of device.     

Electron and hole quantization and their impact on deep submicronsilicon p- and n-MOSFET characteristics

A first-principles approach to inversion layer quantization, valid for arbitrarily complex band structures, has been developed. This has allowed, for the first time, hole quantization and its effects on p-MOSFET device characteristics to be studied. In addition, electron quantization effects are revisited, improving on previous, simpler approaches. In particular, the impact of quantization on the threshold voltages and “effective” gate oxide thicknesses of p- and n-MOSFETs is investigated. A simple compact model is provided to quantitatively describe the threshold voltage shifts at 300 K as a function of the doping concentration and the oxide thickness. The significance of hole quantization for buried channel p-MOS structures is also studied. The results can be used to both identify and model these effects using popular device simulators     

Insights into charge balance and its limitations in simplified phosphorescent organic light-emitting devices

Simplified phosphorescent organic light-emitting device (PHOLED), which utilizes only two organic layers, showed record-high efficiency when first introduced. It is quite surprising that this device can have such high efficiency without the use of complex carrier and exciton confinement layers that are common in the state-of-the-art PHOLEDs nowadays. Therefore, it is important to understand how good charge balance is in simplified PHOLED and why. In this work, we study the effects of altering charge balance in simplified PHOLED through means of changing layer thickness in the hole transport layer (HTL) and electron transport layer (ETL) as well as intentionally doping hole and electron traps in the HTL and ETL, respectively, on device efficiency. The results show that when using high carrier mobility charge transport materials, changing layer thickness does not impact charge balance appreciably. On the other hand, introducing charge traps in a thin layer within the HTL or ETL can, in comparison, influence charge balance more significantly, and proves to be a more effective approach for studying the factors limiting charge balance in these devices. The results reveal that simplified PHOLEDs are generally hole-rich, and that the leakage of electrons to the counter electrode is also a major mechanism behind the poor charge balance and efficiency loss in these devices. In order to optimize charge balance in simplified PHOLED, it is important to reduce hole transport in the device so that e-h ratio can be brought closer to unity, as well as eliminate electron leakage. Finally, we show that by simply using an electron blocking HTL, the efficiency of the device can be enhanced by as much as 25%, representing the highest reported for simplified PHOLEDs.     

An analysis of the kink phenomena in InAlAs/InGaAs HEMT's usingtwo-dimensional device simulation

Kink phenomena in InAlAs/InGaAs HEMTs are investigated using a two-dimensional (2-D) device simulation that takes into account impact ionization, including nonlocal field effects, and the surface states in a side-etched region at the gate periphery. The simulation model enables us to represent the kink, and it is found that the accumulation of holes generated by the impact ionization has the channel electron density in the side-etched region increase at the bias point where kink appears. When the electron density in the side-etched region is small, the hole accumulation causes a significant increase in that electron density, resulting in a large kink. The simulation results suggest a model in which the kink is described in terms of the modification of the parasitic source resistance induced by the hole accumulation. This model implies a way to eliminate the kink, that is, keeping the electron density in the side-etched region high     

Boosting the performance of solution-processed quantum dots light-emitting diodes by a hybrid emissive layer via doping small molecule hole transport materials into quantum dots

Solution-processed colloidal quantum dot light-emitting diodes (QLED) have attracted many attentions with significant progress in recent years. However, QLED devices still face some challenges. The energy barrier between Cd-base quantum dots (QDs) and commonly used hole transport materials is larger than that between QDs and electron transport materials, which leads to the imbalance of carriers in the light emitting layer (EML) and the low performance of QLED devices. Herein, we report a simple strategy to improve the device performance by doping small molecule transport material 4,4′-cyclohexylidenebis[N,N-bis(p-tolyl)aniline] (TAPC) into red CdSe/ZnS QDs. The optimized red QLED devices with TAPC-doped emissive layer at a ratio of 3.2 wt% achieve 20.0 cd/A of maximum current efficiency, 16.6 lm/W of power efficiency and 15.7% of external quantum efficiency, which is 30%, 58% and 33% higher than the control device. The improved performance of devices can be ascribed to the increase of hole current density, decrease of leakage electrons and more balanced quantity of carriers in EML. This work put forward a viewpoint to improve the performance of QLED devices via doping high hole mobility materials into emission layer.     

Approaching Optimal Characteristics of 10-nm High-Performance Devices: A Quantum Transport Simulation Study of Si FinFET

We utilized a fully self-consistent quantum mechanical simulator based on the contact block reduction (CBR) method to optimize a 10 nm FinFET device and meet the International Technology Roadmap for Semiconductors (ITRS) projections for double-gate high-performance logic technology devices. We found that the device ON-current approaching the value projected by the ITRS can be obtained using a conventional unstrained Si channel and a SiO₂ gate insulator. We also performed a detailed analysis of the gate leakage under different bias conditions. Our simulation results show that the quantum mechanical effects significantly enhance the intrinsic switching speed of the device. In our simulations, quantum confinement in both the gates and the channel has been taken into account self-consistently. The obtained theoretical value of the intrinsic switching speed for the considered FinFET device exceeds the ITRS-projected value.     

Temperature dependence of electroluminescence in a tris-(8-hydroxy)quinoline aluminum (Alq3) light emitting diode

Organic electroluminescent devices using tris-(8-hydroxy) quinoline aluminum (Alq₃) as the emissive layer and N,N'-diphenyl-N,N' bis (3-methylphenyl)-[1-1'-biphenyl]-4-4'-diamine as the conventional hole transport layer have been fabricated. The temperature- and field-dependent quantum efficiency have been investigated over the temperature range from 1 to 300 K using a model developed by Shen et al. to explore the physics at the organic heterointerface in the present device structure with the formation of an accumulation layer. It has been observed that electron luminescence intensity decreases with decreasing temperature down to 160 K, then saturates in the low-temperature region. The quantum efficiency increases with decreasing temperature and finally reaches an almost constant value. From the analysis, it is seen that the model can explain the luminescence behavior of the device satisfactorily down to 120 K but fails to explain the low-temperature behavior. The efficiency has also been studied with voltage and it is seen that there is an optimum voltage required to get the maximum efficiency     

量子点电致发光器件发光层能级变化与驱动电压的关系研究

以量子点电致发光器件(QLED)中能级分布和载流子浓度的关系为理论基础,研究了QLED发光层能级变化与驱动电压的关系,建立了数学模型.以CdSe/ZnS核壳结构量子点为发光层,计算了器件正常发光时的阈值电压,分析了电流密度与量子点中电子准费米能级与空穴准费米能级之差的关系.结果表明,当驱动电压大于9.8V时,CdSe/ZnS中电子的准费米能级与空穴的准费米能级之差大于1.03 eV,量子点电致发光器件正常发光;理论模型证实由于电子在发光层与电子传输层界面的大量积聚,导致淬灭发生,降低发光效率.     

Optoelectrical characteristics of organic light-emitting devices fabricated with different cathodes

Organic light-emitting devices (OLEDs) with various cathode structures were prepared on indium tin oxide (ITO) substrates by vacuum sublimation technique, and the effects of the device cathodes on the electroluminescence (EL) characteristics of OLEDs were studied in terms of the luminance, efficiency, driving voltage and threshold voltage. The results demonstrate that the optical and electrical performance of OLEDs depend on the properties of the devices' cathodes and the characteristics of the cathode–organic interface and the organic–organic interface. The optoelectrical performance of a device with composite cathodes is better than that of the devices with metal alloy and pure metal cathodes. The improvement in the device performance can be attributed to a more efficient electron injection at the cathode–organic interface, a better balanced hole and electron recombination in the light-emitting layer and fewer accumulated charges near the organic–organic interface.     

Increase in the random dopant induced threshold fluctuations andlowering in sub-100 nm MOSFETs due to quantum effects: a 3-Ddensity-gradient simulation study

In this paper, we present a detailed simulation study of the influence of quantum mechanical effects in the inversion layer on random dopant induced threshold voltage fluctuations and lowering in sub-100 mn MOSFETs. The simulations have been performed using a three-dimensional (3-D) implementation of the density gradient (DG) formalism incorporated in our established 3-D atomistic simulation approach. This results in a self-consistent 3-D quantum mechanical picture, which implies not only the vertical inversion layer quantization but also the lateral confinement effects related to current filamentation in the “valleys” of the random potential fluctuations. We have shown that the net result of including quantum mechanical effects, while considering statistical dopant fluctuations, is an increase in both threshold voltage fluctuations and lowering. At the same time, the random dopant induced threshold voltage lowering partially compensates for the quantum mechanical threshold voltage shift in aggressively scaled MOSFETs with ultrathin gate oxides     

Simulation of quantum transport in monolithic ICs based on In/sub 0.53/Ga/sub 0.47/As-In/sub 0.52/Al/sub 0.48/As RTDs and HEMTs with a quantum hydrodynamic transport model

A new quantum hydrodynamic transport model based on a quantum fluid model is used for numerical calculations of different quantum sized devices. The simulation of monolithic integrated circuits of resonant tunneling structures and high electron mobility transistors (HEMT) based on In/sub 053/Ga/sub 0.47/As-In/sub 052/Al/sub 0.48/As-InP is demonstrated. With the new model, it is possible to describe quantum mechanical transport phenomena like resonant tunneling of carriers through potential barriers and particle accumulation in quantum wells. Different structure variations, especially the resonant tunneling diode area and the gate width of the HEMT structure, show variable modulations in the output characteristics of the monolithic integrated device.