Low-power/low-voltage RF microsystems for wireless sensors networks

This paper presents radio-frequency (RF) microsystems (MSTs) composed by low-power devices for use in wireless sensors networks (WSNs). The RF CMOS transceiver is the main electronic system and its power consumption is a critical issue. Two RF CMOS transceivers with low-power and low-voltage supply were fabricated to operate in the 2.4 and 5.7 GHz ISM bands. The measurements made in the RF CMOS transceiver at 2.4 GHz, which showed a sensitivity of −60 dBm with a power consumption of 6.3 mW from 1.8 V supply. The measurements also showed that the transmitter delivers an output power of 0 dBm with a power consumption of 11.2 mW. The RF CMOS transceiver at 5.7 GHz has a total power consumption of 23 mW. The target application of these RF CMOS transceivers is for MSTs integration and for use as low-power nodes in WSNs to work during large periods of time without human operation, management and maintenance. These RF CMOS transceivers are also suitable for integration in thermoelectric energy scavenging MSTs.     

DFT-modulated filterbank transceivers for multipath fading channels

The orthogonal frequency division multiplexing (OFDM) transceiver has enjoyed great success in many wideband communication systems. It has low complexity and robustness against multipath channels. It is also well-known that the OFDM transceiver has poor frequency characteristics. To get transceivers with better frequency characteristics, filterbank transceivers with overlapping-block transmission are often considered. However these transceivers in general suffer from severe intersymbol interference (ISI) and high complexity. Moreover costly channel dependent post processing techniques are often needed at the receiving end to mitigate ISI. We design discrete Fourier transform (DFT) modulated filterbank transceivers for multipath fading channels. The DFT modulated filterbanks are known to have the advantages of low design and implementation cost. Although the proposed transceiver belongs to the class of overlapping-block transmission, the only channel dependent part is a set of one-tap equalizers at the receiver, like the OFDM system. We show that for a fixed set of transmitting or receiving filters, the design problem of maximizing signal-to-interference ratio (SIR) can be formulated into an eigenvector problem. Experiments are carried out for transmission over random multipath channels, and the results show that satisfactory SIR performance can be obtained.     

SiGe Radio Frequency ICs for Low-Power Portable Communication

The range and impact of SiGe bipolar and BiCMOS technologies on wireless transceivers for portable telephony and data communications are surveyed. SiGe technology enables transceiver designs that compare favorably with competing technologies such as RF CMOS or III-Vs, with advantages in design cycle time and performance versus cost. As wireless devices continue to increase in complexity using conventional battery technology as the power source, the desire to reduce current consumption in future transceivers continues to favor SiGe technology. Examples are drawn from contemporary wireless communications ICs. The performance of on-chip passive components in silicon technologies are also reviewed in this paper. Greater understanding of the limitations of passive devices coupled with improved models for their performance are leading to circuits offering wider RF dynamic range at ever higher operating frequencies. The innovations in on-chip passive design and construction currently being pioneered in mixed-signal SiGe technologies are enabling circuits operating deep into millimeter-wave frequency bands (i.e., well above 30 GHz). In addition, sophisticated on-chip magnetic components combined with deep submicrometer SiGe active devices in a transceiver front end are envisioned that enable single-volt SiGe circuits, with even lower current consumption than is achievable today. Relevant examples from the recent literature are presented.     

Device technologies for RF front-end circuits in next-generation wireless communications

Next-generation high data rate wireless communication systems offer completely new ways to access information and services. To provide higher data speed and data bandwidth, RF transceivers in next-generation communications are expected to offer higher RF performance in both transmitting and receiving circuitry to meet quality of service. The semiconductor device technologies chosen will depend greatly on the tradeoffs between manufacturing cost and circuit performance requirements, as well as on variations in system architecture. It is hard to find a single semiconductor device technology that offers a total solution to RF transceiver building blocks in terms of system-on-chip integration. The choices of device technologies for each constituent component are important and complicated issues. We review the general performance requirement of key components for RF transceivers for next-generation wireless communications. State-of-the-art high-speed transistor technologies are presented to assess the capabilities and limitations of each technology in the arena of high data rate wireless communications. The pros and cons of each technology are presented and the feasible semiconductor device technologies for next-generation RF transceivers can be chosen upon the discretion of system integrators.     

ISI-free FIR filterbank transceivers for frequency-selectivechannels

Discrete multitone modulation transceivers (DMTs) have been shown to be very useful for data transmission over frequency-selective channels. The DMT scheme is realized by a transceiver that divides the channel into subbands. The efficiency of the scheme depends on the frequency selectivity of the transmitting and receiving filters. The receiving filters with good stopband attenuation are also desired for combating narrowband noise. The filterbank transceiver or discrete wavelet multitone (DWMT) system has been proposed as an implementation of the DMT transceiver that has better frequency band separation, but usually, intersymbol interference (ISI) cannot be completely cancelled in these filterbank transceivers, and additional equalization is required. We show how to use over interpolated filterbanks to design ISI-free FIR transceivers. A finite impulse response (FIR) transceiver with good frequency selectivity can be designed, as demonstrated by the design examples     

Interactive computation of coverage regions for wirelesscommunication in multifloored indoor environments

For indoor wireless communication systems, radio frequency (RF) transceivers need to be placed strategically to achieve optimum communication coverage at the lowest cost. Unfortunately, the coverage region for a transceiver depends heavily on the type of building and on the placement of walls within the building. Traditionally, therefore, transceiver locations have been selected by human experts who rely on experience and heuristics to obtain the optimum (or near-optimum) placement. This paper describes an interactive software system that can be used to assist in transceiver placement. It is intended to be easy to use by individuals who are not experts at wireless communication system design. After the user has selected transceiver locations within a graphical floor plan, the system interprets the floor plan and uses simple path loss models to estimate coverage regions for each transceiver. These regions are highlighted, enabling the user to assess the total coverage. This paper describes the methodology used to compute the coverage regions for multifloored buildings and discusses the effect of interference sources. The resulting system is expected to be useful in the specification of indoor wireless systems     

无线收发器双频ICPA的FDTD分析

高集成无线收发器的集成电路封装天线（Integrated—Circuit Package Antenna，ICPA）需要同时工作在：2．4GHz和5．25GHz的双频段上。它将微带贴片天线和射频收发器集成于一个独立的封装内，并使天线和收发器之间的电磁干扰最小。利用基于非均匀网格的时域有限差分方法（nonuniform Finite—Difference Time—Domain，nu-FDTD）对ICPA进行建模和仿真，并分析了设计参数对ICPA的影响以及ICPA的频率特性、远场辐射方向图和电磁场分布等。经过优化，ICPA天线可以准确地工作在双频段上。     

A 2 MHz Wireless CMOS Transceiver for Implantable Biosignal Sensing Systems

An implementation of an implantable sensing biosystem composes of a readout circuit, a power management block, an embedded microcontroller unit (MCU), an implantable drug delivery section and a wireless uplink transceiver system. This paper describes a bi-directional wireless transceiver system for implantable sensing systems. The transceiver system is composed of an external and implantable transceiver, communicating through an inductive link. Half duplex communication between transceivers at a 10 Kbps data rate was achieved at a maximum distance of 4 cm. Command and data will be supplied to the implantable module by radio frequency (RF) telemetry utilizing an amplitude shift keying (ASK) modulated 2 MHz carrier frequency. A capacitor-less amplitude demodulation receiver architecture was produced in the research with implantable receiver core area measuring at 113.2 μm by 171.8 μm with average power dissipation at 815.1 μW at a 3.3 V single rail power supply. An active uplink transceiver utilizing load shift keying (LSK) as backward data telemetry was designed. Implantable transmitter core area measures 251.7 μm by 139.3 μm, consuming 103.62 mW while driving an RF ferrite core antenna at maximum reading range. Integrating both circuits, implantable transceiver, measuring 355.3 μm by 171.8 μm, was designed and implemented using TSMC 0.35 μm mixed-signal 2P4M 3.3 V standard CMOS process. The integrated circuit solution addressed solutions for many of the problems associated with implanted devices and introduces circuits which improve in several ways over previously published designs, in functionality and integration level. In addition to being fully integrated in plain CMOS technology, not relying at least partly on available specialized elements and expensive technologies, these building blocks improve on previous designs in performance and/or power consumption. This work succeeded in implementing building blocks for an implantable transceiver, which depends only on the absolute minimum off-chip components. A complete implantable chip is presented, which highlight the design tradeoffs and optimizations applied to the design of CMOS implantable system chips.     

Two-way cooperative communications with statistical channel knowledge

We consider the problem of distributed beamforming for a two-way relay network which consists of two transceivers and multiple relay nodes. The main assumption in this work, which differentiates it from previously reported results, is that one of the transceivers is assumed to have only statistical information about channels between the other transceiver and the relay nodes. This assumption imposes less stringent restrictions on the bandwidth required to obtain channel state information via training. Based on this statistical modeling, we propose to use a chance-constrained programming approach to design a distributed beamforming algorithm. In this approach, we aim to minimize the total transmit power (consumed in the entire network) as perceived by one of the transceivers, subject to two probabilistic constraints. These constraints guarantee that the outage probability of the transceivers' received SNRs, as perceived by the master transceiver, is not less than certain given thresholds. We prove rigorously that such an approach leads to a relay selection algorithm where the relay with the strongest channel coefficient to the master transceiver participates in relaying and the remaining relays are shut off. As such, the optimal distributed beamforming algorithm is simplified to a power control solution. Closed-form solution to this problem is obtained and its performance is evaluated through numerical examples.     

High-speed integrated transceivers for optical wireless

Optical wireless LANs have the potential to provide bandwidths far in excess of those available with current or planned RF networks. There are several approaches to implementing optical wireless systems, but these usually involve the integration of optical, optoelectronic, and electrical components in order to create transceivers. Such systems are necessarily complex, and the widespread use of optical wireless is likely to be dependent on the ability to fabricate the required transceiver components at low cost. A number of UK universities are currently involved in a project to demonstrate integrated optical wireless subsystems that can provide line-of-sight in-building communications at 155 Mb/s and above. The system uses two-dimensional arrays of novel microcavity LED emitters and arrays of detectors integrated with custom CMOS integrated circuits to implement tracking transceiver components. In this article we set out the basic approaches that can be used for in-building optical wireless communication and argue the need for an integrated and scalable approach to the fabrication of transceivers. Our work aimed at implementing these components, including experimental results and potential future directions, is then discussed.     

On the effects of memoryless nonlinearities on M-QAM and DQPSK OFDM signals

In the design of RF up-conversion and down-conversion communication links, an issue of special interest is presented by the nonlinear characteristic of analog devices. In this paper, we deal with the effect of memoryless nonlinear distortion on orthogonal frequency-division multiplexing (OFDM) transceivers. We tackle the issue of calculation of the number of intermodulation products with methods from combinatorics theory and derive closed-form expressions for the signal-to-noise ratio (SNR). We deal with third-order nonlinearities alone though the methodology used can be extended to cover higher order nonlinear phenomena. We then proceed to deriving SNR expressions in the presence of a high adjacent channel of the same service and predict the generation of in-band tonal interference. Finally, we generalize to the case of a multichannel OFDM transceiver. In each case, bit-error-rate estimations for differential quadrature phase-shift keying and symbol-error-rate estimations for M-quadrature amplitude-modulation constellations are presented and a mapping between circuit characteristics and OFDM performance is outlined.     

Go/No-Go Testing of VCO Modulation RF Transceivers Through the Delayed-RF Setup

The increasing share of test and packaging as a percentage of the overall cost for RF transceivers necessitate, radically test new approaches to both wafer-level and final production testing. We present a new system-level test setup for voltage-controlled oscillator (VCO) modulating transceiver architectures that we call the delayed-RF setup, along with a novel, all-digital design-for-testability (DFT) modification that enables coverage of the most important system-level specifications. The delayed-RF setup can be used during wafer sort, thus preventing the packaging of nonfunctional dies. Based on this setup and the DFT technique, we present an automatic test development methodology for FM transceivers using frequency-domain signature analysis. We develop two distinct pass/fail criteria based on eigensignatures and envelope signatures and a test generation algorithm that aims at minimizing the required delay while attaining full coverage of target faults. We develop a fault injection and simulation platform for a VCO-modulation, low-IF transceiver architecture using MATLAB and behavioral models including nonideal response. The proposed methodology enables the automation of the test generation process, thus reduces the test development time. Experimental results have shown a 90% reduction in the required delay thereby reducing the cost of this test hardware item     

A New Automatic Compensation Network for System‐on‐Chip Transceivers

This paper proposes a new automatic compensation network (ACN) for a system‐on‐chip (SoC) transceiver. We built a 5 GHz low noise amplifier (LNA) with an on‐chip ACN using 0.18 µm SiGe technology. This network is extremely useful for today's radio frequency (RF) integrated circuit devices in a complete RF transceiver environment. The network comprises an RF design‐for‐testability (DFT) circuit, capacitor mirror banks, and a digital signal processor. The RF DFT circuit consists of a test amplifier and RF peak detectors. The RF DFT circuit helps the network to provide DC output voltages, which makes the compensation network automatic. The proposed technique utilizes output DC voltage measurements and these measured values are translated into the LNA specifications such as input impedance, gain, and noise figure using the developed mathematical equations. The ACN automatically adjusts the performance of the 5 GHz LNA with the processor in the SoC transceiver when the LNA goes out of the normal range of operation. The ACN compensates abnormal operation due to unusual thermal variation or unusual process variation. The ACN is simple, inexpensive and suitable for a complete RF transceiver environment.     

Low-power radio-frequency ICs for portable communications

The contributions of integrated circuits to the RF front-end of wireless receivers and transmitters operating in broadcast and personal communications bands are surveyed. It is seen from this that when ICs enable a rethinking of the RF architecture, the wireless device can sometimes become significantly smaller, and consume much less power. Examples are taken from FM broadcast receivers, pagers, and cellular telephone handsets. Many semiconductor technologies are competing today to supply RF-ICs to cellular telephones. The various design styles and levels of integration are compared, with the conclusion that single-chip silicon transceivers, combined with architectures which substantially reduce off-chip passive components, will likely dominate digital cellular telephones in the near future. The survey also projects future trends for ICs for miniature spread-spectrum transceivers offering robust operation in the crowded spectrum. With sophistication in baseband digital signal processing, its increasing interaction with the RF sections, and with increasing experience in simplified radio architectures, all-CMOS radios appear promising in the 900 MHz to 2 GHz bands. A specific CMOS spread-spectrum transceiver project underway at the author's institution is discussed by way of example     

Optimal ISI-free DMT transceivers for distorted channels withcolored noise

The design of optimal DMT transceivers for distorted channel with colored noise has been of great interest. Of particular interest is the class of block based DMT, where the transmitter and the receiver consist of constant matrices. Two types of block- based DMT transceivers are considered: the DMT system with zero padding (ZP-DMT) and the DMT system with general prefix (GP-DMT). We derive the bit allocation formula. For a given channel and channel noise spectrum, we design the ISI-free optimal transceiver that minimizes the transmission power for a given transmission rate and probability of error. For both ZP-DMT and GP-DMT systems, the optimal ISI-free transceiver can be given in closed from. We will see that for both classes, the optimal transceiver has an orthogonal transmitter. Simulation shows that the optimal DMT system can achieve the same transmission rate and the same probability of error with a much lower transmission power compared with other existing DMT systems     

On the use of body biasing to improve linearity in low LO-power CMOS active mixers

In a radio-frequency (RF) transceiver, the linearity of the mixer has a profound effect on the overall transceiver performance. In many RF transceivers, active mixers are used due to their higher gain which also improves the overall receiver noise figure. In a typical RF active mixer where the transistors in the LO stage switch abruptly, most of the nonlinear distortions come from the transconductance or RF stage and thus the linearity of the mixer can be enhanced by proper design of the RF stage. In low-power receivers, however, to reduce the power consumption of the local oscillator (LO) circuit, the amplitude of LO signal is low and thus the switching of the transistors in the LO stage of the mixer is gradual. In this paper, we propose a technique to improve the linearity of such low-power mixers by enhancing the linearity of the LO stage. In particular, body biasing is utilized in the LO stage to improve the linearity. To verify the effectiveness of the proposed technique, two proof-of-concept double-balanced down-conversion active mixers have been designed and fabricated in 0.13-µm CMOS. The maximum IIP3 of +2.7 dBm and −4.9 dBm at a conversion gain of 13 dB and 16 dB are achieved for the first and second prototype respectively. For a 2.4 GHz RF input signal and an intermediate-Frequency (IF) of 50 MHz, the first prototype consumes 2.4 mW from a 1.2 V supply while the second one consumes only 780 µW from a 0.7 V supply.     

Design considerations for transceiver-limited elastic optical networks

The continuous increase of data traffic for present-day applications necessitates the development of Elastic Optical Networks (EONs). Significant advancements in efficient Routing and Spectrum Assignment (RSA) algorithms for EONs have been noticed in the recent past. These existing algorithms did not mention constraints on the number of transceivers per node in a network. However, for the planning of a realistic network, it is necessary to estimate the number of transceivers required at each node for the efficient operation of a network. Therefore, transceiver constraints should be taken into account while designing the RSA algorithms. In this paper, we present the impact of putting a limit to the number of transmitters and receivers available at each node of an EON. Moreover, the cost of a network heavily depends on the number of transceivers that each node in the network may offer. Hence, estimating the required number of transceivers per node in a network is vital to approximate the design cost of a network. Here, we present an Integer Linear Programming (ILP) formulation that includes the transceiver constraints and also develop a transceiver-aware heuristic algorithm for routing and spectrum assignment in EONs. Simulation results help us provide a proper design tool to estimate the number of transceivers per node in elastic optical networks.

     

CMOS mm-wave transceivers for Gbps wireless communication

The challenges in the design of CMOS millimeter-wave (mm-wave) transceiver for Gbps wireless communication are discussed. To support the Gbps data rate, the link bandwidth of the receiver/transmitter must be wide enough, which puts a lot of pressure on the mm-wave front-end as well as on the baseband circuit. This paper discusses the effects of the limited link bandwidth on the transceiver system performance and overviews the bandwidth expansion techniques for mm-wave amplifiers and IF programmable gain amplifier. Furthermore, dual-mode power amplifier (PA) and self-healing technique are introduced to improve the PA''s average efficiency and to deal with the process, voltage, and temperature variation issue, respectively. Several fully-integrated CMOS mm-wave transceivers are also presented to give a short overview on the state-of-the-art mm-wave transceivers.     

Dirty RF: A New Paradigm

The implementation challenge for new low-cost low-power wireless modem transceivers has continuously been growing with increased modem performance, bandwidth, and carrier frequency. Up to now we have been designing transceivers in a way that we are able to keep the analog (RF) problem domain widely separated from the digital signal processing design. However, with today’s deep sub-micron technology, analog impairments – “dirt effects” – are reaching a new problem level which requires a paradigm shift in the design of transceivers. Examples of these impairments are phase noise, non-linearities, I/Q imbalance, ADC impairments, etc. In the world of “Dirty RF” we assume to design digital signal processing such that we can cope with a new level of impairments, allowing lee-way in the requirements set on future RF sub-systems. This paper gives an overview of the topic and presents analytical evaluations of the performance losses due to RF impairments as well as algorithms that allow to live with imperfect RF by compensating the resulting error effects using digital baseband processing.     

The impact of number of transceivers and their tunabilities on WDMnetwork performance

For all-optical WDM networks, we study the impact of the number of transceivers and their tunabilities on network performance. Results have been obtained through simulations for networks with different topologies. We find that a network with a limited number of transceivers in each node and limited transceiver tunability can still perform close to one equipped with a full number of fully tunable transceivers