Embedded epitaxial growth of 4H-SiC on trenched substrates and pn junction characteristics

Embedded epitaxial growth has been carried out on 4H-SiC substrates with very narrow and deep trenches. The growth behavior near trenches is investigated under various growth conditions. Epitaxial growth on the sidewalls and at the bottom of trenches was enhanced under a low C/Si ratio which may bring a larger surface diffusion length of reactant species. Pn diodes were fabricated by embedded epitaxial growth on trenched substrates. The crystallographic orientation of the trenches has been found to be important for device fabrication.     

4H-SiC avalanche photodiode with multistep junction extensiontermination

4H-SiC avalanche photodiodes (APDs) are fabricated with a multistep junction termination extension. The leakage current density has been dramatically reduced to as low as 1 μA/cm² and photo-responsivity up to 10⁵ A/W has been achieved. The 4H-SiC APDs can run very stably at power densities up to 10⁴ W/cm²     

Positive temperature coefficient of breakdown voltage in 4H-SiC pnjunction rectifiers

It has been suggested that once silicon carbide (SiC) technology overcomes some crystal growth obstacles, superior SiC semiconductor devices would supplant silicon in many high-power applications. However, the property of positive temperature coefficient of breakdown voltage, a behavior crucial to realizing excellent power device reliability, has not been observed in 4H-SiC, which is presently the best-suited SiC polytype for power device implementation. This paper reports the first experimental measurements of stable positive temperature coefficient behavior observed in 4H-SiC pn junction rectifiers. This research indicates that robust 4H-SiC power devices with high breakdown reliability should be achievable after SiC foundries reduce material defects such as micropipes, dislocations, and deep level impurities     

4H-SiC功率MESFET的击穿特性

研究了4 H- Si C MESFET器件的电学击穿特性和热学稳定性.建立了金属半导体场效应晶体管器件二维数值模型,分析了雪崩碰撞离化效应、隧穿效应和热效应在器件击穿中的作用.综合考虑了栅极偏置、自热效应等因素对击穿的影响.采用准静态方法,求解瞬态偏微分方程组,分析了器件的耐热耐压性能和可靠性     

Electrical characteristics of 4.5 kV implanted anode 4H-SiC p-i-njunction rectifiers

4500 V 4H-SiC p-i-n junction rectifiers with low on-state voltage drop (3.3-4.2 V), low reverse leakage current (3×10^-6 A/cm²), and fast switching (30-70 ns) have been fabricated and characterized. Forward current-voltage measurements indicate a minimum ideality factor of 1.2 which confirms a recombination process involving multiple energy levels. Reverse leakage current exhibits a square root dependence on voltage below the punchthrough voltage where leakage currents of less than 3×10^-6 A/cm² are measured. Reverse recovery measurements are presented which indicate the presence of recombination at the junction perimeter where a surface recombination velocity of 2-8×10⁵ cm/s is found. These measurements also indicate drift layer bulk carrier lifetimes ranging from 74 ns at room temperature to 580 ns at 250°C     

4H-SiC功率MESFET的击穿特性

研究了4H-SiC MESFET器件的电学击穿特性和热学稳定性.建立了金属半导体场效应晶体管器件二维数值模型,分析了雪崩碰撞离化效应、隧穿效应和热效应在器件击穿中的作用.综合考虑了栅极偏置、自热效应等因素对击穿的影响.采用准静态方法,求解瞬态偏微分方程组,分析了器件的耐热耐压性能和可靠性.     

Partial dislocations and stacking faults in 4H-SiC PiN diodes

Using plan-view transmission electron microscopy (TEM), we have identified stacking faults (SFs) in 4H-SiC PiN diodes subjected to both light and heavy electrical bias. Our observations suggest that the widely expanded SFs seen after heavy bias are faulted dislocation loops that have expanded in response to strain of the 4H-SiC film, while faulted screw or 60° threading dislocations do not give rise to widely expanded SFs. Theoretical calculations show that the expansion of SFs depends on the Peach-Koehler (PK) forces on the partial dislocations bounding the SFs, indicating that strain plays a critical role in SF expansion.     

JTE终端结构4H-SiC JBS二极管的击穿特性研究

研究了JTE终端结构4H-SiC JBS二极管的击穿特性.首先,理论模拟了JTE终端横向长度、离子注入剂量和界面电荷对击穿电压的影响.对工艺条件进行优化,制作了JTE终端结构4H-SiC JBS二极管.测试结果表明,器件的正向电压为1.52V,特征导通电阻为2.12 mΩ·cm2,击穿电压为1650 V.接着,研究器件...     

4 kV 4H-SiC epitaxial emitter bipolar junction transistors

In this paper, we present 4H-SiC bipolar junction transistors (BJTs) with open-base blocking voltage (BV/sub CEO/) of 4000 V, specific on-resistance (R/sub on,sp/) of 56 m/spl Omega/-cm/sup 2/, and common-emitter current gain /spl beta//spl sim/9. These devices are designed with interdigitated base and emitter fingers with multiple emitter stripes. We assess the impact of design (emitter stripe width and contact spacing) on device performance and also examine the effect of emitter contact resistance on the device forward conduction characteristics.     

Al+ and B+ implantations into 6H-SiC epilayers and application to pn junction diodes

Aluminum (Al) and boron (B) ion implantations at room temperature into n-type 6H-SiC epilayers have been investigated. Rutherford backscattering spectroscopy (RBS) channeling measurements revealed larger lattice damage in Al⁺ implantation at a given total implantation dose. A nearly perfect electrical activation ratio (>90%) could be attained by high-temperature annealing at 1600°C for Al⁺ and 1700°C for B⁺ implantations. Mesa pn junction diodes formed by either Al⁺ or B⁺ implantation with a 1×10¹⁴ cm⁻² dose exhibited high blocking voltages of 950∼1070 V, which are 80∼90% of the ideal value predicted for the diode structure. The forward current can clearly be divided into two components of diffusion and recombination currents. B⁺-implanted diodes showed higher breakdown voltage on average but poor forward conduction. Comparison of the performance of Al⁺ and B⁺-implanted diodes is discussed.     

1800 V NPN bipolar junction transistors in 4H-SiC

The first high voltage npn bipolar junction transistors (BJTs) in 4H-SiC have been demonstrated. The BJTs were able to block 1800 V in common emitter mode and showed a peak current gain of 20 and an on-resistance of 10.8 mΩ·cm² at room temperature (I_C=2.7 A @ V_CE=2 V for a 1 mm×1.4 mm active area), which outperforms all SiC power switching devices reported to date. Temperature-stable current gain was observed for these devices. This is due to the higher percent ionization of the deep level acceptor atoms in the base region at elevated temperatures, which offsets the effects of increased minority carrier lifetime at high temperatures. These transistors show a positive temperature coefficient in the on-resistance characteristics, which will enable easy paralleling of the devices     

高电流增益的碳化硅双极型晶体管

A novel 4H-SiC BJT of high current gain with a suppressing surface traps effect has been proposed. It is effective to improve the current gain due to the lower electrons density in the surface region by extending the emitter metal to overlap the passivation layer on the extrinsic base surface. The electrons trapped in the extrinsic base surface induce the degeneration of Si C BJTs device performance. By modulating the electron recombination rate, the novel structure can increase the current gain to 63.2% compared with conventional ones with the compatible process technology. Optimized sizes are an overlapped metal length of 4 m, as well as an oxide layer thickness of 50 nm.     

4H-SiC normally-off vertical junction field-effect transistor with high current density

4H-silicon carbide (SiC) normally-off vertical junction field-effect transistor (JFET) is developed in a purely vertical configuration without internal lateral JFET gates. The 2.1-/spl mu/m vertical p/sup +/n junction gates are created on the side walls of deep trenches by tilted aluminum (Al) implantation. Normally-off operation with blocking voltage V/sub bl/ of 1 726 V is demonstrated with an on-state current density of 300 A/cm/sup 2/ at a drain voltage of 3 V. The low specific on-resistance R/sub on-sp/ of 3.6 m/spl Omega/cm/sup 2/ gives the V/sub bl//sup 2//R/sub on-sp/ value of 830 MW/cm/sup 2/, surpassing the past records of both unipolar and bipolar 4H-SiC power switches.     

Hollow-core screw dislocations in 6H-SiC single crystals: A test of Frank’s theory

Hollow-core screw dislocations, also known as “micropipes”, along the [0001] axis in 6H-SiC single crystals, have been studied by synchrotron white beam x-ray topography (SWBXT), scanning electron microscopy (SEM), and Nomarski optical microscopy (NOM). Using SWBXT, the magnitude of the Burgers vector of screw dislocations has been determined by measuring the following four parameters: (1) the diameter of dislocation images in back-reflection topographs; (2) the width of bimodal dislocation images in transmission topographs; (3) the magnitude of the tilt of lattice planes on both sides of dislocation core in projection topographs; and (4) the magnitude of the tilt of lattice planes in section topographs. The four methods show good agreement. SEM results reveal that micropipes emerge as holes on the as-grown surface, with their diameters ranging from about 0.1 to a few micrometers. Correlation between topographic images and SEM micrographs shows that micropipes are hollow-core screw dislocations with Burgers vector magnitudes from 2c to 7c (c is the lattice parameter along the [0001] axis). There is no empirical evidence that 1c dislocations have hollow cores. The Burgers vector magnitude of screw disloca-tions, b, and the diameter of associated micropipes, D, were fitted to Frank’s prediction for hollow-core screw dislocations: D = μb²/4π²γ, where μ is shear modulus, and γ is specific surface energy. Statistical analysis of the relationship between D and b² shows that it is approximately linear, and the constant γ/μ ranges from 1.1 × 10⁻³ to 1.6 × l0⁻³ nm.     

Time-Dependent Dielectric Breakdown of 4H-SiC MOS Capacitors and DMOSFETs

Time-dependent dielectric breakdown measurements were performed at 200 $^{ circ}hbox{C}$ on 4H-SiC MOS capacitors and vertical DMOSFETs with 50-nm-thick nitrided oxides in order to better understand the physical mechanisms of failure and to predict the component reliability. Oxide breakdown locations are shown to have no correlation to defects in the SiC epitaxial layer. Characterization of the electric-field acceleration of failures indicates that failure modes differ at low and high electric fields. Specifically, extrapolations from measurements at electric fields greater than 8.5 MV/cm predict anomalously high reliability at normal operating fields. Thus, we have shown that SiC MOS reliability characterization must ensure that electric field stresses be performed at low electric fields in order to accurately predict failure times.      

High current gain 4H-SiC npn bipolar junction transistors

The authors report a common emitter current gain /spl beta/ of 55 in npn epitaxial-emitter 4H-SiC bipolar junction transistors. The spacing between the p+ base contact implant and the edge of the emitter finger is critical in obtaining high-current gain. V/sub CEO/ of these devices is 500 V, and V/sub CBO/ is 700 V.     

High-voltage 4H-SiC PiN diodes with the etched implant junction termination extension

This paper presents the design and fabrication of an etched implant junction termination extension(JTE) for high-voltage 4H-SiC PiN diodes. Unlike the conventional JTE structure, the proposed structure utilizes multiple etching steps to achieve the optimum JTE concentration range. The simulation results show that the etched implant JTE method can improve the blocking voltage of SiC PiN diodes and also provides broad process latitude for parameter variations, such as implantation dose and activation annealing condition. The fabricated SiC PiN diodes with the etched implant JTE exhibit a highest blocking voltage of 4.5 kV and the forward on-state voltage of 4.6 V at room temperature. These results are of interest for understanding the etched implant method in the fabrication of high-voltage power devices.     

Discrimination of dislocations in 4H-SiC by inclination angles of molten-alkali etched pits

Discrimination of dislocations is critical to the statistics of dislocation densities in 4H silicon carbide (4H-SiC), which are routinely used to evaluate the quality of 4H-SiC single crystals and homoepitaxial layers. In this work, we show that the inclination angles of the etch pits of molten-alkali etched 4H-SiC can be adopted to discriminate threading screw dislocations (TSDs), threading edge dislocations (TEDs) and basal plane dislocations (BPDs) in 4H-SiC. In n-type 4H-SiC, the inclination angles of the etch pits of TSDs, TEDs and BPDs in molten-alkali etched 4H-SiC are in the ranges of 27°−35°, 8°−15° and 2°−4°, respectively. In semi-insulating 4H-SiC, the inclination angles of the etch pits of TSDs and TEDs are in the ranges of 31°−34° and 21°−24°, respectively. The inclination angles of dislocation-related etch pits are independent of the etching duration, which facilitates the discrimination and statistic of dislocations in 4H-SiC. More significantly, the inclination angle of a threading mixed dislocations (TMDs) is found to consist of characteristic angles of both TEDs and TSDs. This enables to distinguish TMDs from TSDs in 4H-SiC.     

Pulsed breakdown of 4H-SiC Schottky diodes terminated with a boron-implanted p-n junction

Pulsed reverse current-voltage characteristics have been measured in the breakdown region for 1-kV 4H-SiC Schottky diodes terminated with a boron-implanted p-n junction. It was shown that the dynamic breakdown voltage of the diodes increases as the pulses become shorter. Owing to the homogeneous avalanche formation at the edge of the guard p-n junction and to the high differential resistance in the breakdown region, the diodes sustain without degradation a pulsed reverse voltage substantially exceeding the static breakdown threshold. Characteristic features of the pulsed breakdown are considered in relation to the specific properties of the boron-implanted guard p-n junction.     

Long-term charge storage in GaP pn junction capacitors

pn junction storage capacitors are fabricated in GaP grown by gas source MBE. Storage times are thermally activated with activation energies between 1.10 and 1.38 eV. At 125 degrees C, the GaP recovery times are approximately 50 times longer than the best GaAs devices.<>