Study of bulk and elementary screw dislocation assisted reversebreakdown in low-voltage (<250 V) 4H-SiC p+-n junctiondiodes. I. DC properties

Given the high-density (~10⁴ cm^-2) of elementary screw dislocations (Burgers vector=1c with no hollow core) in commercial SiC wafers and epilayers, all large current (>1 A) SiC power devices will likely contain elementary screw dislocations for the foreseeable future. It is therefore important to ascertain the electrical impact of these defects, particularly in high-field vertical power device topologies where SiC is expected to enable large performance improvements in solid-state high-power systems. This paper compares the dc-measured reverse-breakdown characteristics of low-voltage (<250 V) small-area (<5×10^-4 cm² ) 4H-SiC p⁺-n diodes with and without elementary screw dislocations. Diodes containing elementary screw dislocations exhibited higher pre-breakdown reverse leakage currents, softer reverse breakdown current-voltage (I-V) knees, and highly localized microplasmic breakdown current filaments compared to screw dislocation-free devices. The observed localized 4H-SiC breakdown parallels microplasmic breakdown observed in silicon and other semiconductors, in which space-charge effects limit current conduction through the local microplasma as reverse bias is increased     

Study of bulk and elementary screw dislocation assisted reversebreakdown in low-voltage (<250 V) 4H-SiC p+-n junctiondiodes. II. Dynamic breakdown properties

For Part I see ibid., vol.46, no.3, pp.478-84 (Mar. 1999). This paper outlines the dynamic reverse-breakdown characteristics of low-voltage (<250 V) small-area <5×10^-4 cm² 4H-SiC p⁺-n diodes subjected to nonadiabatic breakdown-bias pulsewidths ranging from 0.1 to 20 μs 4H-SiC diodes with and without elementary screw dislocations exhibited positive temperature coefficient of breakdown voltage and high junction failure power densities approximately five times larger than the average failure power density of reliable silicon pn rectifiers. This result indicates that highly reliable low-voltage SiC rectifiers may be attainable despite the presence of elementary screw dislocations. However, the impact of elementary screw dislocations on other more useful 4H-SiC power device structures, such as high-voltage (>1 kV) pn junction and Schottky rectifiers, and bipolar gain devices (thyristors, ICBT's, etc.) remains to be investigated     

Temperature-dependence of steady-state characteristics of SCR-type ESD protection circuits

Experimental analysis of the temperature-dependent I–V characteristics of various SCR (Silicon-Controlled Rectifier) electrostatic discharges (ESD) protection circuits have been carried out. These circuits include diode-chain-triggering SCR (DCTSCR), low-voltage zener diode trigger SCR (ZDSCR), low-voltage trigger SCR (LVTSCR) and gate-coupled low-voltage trigger SCR (GCSCR) circuits. The ZDSCR uses the zener breakdown mechanism of a reverse-biased p⁺–n⁺ diode as a trigger mechanism, the DCTSCR uses the current flowing through forward-biased diode chain as a trigger mechanism, the LVTSCR uses the grounded-gate MOSFET breakdown current as the trigger mechanism and the steady-state I–V characteristics of GCSCR also uses the avalanche breakdown as a triggering mechanism. The trigger voltage can decrease or increase with increasing temperature depending upon the triggering mechanism used in the circuit, however the holding voltages of these SCRs decrease with increasing temperature.     

Noise studies in internal field emission diodes

The breakdown process of a zener diode in reverse direction is governed by internal field emission at low voltage and by impact ionization at higher voltage. For breakdown voltage in the transition range between 3 and 6 V, both physical processes appear in combination. Measuring the I–V characteristic and the noise current fluctuations spectral density it is possible to show the zener current multiplication by the multiplication effect described by Tager. In addition the I–V characteristic can be written empirically I = Vⁿ.     

Hollow-core screw dislocations in 6H-SiC single crystals: A test of Frank’s theory

Hollow-core screw dislocations, also known as “micropipes”, along the [0001] axis in 6H-SiC single crystals, have been studied by synchrotron white beam x-ray topography (SWBXT), scanning electron microscopy (SEM), and Nomarski optical microscopy (NOM). Using SWBXT, the magnitude of the Burgers vector of screw dislocations has been determined by measuring the following four parameters: (1) the diameter of dislocation images in back-reflection topographs; (2) the width of bimodal dislocation images in transmission topographs; (3) the magnitude of the tilt of lattice planes on both sides of dislocation core in projection topographs; and (4) the magnitude of the tilt of lattice planes in section topographs. The four methods show good agreement. SEM results reveal that micropipes emerge as holes on the as-grown surface, with their diameters ranging from about 0.1 to a few micrometers. Correlation between topographic images and SEM micrographs shows that micropipes are hollow-core screw dislocations with Burgers vector magnitudes from 2c to 7c (c is the lattice parameter along the [0001] axis). There is no empirical evidence that 1c dislocations have hollow cores. The Burgers vector magnitude of screw disloca-tions, b, and the diameter of associated micropipes, D, were fitted to Frank’s prediction for hollow-core screw dislocations: D = μb²/4π²γ, where μ is shear modulus, and γ is specific surface energy. Statistical analysis of the relationship between D and b² shows that it is approximately linear, and the constant γ/μ ranges from 1.1 × 10⁻³ to 1.6 × l0⁻³ nm.     

Electrical properties of W/Si interfaces with embedded Ge/Si islands

In this work, we investigated electrical and morphological properties of W/p-type Si Schottky diodes with intentional inhomogeneities introduced by macroscopic Ge-islands embedded beneath the interface. The Si-cap layer thickness (or the island-distance to the interface) was progressively reduced by successive chemical etching cycles. Electrical characterizations were achieved through reverse current–voltage (I–V) at room temperature and forward I–V measurements as a function of the temperature. In parallel, Rutherford backscattering spectroscopy analyses were performed to follow the Si-cap/Ge islands chemical thinning down with increasing the number of etching cycles. In addition, the comparison of topographical and electrical properties of the etched silicon-cap layer was carried out by conductive atomic force microscopy analyses with a nanometer-scale resolution. Our results indicate that the areas on the top of islands exhibit lower resistance than those which covered the wetting layer. This lateral variation of resistance at the surface of the semiconductor may correspond to Schottky barrier height inhomogeneities observed on broad area I–V characteristics of Schottky contacts.     

Characterization and Formation Mechanism of Six Pointed Star-Type Stacking Faults in 4H-SiC

Synchrotron white-beam x-ray topography (SWBXT) studies of defects in 100-mm-diameter 4H-SiC wafers grown using physical vapor transport are presented. SWBXT enables nondestructive examination of thick and large-diameter SiC wafers, and defects can be imaged directly. Analysis of the contrast from these defects enables determination of their configuration, which, in turn, provides insight into their possible formation mechanisms. Apart from the usual defects present in the wafers, including micropipes, threading edge dislocations, threading screw dislocations, and basal plane dislocations, a new stacking fault with a peculiar configuration attracts our interest. This fault has the shape of a six-pointed star, comprising faults with three different fault vectors of Shockley type. Transmission and grazing topography of the fault area are carried out, and detailed contrast analysis reveals that the outline of the star is confined by 30° Shockley partial dislocations. A micropipe, which became the source of dislocations on both the basal plane slip system and the prismatic slip system, is found to be associated with the formation of the star fault. The postulated mechanism involves the reaction of 60° dislocations of a/3 〈 $ \bar{2}110 $ 〉 Burgers vector on basal plane and pure screw dislocations of a/3 〈 $ 11\bar{2}0 $ 〉 Burgers vector on prismatic plane and cross slip of the partial dislocation from prismatic plane to basal plane leading to expansion of the faults.     

Simulation and experimental results on the forward J–V characteristic of Al implanted 4H–SiC p–i–n diodes

In this work the forward J–V characteristics of 4H–SiC p–i–n diodes are analysed by means of a physics based device simulator tuned by comparison to experimental results. The circular devices have a diameter of 350 μm. The implanted anode region showed a plateau aluminium concentration of 6×10¹⁹ cm⁻³ located at the surface with a profile edge located at 0.2 μm and a profile tail crossing the n-type epilayer doping at 1.35 μm. Al atom ionization efficiency was carefully taken into account during the simulations. The final devices showed good rectifying properties and at room temperature a diode current density close to 370 A/cm² could be measured at 5 V. The simulation results were in good agreement with the experimental data taken at temperatures up to about 523 K in the whole explored current range extending over nine orders of magnitude. Simulations also allowed to estimate the effect of a different p⁺ doping electrically effective profile on the device current handling capabilities.     

Screw and edge dislocations-induced internal strain around micropipes of 6H-SiC single crystals

The interference pattern around micropipes of 6H-SiC single crystal (0 0 1) substrate has been characterized by polarizing optical microscopy. The interference pattern showed anisotropy around micropipes, which was thought to result from edge dislocation caused by internal strain. A model experiment using a stress-induced acryl resin board certainly demonstrated a similar interference pattern to the 6H-SiC single crystal, when tensile and compression stresses were applied to each side in the vicinity of an open hole in the acryl resin board. Stress distribution around the micropipe of 6H-SiC single crystal was discussed in connection with the existence of edge and screw dislocations. The size of the micropipe depended on the Burgers vector, and an internal strain generated around the micropipe was correlated with the edge dislocation.     

Optically controlled current-voltage characteristics of ion-implanted MESFETs

Optically controlled MESFETs are useful as optical devices for optical communications, and as photodetectors. In this paper, a theoretical model for the I–V characteristics of these MESFETs is presented. The model considers the nonuniform Gaussian doping for ion-implanted channels. It takes both the photogenerated carriers as well as the doping generated residual carriers into account. It is noted that the density of photogenerated carriers in the channel due to diffusion is much less than that due to drift. Treatment both under gradual channel approximation and saturation velocity approximation has been presented. The gradual channel and the velocity saturation approximations are applied to study the I–V characteristics of long-channel and short-channel MESFETs, respectively. Results for both long-channel and short-channel MESFETs indicate that drain saturation current and transconductance can be improved by properly fixing the optical flux, and the absorption coefficient of the material.     

Positive temperature coefficient of breakdown voltage in 4H-SiC pnjunction rectifiers

It has been suggested that once silicon carbide (SiC) technology overcomes some crystal growth obstacles, superior SiC semiconductor devices would supplant silicon in many high-power applications. However, the property of positive temperature coefficient of breakdown voltage, a behavior crucial to realizing excellent power device reliability, has not been observed in 4H-SiC, which is presently the best-suited SiC polytype for power device implementation. This paper reports the first experimental measurements of stable positive temperature coefficient behavior observed in 4H-SiC pn junction rectifiers. This research indicates that robust 4H-SiC power devices with high breakdown reliability should be achievable after SiC foundries reduce material defects such as micropipes, dislocations, and deep level impurities     

Effect of crystallographic defects on the reverse performance of 4H-SiC JBS diodes

A quantitative analysis of the effect of crystallographic defects on the performance of 4H-SiC junction barrier Schottky (JBS) diodes was performed. It has been shown that higher leakage current in diodes is associated with a greater number of elementary screw dislocations. Further, threading dislocation pair arrays were observed in some of the fabricated devices and, for the first time, the role of such defects on JBS reverse leakage currents is investigated.     

Electrical properties of high permittivity ZrO2 gate dielectrics on strained-Si

Deposition and electrical properties of high dielectric constant (high-k) ultrathin ZrO₂ films on tensilely strained silicon (strained-Si) substrate are reported. ZrO₂ thin films have been deposited using a microwave plasma enhanced chemical vapor deposition technique at a low temperature (150 °C). Metal insulator semiconductor (MIS) structures are used for high frequency capacitance–voltage (C–V), current–voltage (I–V), and conductance–voltage (G–V) characterization. Using MIS capacitor structures, the reliability and the leakage current characteristics have been studied both at room and high temperature. Schottky conduction mechanism is found to dominate the current conduction at a high temperature. Observed good electrical and reliability properties suggest the suitability of deposited ZrO₂ thin films as an alternative as gate dielectrics. Compatibility of ZrO₂ as a gate dielectric on strained-Si is shown.     

Optoelectronic properties of Zn0.52Se0.48/Si Schottky diodes

Zn_0.52Se_0.48/Si Schottky diodes are fabricated by depositing zinc selenide (Zn_0.52Se_0.48) thin films onto Si(1 0 0) substrates by vacuum evaporation technique. Rutherford backscattering spectrometry (RBS) analysis shows that the deposited films are nearly stoichiometric in nature. X-ray diffractogram of the films reveals the preferential orientation of the films along (1 1 1) direction. Structural parameters such as crystallite size (D), dislocation density (δ), strain (ε), and the lattice parameter are calculated as 29.13 nm, 1.187 × 10⁻¹⁵ lin/m², 1.354 × 10⁻³ lin⁻² m⁻⁴ and 5.676 × 10⁻¹⁰ m respectively. From the I–V measurements on the Zn_0.52Se_0.48/p-Si Schottky diodes, ideality and diode rectification factors are evaluated, as 1.749 (305 K) and 1.04 × 10⁴ (305 K) respectively. The built-in potential, effective carrier concentration (N_A) and barrier height were also evaluated from C–V measurement, which are found to be 1.02 V, 5.907 × 10¹⁵ cm⁻³ and 1.359 eV respectively.     

Correlation between barrier heights and ideality factors of H-terminated Sn/p-Si(1 0 0) Schottky barrier diodes

Schottky barrier diodes (SBDs) were prepared by evaporation on H-terminated p-Si(1 0 0) surfaces. The Si(1 0 0)-H surfaces were obtained by wet chemical etching in diluted hydrofluoric acid. The current–voltage (I–V) characteristics of real SBDs are described by using two fitting parameters that are the effective barrier height (EBH) and ideality factor n. They were determined from I–V characteristics of SBDs (30 diodes) fabricated under experimentally identical conditions. The obtained values of EBHs varied from 0.729 to 0.749 eV, and the values of ideality factors varied from 1.083 to 1.119. The results showed that both parameters of SBDs differ from one diode to another even if they are identically prepared. The EBH distributions were fitted by two Gaussian distribution functions, and their mean values were found to be 0.739 ± 0.003 eV and 0.733 ± 0.001 eV, respectively. The homogeneous barrier height of SBDs was found to be 0.770 eV from the linear relationship between EBHs () and ideality factors (n).     

An analytical model for the power bipolar-MOS transistor

This paper presents an analytical model for the I–V characteristics of the bipolar-MOS power transistor, also known as IGT or COMFET. Good agreement between this model and experiments is found over a wide range of carrier lifetime and current density. The predicted trade-off between the forward voltage drop and device turn-off time (0.4–10 μsec) has been verified by experiment. For even shorter switching time, the model predicts only a moderate increase in V_F. Adding a more heavily doped buffer epitaxial layer is shown to only slightly increase V_F but offers several important benefits. The comparison between n-channel and p-channel devices is discussed using the model and the forward voltage drops for the two types of devices are shown to differ by only a small percentage in spite of the large difference in electron and hole mobilities.     

A circuit-compatible analytical device model for ballistic nanowire transistors

Silicon nanowire transistors (SNWTs) have attracted broad attention as a promising device structure for future integrated circuits. Silicon nanowires with a diameter as small as 2 nm and having high carrier mobility have been achieved. Consequently, to develop TCAD tools for SNWT design and to model SNWT for circuit-level simulations have become increasingly important. This paper presents a circuit-compatible closed-form analytical model for ballistic SNWTs. Both the current–voltage (I–V) and capacitance–voltage (C–V) characteristics are modeled in terms of device parameters and terminal voltages. Such a model can be efficiently used in a conventional circuit simulator like SPICE to facilitate transistor-level simulation of large-scale nanowire or mixed nanowire-CMOS circuits and systems.     

A complete analytical model of GaN MESFET for microwave frequency applications

A simple physics-based analytical model for a non-self-aligned GaN MESFET suitable for microwave frequency applications is presented. The model includes the effect of parasitic source/drain resistances and the gate length modulation. The model is then extended to evaluate I–V and C–V characteristics, transconductance, cut-off frequency, transit time, RC time constant, optimum noise figure and maximum power density. The transconductance of about 21 mS/mm is obtained for GaN MESFET using the present theory in comparison to 23 mS/mm of the reported data. The cut-off frequency of more than 1 GHz, optimum noise figure of 6 dB and maximum output power density of more than 1 W/mm are predicted.     

Design optimization of stacked layer dielectrics for minimum gate leakage currents

An effective model to evaluate the leakage currents for different stacked gates deep submicron MOS transistors is presented. For a given equivalent oxide thickness of a stacked gate, the gate leakage current decreases with an increase of high-k dielectric thickness or a decrease of interlayer thickness. Turning points at high gate biases of the I–V curves are observed for Si₃N₄/SiO₂, Ta₂O₅/SiO₂, Ta₂O₅/SiO_2−yN_y, Ta₂O₅/Si₃N₄, and TiO₂/SiO₂ stacked gates except for Al₂O₃/SiO₂ structure. Design optimization for the stacked gate architecture to obtain the minimum gate leakage current is evaluated.     

Procedure for determining diode parameters at very low forward voltage

A technique is proposed to extract the reverse saturation current parameter and ideality factor of semiconductor junctions from the low forward voltage region of the device’s characteristics. The method involves performing a mathematical operation on the experimental data that allows to calculate the parameters at values of forward current smaller than the reverse saturation current. The procedure was tested and its accuracy verified on synthetic I–V characteristics, with and without added simulated experimental error or noise. Good agreement is obtained between the parameters used in modeling and the extracted values. The procedure was also applied to experimentally measured I_B–V_BE characteristics of a real power BJT.