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1.
Diameter-dependent compositions of Si(1-x)Ge(x) nanowires grown by a vapor-liquid-solid mechanism using SiH(4) and GeH(4) precursors are studied by transmission electron microscopy and X-ray energy dispersive spectroscopy. For the growth conditions studied, the Ge concentration in Si(1-x)Ge(x) nanowires shows a strong dependence on nanowire diameter, with the Ge concentration decreasing with decreasing nanowire diameter below approximately 50 nm. The size-dependent nature of Ge concentration in Si(1-x)Ge(x) NWs is strongly suggestive of Gibbs-Thomson effects and highlights another important phenomenon in nanowire growth.  相似文献   

2.
One of the main requirements for Si-based ultrasmall device is atomic-order control of process technology. Here, we show the concept of atomically controlled processing for group IV semiconductors based on atomic-order surface reaction control in Si-based CVD epitaxial growth. Self-limiting formation of 1-3 atomic layers of group IV or related atoms after thermal adsorption and reaction of hydride gases on Si(1-x)Gex(100) (x = 0-1) surface are generalized based on the Langmuir-type model. Moreover, Si-based epitaxial growth on N, P or C atomic layer formed on Si(1-x)Gex(100) surface is achieved at temperatures below 500 degrees C. N atoms of about 4 x 10(14) cm(-2) are buried in the Si epitaxial layer within about 1 nm thick region. In the Si(0.5)Ge(0.5) epitaxial layer, N atoms of about 6 x 10(14) cm(-2) are confined within about 1.5 nm thick region. The confined N atoms in Si(1-x)Gex preferentially form Si-N bonds. For unstrained Si cap layer grown on top of the P atomic layer formed on Si(1-x)Gex(100) with P atomic amount of below about 4 x 10(14) cm(-2) using Si2H6 instead of SiH4, the incorporated P atoms are almost confined within 1 nm around the heterointerface. It is found that tensile-strain in the Si cap layer growth enhances P surface segregation and reduces the incorporated P atomic amount around the heterointerface. Heavy C atomic-layer doping suppresses strain relaxation as well as intermixing between Si and Ge at the nm-order thick Si(1-x)Gex/Si heterointerface. These results open the way to atomically controlled technology for ULSIs.  相似文献   

3.
High-quality single-crystalline Ge nanowires with electrical properties comparable to those of bulk Ge have been synthesized by vapor-liquid-solid growth using Au growth seeds on SiO(2)/Si(100) substrates and evaporation from solid Ge powder in a low-temperature process at crucible temperatures down to 700?°C. High nanowire growth rates at these low source temperatures have been identified as being due to sublimation of GeO from substantial amounts of GeO(2) on the powder. The Ge nanowire synthesis from GeO is highly selective at our substrate temperatures (420-500?°C), i.e., occurs only on Au vapor-liquid-solid growth seeds. For growth of nanowires of 10-20?μm length on Au particles, an upper bound of 0.5?nm Ge deposition was determined in areas of bare SiO(2)/Si substrate without Au nanoparticles.  相似文献   

4.
The Ga(x)In(1-x)Sb ternary system has many interesting material properties, such as high carrier mobilities and a tunable range of bandgaps in the infrared. Here we present the first report on the growth and compositional control of Ga(x)In(1-x)Sb material grown in the form of nanowires from Au seeded nanoparticles by metalorganic vapor phase epitaxy. The composition of the grown Ga(x)In(1-x)Sb nanowires is precisely controlled by tuning the growth parameters where x varies from 1 to ~0.3. Interestingly, the growth rate of the Ga(x)In(1-x)Sb nanowires increases with diameter, which we model based on the Gibbs-Thomson effect. Nanowire morphology can be tuned from high to very low aspect ratios, with perfect zinc blende crystal structure regardless of composition. Finally, electrical characterization on nanowire material with a composition of Ga(0.6)In(0.4)Sb showed clear p-type behavior.  相似文献   

5.
Zhao Y  Smith JT  Appenzeller J  Yang C 《Nano letters》2011,11(4):1406-1411
Appropriately controlling the properties of the Si shell in Ge/Si core/shell nanowires permits not only passivation of the Ge surface states, but also introduces new interface phenomena, thereby enabling novel nanoelectronics concepts. Here, we report a rational synthesis of Ge/Si core/shell nanowires with doped Si shells. We demonstrate that the morphology and thickness of Si shells can be controlled for different dopant types by tuning the growth parameters during synthesis. We also present distinctly different electrical characteristics that arise from nanowire field-effect transistors fabricated using the synthesized Ge/Si core/shell nanowires with different shell morphologies. Furthermore, a clear transition in the modification of device characteristics is observed for crystalline shell nanowires following removal of the shell using a unique trimming process of successive native oxide formation/etching. Our results demonstrate that the preferred transport path through the nanowire structure can be modulated by appropriately tuning the growth conditions.  相似文献   

6.
Yang JE  Jin CB  Kim CJ  Jo MH 《Nano letters》2006,6(12):2679-2684
We report the energy band-gap modulation of single-crystalline Si1-xGex (0 相似文献   

7.
Integrated freestanding single-crystal silicon nanowires with typical dimension of 100 nm × 100 nm × 5 μm are fabricated by conventional 1:1 optical lithography and wet chemical silicon etching. The fabrication procedure can lead to wafer-scale integration of silicon nanowires in arrays. The measured electrical transport characteristics of the silicon nanowires covered with/without SiO(2) support a model of Fermi level pinning near the conduction band. The I-V curves of the nanowires reveal a current carrier polarity reversal depending on Si-SiO(2) and Si-H bonds on the nanowire surfaces.  相似文献   

8.
The bare and hydrogen-passivated ZnSe/Si bi-coaxial nanowire heterostructures along [110] direction have been investigated by using the first-principle calculations within density functional theory. The structural stability and electronic property of ZnSe/Si bi-coaxial nanowire heterostructures have been shown by changing the Si components. It is found that the ZnSe/Si nanowires have zero gaps at lower Si components, and then they have the increasing gap at higher Si components. It is seen clearly that there is the transition of band gap form zero to nonzero. With increasing Si components, the ZnSe/Si nanowires can be also achieved as n-type or p-type, in agreement qualitatively with the experimental observations. In addition, the structural stabilities and the cohesive energies of ZnSe/Si bi-coaxial nanowires are changed obviously with the different Si components.  相似文献   

9.
Vapor-liquid-solid (VLS) nanowires (NWs) typically grow in [111] directions. Previously, the authors have demonstrated guided Si NW growth, engineering the VLS NWs to grow in a [110] direction against a SiO(2) surface. In this work, the authors demonstrate guided high-quality Ge nanowire growth against a SiO(2) surface in the substrate plane to bridge between two Si mesas. The authors explore the interfaces between a Ge NW and the two Si device-layer mesas and report high-quality, epitaxial interfaces between the Ge NW and both Si mesas.  相似文献   

10.
Here, we report the synthesis of Si(x)Ge(1-x) nanowires with x values ranging from 0 to 0.5 using bulk nucleation and growth from larger Ga droplets. Room temperature Raman spectroscopy is shown to determine the composition of the as-synthesized Si(x)Ge(1-x) nanowires. Analysis of peak intensities observed for Ge (near 300 cm(-1)) and the Si-Ge alloy (near 400 cm(-1)) allowed accurate estimation of composition compared to that based on the absolute peak positions. The results showed that the fraction of Ge in the resulting Si(x)Ge(1-x) alloy nanowires is controlled by the vapor phase composition of Ge.  相似文献   

11.
In this work, we fabricated an Si(1-x)Ge(x) nanowire (NW) metal-oxide-semiconductor field-effect transistor (MOSFET) by using bottom-up grown single-crystal Si(1-x)Ge(x) NWs integrated with HfO(2) gate dielectric, TaN/Ta gate electrode and Pd Schottky source/drain electrodes, and investigated the electrical transport properties of Si(1-x)Ge(x) NWs. It is found that both undoped and phosphorus-doped Si(1-x)Ge(x) NW MOSFETs exhibit p-MOS operation while enhanced performance of higher I(on)~100?nA and I(on)/I(off)~10(5) are achieved from phosphorus-doped Si(1-x)Ge(x) NWs, which can be attributed to the reduction of the effective Schottky barrier height (SBH). Further improvement in gate control with a subthreshold slope of 142?mV?dec(-1) was obtained by reducing HfO(2) gate dielectric thickness. A comprehensive study on SBH between the Si(1-x)Ge(x) NW channel and Pd source/drain shows that a doped Si(1-x)Ge(x) NW has a lower effective SBH due to a thinner depletion width at the junction and the gate oxide thickness has negligible effect on effective SBH.  相似文献   

12.
We report on the effect of germanium (Ge) coatings on the thermal transport properties of silicon (Si) nanowires using nonequilibrium molecular dynamics simulations. Our results show that a simple deposition of a Ge shell of only 1 to 2 unit cells in thickness on a single crystalline Si nanowire can lead to a dramatic 75% decrease in thermal conductivity at room temperature compared to an uncoated Si nanowire. By analyzing the vibrational density states of phonons and the participation ratio of each specific mode, we demonstrate that the reduction in the thermal conductivity of Si/Ge core-shell nanowire stems from the depression and localization of long-wavelength phonon modes at the Si/Ge interface and of high frequency nonpropagating diffusive modes.  相似文献   

13.
For this investigation of the Ge behavior of condensed Si(1-y)Ge(y) (y > x) cores during the oxidation of Si(1-x)Ge(x) nanowires, Si(1-x)Ge(x) nanowires were grown in a tube furnace by the vapor-liquid-solid method and thermally oxidized. The test results were characterized using several techniques of transmission electron microscopy. The two types of Ge condensation are related to the diameter and Ge content of the nanowires. The consumption of Si atoms in prolonged oxidation caused the condensed SiGe cores to become Ge-only cores; and the continuous oxidation resulted in the oxidation of the Ge cores. The oxidation of Ge atoms was confirmed by scanning transmission electron microscopy.  相似文献   

14.
Carbon-containing alloy materials such as Ge(1-x)C(x) are attractive candidates for replacing silicon (Si) in the semiconductor industry. The addition of carbon to diamond lattice not only allows control over the lattice dimensions, but also enhances the electrical properties by enabling variations in strain and compositions. However, extremely low carbon solubility in bulk germanium (Ge) and thermodynamically unfavorable Ge-C bond have hampered the production of crystalline Ge(1-x)C(x) alloy materials in an equilibrium growth system. Here we successfully synthesized high-quality Ge(1-x)C(x) alloy nanowires (NWs) by a nonequilibrium vapor-liquid-solid (VLS) method. The carbon incorporation was controlled by NW growth conditions and the position of carbon atoms in the Ge matrix (at substitutional or interstitial sites) was determined by the carbon concentration. Furthermore, the shrinking of lattice spacing caused by substitutional carbon offered the promising possibility of band gap engineering for photovoltaic and optoelectronic applications.  相似文献   

15.
Magnesium and Cadmium doped ZnO nanowires were successfully grown by Chemical Vapor deposition method in a tube furnance. Photoluminescence spectra show that the band gap of ZnO nanowire has been tuned from 4.00 eV to 2.08 eV by Magnesium and Cadmium doping. Transmission Electron Microscopy and X-ray diffraction characterization analysis indicate that most of the formed nanowires are single crystalline with good quality. Zn(1-x)Cd(x)O nanowire sample was used for heterojunctional light emitting diode fabrication. Electroluminescence measurement yields a strong emission peak at 553 nm from the Zn(1-x)Cd(x)O nanowire.  相似文献   

16.
采用非平衡分子动力学方法模拟了Si纳米线、Ge纳米线、核-壳结构的Si/Ge纳米线及超晶格结构的Si/Ge纳米线的导热系数,给出了纳米线的温度与导热系数关系曲线,对比了几种纳米线导热特性的差异,研究结果表明,随着温度的升高,各纳米线的导热系数降低;相同温度下,纳米线导热系数的大小顺序为:核-壳结构的Si/Ge纳米线、超晶格结构的Si/Ge纳米线、Si纳米线、Ge纳米线。  相似文献   

17.
Vapour‐liquid‐solid (VLS) techniques are popular routes for the scalable synthesis of semiconductor nanowires. In this article, in‐situ electron microscopy is used to correlate the equilibrium content of ternary (Au0.75Ag0.25–Ge and Au0.65Ag0.35–Ge) metastable alloys with the kinetics, thermodynamics and diameter of Ge nanowires grown via a VLS mechanism. The shape and geometry of the heterogeneous interfaces between the liquid eutectic and solid Ge nanowires varies as a function of nanowire diameter and eutectic alloy composition. The behaviour of the faceted heterogeneous liquid–solid interface correlates with the growth kinetics of the nanowires, where the main growth facet at the solid nanowire–liquid catalyst drop contact line lengthens for faster nanowire growth kinetics. Pronounced diameter dependent growth kinetics, as inferred from liquid–solid interfacial behaviour, is apparent for the synthesised nanowires. Direct in‐situ microscopy observations facilitates the comparison between the nanowire growth behaviour from ternary (Au–Ag–Ge) and binary (Au–Ge) eutectic systems.  相似文献   

18.
Jung Y  Nam SW  Agarwal R 《Nano letters》2011,11(3):1364-1368
By combining high-resolution transmission electron microscopy (HRTEM) characterization and electrical measurements on a unique device platform, we study the reversible electrically-driven phase-change characteristics of self-assembled Ge(2)Sb(2)Te(5) nanowires. Detailed HRTEM analyses are used to correlate and understand the effect of full and intermediate structural transformations on the measured electrical properties of the nanowire devices. The study demonstrates that our unique approach has the potential to provide new information regarding the dynamic structural and electrical states of phase-change materials at the nanoscale, which will aid the design of future phase-change memory devices.  相似文献   

19.
Amato M  Ossicini S  Rurali R 《Nano letters》2011,11(2):594-598
Impurity doping of semiconducting nanowires has been predicted to become increasingly inefficient as the wire diameter is reduced, because impurity states get deeper due to quantum and dielectric confinement. We show that efficient n- and p-type doping can be achieved in SiGe core-shell nanowires as thin as 2 nm, taking advantage of the band offset at the Si/Ge interface. A one-dimensional electron (hole) gas is created at the band-edge and the carrier density is uniquely controlled by the impurity concentration with no need of thermal activation. Additionally, SiGe core-shell nanowires provide naturally the separation between the different types of carriers, electron and holes, and are ideally suited for photovoltaic applications.  相似文献   

20.
In this work high quality crystalline In(1_x)Sb(x) nanowires (NWs) are synthesized via a template-based electrochemistry method. Energy dispersive spectroscopy studies show that composition modulated In(1-x)Sb(x) (x approximately 0.5 or 0.7) nanowires can be attained by selectively controlling the deposition potential during growth. Single In(1-x)Sb(x) nanowire field effect transistors (NW-FETs) are fabricated to study the electrical properties of as-grown NWs. Using scanning gate microscopy (SGM) as a local gate the I(ds)-V(ds) characteristics of the fabricated devices are modulated as a function of the applied gate voltage. Electrical transport measurements show n-type semiconducting behavior for the In0.5Sb0.5 NW-FET, while a p-type behavior is observed for the In0.3Sb0.7 NW-FET device. The ability to grow composition modulated In(1-x)Sb(x) NWs can provide new opportunities for utilizing InSb NWs as building blocks for low-power and high speed nanoscale electronics.  相似文献   

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