共查询到19条相似文献,搜索用时 78 毫秒
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单晶硅硬度压痕裂纹的特征 总被引:2,自引:0,他引:2
单晶硅硬度压痕裂纹的特征蔡传荣张琼(福州大学,福州350002)单晶硅是电脑、光纤通信等重要材料,其表面受接触载符作用而容易损伤、产生裂纹直至破碎。为工程设计选材需要,国内外学者对其接触损伤有过研究[1][2],本文用扫描电镜观察单晶硅显微硬度压痕裂... 相似文献
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压痕诱发单晶硅非晶化相变的透射电镜观察 总被引:1,自引:0,他引:1
晶体硅在高压下会发生相变[1]。显微压痕实验能够产生极大的压强(GPa级),有可能诱发硅的相变[2]。Clarke等人首次利用透射电子显微镜(TEM)在微观尺度上给出了单晶硅上维氏显微压痕的平视形貌像(plan-view)[3],指出压痕中心已经发生... 相似文献
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本文叙述了p型及n型硅材料杂质补偿度确定的各种方法,并评述了各种方法的实验条件及其优缺点,还指出了目前我国各单位采取的简单而较可靠的方法。 相似文献
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本文报道了ZrO2薄膜横断截面的透射电镜观察结果。ZrO2薄膜通过射频磁控溅射法制备,电镜观察表明,薄膜致密均匀,呈柱状晶生长,通过电子衍射和X光衍射实验确定。为面心立方多晶膜,此外,通过对高分辨电子显微象的观察与分析,对薄膜的形成机理进行了初步探讨。 相似文献
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Polishing behaviors of single crystalline ceria abrasives on silicon dioxide and silicon nitride CMP 总被引:1,自引:0,他引:1
The effects of single crystalline ceria (CeO2) abrasives in chemical mechanical polishing (CMP) slurries were investigated for silicon dioxide (SiO2) and silicon nitride (Si3N4) CMP process. The size of ceria abrasives was controlled by varying hydrothermal reaction conditions. Polishing removal rate was measured with four slurries, with different mean primary particle size of 62, 116, 163 and 232 nm. The polishing results showed that the single crystalline ceria abrasives were not easily broken-down by mechanical force during CMP process. It was found that the removal rate of oxide and nitride film strongly depend upon abrasive size, whereas the surface uniformity deteriorates as abrasive size increases. The observed polishing results confirmed that there exists an optimum abrasive size (163 nm) for maximum removal selectivity between oxide and nitride films. The polishing behavior of the single crystalline ceria abrasives was discussed in terms of morphological properties of the abrasive particle. 相似文献
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《Microelectronics Journal》2007,38(6-7):722-726
Nanoindentation-induced phase transformation in both crystalline silicon (c-Si) and relaxed amorphous silicon (a-Si) have been studied. A series of nanoindentations were made with a sharp diamond Berkovich tip. During nanoindentations, maximum loads were applied from 1000 to 6000 μN, with a 1000 μN/s loading rate. A slow unloading rate at 100 μN/s was chosen to favor the formation of the high-pressure polycrystalline phases (Si-III and Si-XII). A fast unloading rate within 1 s was used to obtain a-Si end phase. The nanoindentation behavior and the structure of deformation regions were examined by load–depth characteristics curves and Raman. Large differences were observed between the transformation behavior in c-Si and that in relaxed a-Si. Indentation curves in c-Si present plastic deformation curves with elbow (no pop-out) on the unloading curves, even for loads up to 9000 μN. On the other hand, indentations in relaxed a-Si give rise to the same plastic deformation as c-Si at low loads (1000–2000 μN), whereas show clear pop-outs at high loads (above 3000 μN). Raman results suggest that high-pressure phases (HPPs) can occur more easily within a relaxed a-Si matrix than in a c-Si matrix. The results suggest a significantly different indentation behavior and phase transformation sequence in c-Si and relaxed a-Si at the nanoscale. 相似文献
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《Electron Devices, IEEE Transactions on》1979,26(11):1728-1734
Hydrogenated amorphous silicon, a-Si:H, is shown to be an excellent passivant for crystalline silicon (c-Si) p-n junctions. A two-orders-of-magnitude reduction in reverse leakage current from that of a typical thermal oxide passivated junction is obtained. This is achieved through a lowering of the interface state density by hydrogenation of the c-Si surface. Superior bias-temperature stability of the passivated junctions also is observed. There is evidence that the hydrogen in the bulk of the a-Si:H can act as a hydrogen reservoir for rehydrogenation of the interface between c-Si and a-Si:H. Thermal stability of the a-Si:H is adequate for temperatures up to 500°C for 30 min, which is sufficient for most device-processing requirements. Above 550°C, significant dehydrogenation from both the interface and the bulk a-Si:H regions and an increase in leakage are observed. The passivation properties were assessed through studies of the current-voltage and current-temperature characteristics of the p-n junctions. 相似文献
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《电子元件与材料》2015,(10):43-47
利用Silvaco-TCAD仿真软件全面系统地分析了发射区表面浓度(cE)、结深(xj)及发射区覆盖比率(EF)对P型前结背接触晶硅太阳电池输出特性的影响。结果表明:基于常规低成本P型晶硅衬底(利用直拉法生长,电阻率为1.5?·cm,少子寿命为10μs)的前结背接触太阳电池,其上表面发射区表面浓度及结深对太阳电池的输出特性产生显著影响。上表面发射区表面浓度和结深越大,短波入射光外量子效率越小。当上表面发射区表面浓度为1×1019 cm–3,结深为0.2μm时,电池效率高达20.72%。侧面和下表面发射区表面浓度及结深对太阳电池输出特性的影响较小。但侧面和下表面发射区覆盖比率对太阳电池的输出特性产生显著影响。侧面和下表面发射区覆盖比率越大,太阳电池外量子效率和转换效率越高。 相似文献
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O. Breitenstein J. P. Rakotoniaina M. H. Al Rifai M. Werner 《Progress in Photovoltaics: Research and Applications》2004,12(7):529-538
Nine different types of shunt have been found in state‐of‐the‐art mono‐ and multicrystalline solar cells by lock‐in thermography and identified by SEM investigation (including EBIC), TEM and EDX. These shunts differ by the type of their I–V characteristics (linear or nonlinear) and by their physical origin. Six shunt types are process‐induced, and three are caused by grown‐in defects of the material. The most important process‐induced shunts are residues of the emitter at the edge of the cells, cracks, recombination sites at the cell edge, Schottky‐type shunts below grid lines, scratches, and aluminum particles at the surface. The material‐induced shunts are strong recombination sites at grown‐in defects (e.g., metal‐decorated small‐angle grain boundaries), grown‐in macroscopic Si3N4 inclusions, and inversion layers caused by microscopic SiC precipitates on grain boundaries crossing the wafer. Copyright © 2004 John Wiley & Sons, Ltd. 相似文献
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L. Stalmans J. Poortmans H. Bender M. Caymax K. Said E. Vazsonyi J. Nijs R. Mertens 《Progress in Photovoltaics: Research and Applications》1998,6(4):233-246
Crystalline silicon (c-Si) is the dominant semiconductor material in use for terrestrial photovoltaic cells and a clear tendency towards thinner, active cell structures and simplified processing schemes is observable within contemporary c-Si photovoltaic research. The potential applications of porous silicon and related benefits are reviewed. Specific attention is given to the different porous silicon formation processes, the use of this porous material as anti-reflection coating in simplified processing schemes and for simple selective emitter processes and its light trapping and surface passivating capabilities, which are required for advantageous use in thin active cell structures. Our analysis of internal quantum efficiency data obtained on both conventional and thin-film c-Si solar cells has been performed with the aim of describing the light diffusing behaviour of porous Si as well as investigating the surface passivating capabilities. An effective entrance angle of 60° is derived, which corresponds to totally diffuse isotropic light, and the importance of a correction for absorption losses in the porous layer is illustrated. Furthermore, photoconductivity decay measurements of freshly etched porous Si on float-zone p-type Si indicate a strong bias-light dependency and a fast degradation of the surface recombination velocity. © 1998 John Wiley & Sons, Ltd. 相似文献
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碳化硅晶须抗氧化性能的TEM研究 总被引:1,自引:0,他引:1
碳化硅是最好的晶须材料之一,在用碳热还原法合成碳化硅纳米晶须时,原料中碳往往过量10wt.%左右。碳过量有利于碳化硅纳米晶须的形成和产率的提高,过量的碳一般采用在空气中高温氧化的方法除去。碳化硅纳米晶须抗氧化性能的好坏,直接影响到脱碳温度和时间的选择,以达到既除去样品中的碳又防止碳化硅纳米晶须大量氧化的目的。本文利用透射电子显微镜对碳化硅纳米晶须的抗氧化性能进行了初步研究。图1是未经空气中氧化的碳化硅纳米晶须的TEM照片,从图中可看出碳化硅纳米晶须的表面光滑,无SiO2包覆层。图2a是在500℃下恒温2h得到的碳化硅纳米… 相似文献