区块链在轨道交通边缘计算网络中的应用

多接入边缘计算（multi-access edge computing,MEC）能为城市轨道交通中的计算密集型业务和时延敏感型业务提供高质量的服务能力,然而轨道交通边缘计算网络中的大量边缘设施暴露在开放式环境中,其隐私保护和传输安全面临着很大的挑战。区块链（blockchain）具有分布式账本、共识机制、智能合约、去中心化应用等功能特性,因此,区块链技术可以为分布式轨道交通边缘计算网络构建系统性的安全防护机制,从而保障网络安全和数据安全,实现高质量的城市轨道交通服务。首先,介绍了区块链的基本概念;其次,设计了轨道交通边缘计算网络架构,提出了融合区块链的轨道交通边缘计算网络安全防护机制和应用实例;最后,对该安全防护机制面临的问题和挑战进行了分析和展望。     

区块链安全技术体系研究

区块链是一种分布式的数据库,具有去中心化和去信任化的核心特征,近年来受到高度关注,得到了广泛应用。但作为一项新兴技术,区块链同时存在不可忽视的安全风险。本文从区块链关键技术出发,提出四层技术体系,逐层分析了区块链应用面临的挑战和安全风险,并形成通用的分层安全技术体系。该安全技术体系可用于指导区块链应用建设、保障区块链应用安全和促进安全技术的进一步发展。     

区块链的支柱和权衡

区块链正成为时下炙手可热的通用技术.去中心、匿名性和防篡改三大特点构建了区块链建立信任的基石,但是在实际应用中,也需要更多的权衡考量.本文针对区块链的去中心、匿名性和防篡改三大支柱,从技术原理和实际业务两个方面,探讨了区块链技术的理想和现实.     

多核处理器核间的通信研究与实现

针对多核处理器的特点提出一种新型的异构多核DSP处理器结构。主处理器为通用处理器,作为控制密集型处理器核用于系统管理和控制;8个DSP作为计算密集型处理器核,用于大信息量融合计算。详细设计8个DSP之间的No C互连结构。首先采用2×4 2D Turos结构进行单个路由节点结构的设计,包括数据包格式、路由和仲裁设计;其次对路由节点进行编码、路由算法设计和确定节点路由方向。该结构具有总线局部通信带宽高的优点,采用No C的易扩展性和No C在各DSP之间通信的并行性使系统规模易于扩展并满足大批量数据传输要求。最后通过仿真实验,验证了该设计的有效性,为后续多核处理器的设计与实现打下坚实的技术基础。     

基于边缘计算及区块链技术的物联网系统研究

本文以物联网系统为落脚点,首先说明了传统系统的不足,以及在物联网系统中融入边缘计算及区块链技术的必要性,其次详细叙述了物联网、区块链和边缘计算的融合方法,最后立足相关技术,围绕基于边缘人工智能计算及区块链技术的物联网系统的应用场景展开了讨论,并对现存问题和发展趋势进行了分析,供相关人员参考。     

区块链基础设施安全分析与防护

随着区块链技术在金融、物流、溯源、医疗、交通等不同领域的应用探索,区块链基础设施系统的基础性和重要性日益凸显。区块链基础设施系统为区块链应用提供计算、存储、网络、通信等区块链基础资源和服务,其安全性也成为确保上层区块链业务和应用安全的根本保障。文章概述区块链的发展历程以及区块链基础设施的核心技术,分析其面临的传统和特有的安全风险,并提出相应的区块链基础设施安全防护操作建议,以推动区块链基础设施的安全可靠发展。     

基于5G+MEC的区块链规模化部署探索

梳理了区块链技术自概念诞生以来到应用部署落地的发展历程,分别从计算存储资源、互联互通、数据同步和监管等方面分析了目前区块链在规模化应用落地过程中面临的实际问题,并提出基于5G+MEC的区块链规模化部署方案,设计了纵向分层多级、横向动态分片的区块链规模化部署架构,分析了5G+MEC网络对解决区块链规模化部署中计算存储资源、实现互联互通、提高消息数据同步效率、改善监管能力等问题的技术优势。     

区块链技术在物联网中应用研究

区块链技术在物联网中的应用在很大程度上缓解了数据隐私、网络安全等现象,为了拓展区块链技术的应用,需要相关人员重视技术研究。本文阐述了区块链技术概述、区块链技术在物联网中的应用、针对物联网的区块链底层技术研究以及区块链为物联网带来的诸多挑战,希望能够促进区块链技术的应用,从而创造更大的效益。     

区块链技术赋能卫星产业：优势、挑战与对策

作为数字货币的底层技术,区块链具有去中心化、集体维护、数据不可篡改和可追溯等特性,被认为在很多领域具有广泛的应用前景。卫星产业作为战略性新兴产业,其安全可靠、互联互通和隐私保护等需求,与区块链的核心特性天然吻合。当前区块链技术在卫星产业中的应用尚处于起步阶段,鲜有学者对区块链技术和卫星产业的集成应用进行探讨。通过系统阐述区块链技术的基本原理,对区块链技术当前在卫星产业中的研究现状进行了全面的总结。分析了区块链技术在卫星产业中最有潜力的3个应用场景,重点阐述了区块链在其中所发挥的功能和优势。提出了区块链技术应用于卫星产业需面临的挑战,并给出了解决思路,以为将来区块链技术在卫星产业中的深入应用提供参考。     

基于区块链的无人机群军事应用研究

介绍了区块链的技术特点和在无人机群军事应用上的技术优势,提出了面向无人机群军事应用的区块链体系架构。对基于区块链的无人机群军事应用研究现状做了全面梳理,并分析了当前区块链技术在无人机群军事应用上的挑战和解决方案,为未来无人机群基于区块链技术的军事化应用提供了研究思路。     

Energy-Delay-FIT Product to compare processors and algorithm implementations

We propose an extension to the Energy-Delay-Product (EDP) metric to compare different processors considering not only their energy consumption and execution time but also reliability. The Energy-Delay-FIT Product (EDFP) allows a pragmatic evaluation of the most suitable device to run an application.We consider three representative benchmarks and apply EDFP to compare Intel Xeon-Phi co-processors, NVIDIA K40 Graphics Processing Units (GPUs), and AMD Kaveri Accelerated Processing Units (APUs). Our results show that HPC processors have higher power consumption and are more prone to be corrupted than APUs. However, the overall trade-off is attenuated by HPC processors efficiency, which makes them the most suitable candidates for the great majority of the considered applications.Additionally, we use EDFP to compare optimized and naive implementations of three benchmarks as executed on NVIDIA GPUs. Our results show that the naive implementation has generally better EDFP only for small input sizes while the optimized implementations are more efficient and reliable once the GPU resources are saturated.     

前言

人们对后3G的要求是:在全球范围内实现无缝覆盖,进行包括语音、文本、图像、视频等在内的高速多媒体通信。为此,在有限频谱资源条件下,必须缩短无线信号的传输半径,极大限度地复用频谱资源,提高单位空间的信道容量。采用各种先进的无线传输技术的无线传输网络则在中、小范围内提供高速率、高质量的无线移动通信服务。因而WLAN和WPAN的需求和应用在不断增长,超宽带(UWB,ultra wide-band)等短距离、高空间容量的技术日益兴起,成为目前无线通信领域的热点。UWB的核心是冲激无线电技术,即利用持续时间非常短(纳秒、亚纳秒级)的脉冲波形来…     

A Simple Compressive Sensing Algorithm for Parallel Many-Core Architectures

In this paper we consider the l ¹-compressive sensing problem. We propose an algorithm specifically designed to take advantage of shared memory, vectorized, parallel and many-core microprocessors such as the Cell processor, new generation Graphics Processing Units (GPUs) and standard vectorized multi-core processors (e.g. quad-core CPUs). Besides its implementation is easy. We also give evidence of the efficiency of our approach and compare the algorithm on the three platforms, thus exhibiting pros and cons for each of them.     

Platform level support for high throughput edge applications: the Twin Cities prototype

Even in the face of increasing network bandwidth, there is a desire among service providers to improve network security, availability, and performance. These improvements require increasingly complex computations on network packets. Current networking platforms cannot keep up, leading to less than desired throughput or functionality. Network processors deliver high networking throughput, but not the complex processing capabilities required. High-performance general-purpose processors deliver the complex processing needed, but not the network throughput. Combination platforms that include high-performance general-purpose CPUs and network processors hold the promise of greatly increasing platform performance, enabling desired edge application improvements. This article presents Twin Cities, a heterogeneous multiprocessor research platform we have constructed from a standard IXP1240 platform, a high-volume Intel/spl reg/ Pentium/spl reg/ III processor platform, and custom hardware. This platform provides a high-performance path (high throughput, low latency) between the two processors and presents a shared memory model to the programmer. We motivate and describe the Twin Cities platform, discuss the applications it targets, and present performance measurements.     

A framework for reconfigurable computing: task scheduling and context management-a summary

Reconfigurable computing is consolidating itself as a real alternative to ASICs (Application Specific Integrated Circuits) and general-purpose processors. The main advantage of reconfigurable computing derives from its unique combination of broad applicability, provided by the reconfiguration capability, and achievable performance, through the potential parallelism exploitation. The key aspects of the scheduling problem in a reconfigurable architecture are discussed, focusing on a task scheduling methodology for DSP and multimedia applications, as well as the context management and scheduling optimizations.     

Scenario-oriented design for single-chip heterogeneous multiprocessors

Single-chip heterogeneous multiprocessors (SCHMs) are arising to meet the computational demands of portable and handheld devices. These computing systems are not fully custom designs traditionally targeted by the design automation community, general-purpose designs traditionally targeted by the computer architecture community, nor pure embedded designs traditionally targeted by the real-time community. An entirely new design philosophy will be needed for this hybrid class of computing. The programming of the device will be drawn from a narrower set of applications with execution that persists in the system over a longer period of time than for general-purpose programming. However, the devices will still be programmable, not only at the level of the individual processing element, but across multiple processing elements and even the entire chip. The design of other programmable single chip computers has enjoyed an era where the design tradeoffs could be captured in simulators such as SimpleScalar and performance could be evaluated to the SPEC benchmarks. Motivated by this, we describe new benchmark-based design strategies for SCHMs which we refer to as scenario-oriented design. We include an example and results.     

基于Amdahl定律扩展的多核处理器性能模型研究

通过引入应用程序并行特征、通信开销、资源限制等因素,建立了基于Amdahl定律扩展的多核处理器性能模型.通过模型参数仿真,搜索面向特定应用的多核处理器设计空间,得出如下规律:增大计算核心规模可实现超线性加速比;结构应优先选择异构结构;设计多进程、大容量的共享通信区可降低核间通信开销;计算核心数目和规模由应用程序并行度和各并行部分比例及设计规模决定.     

Reconfigurable computer architectures

Reconfigurable computing is a promising approach to overcome the traditional trade-off between flexibility and performance in the design of computer architectures. Computing systems that adapt their hardware to each application can achieve the high performance of dedicated hardware while retaining the flexibility of general-purpose processors. This paper introduces to the currently taken approaches in reconfigurable computing: fine-grained and coarse-grained reconfiguration. The enabling technology is discussed, reconfiguration models and application examples are presented. Finally, topical research problems are enumerated.     

On the use of connection-oriented networks to support grid computing

The vision of grid computing is to enable an arbitrary set of general-purpose computers to be recruited dynamically and be interconnected through a general-purpose network for the parallel execution of complex programs. The scale and ubiquity of the Internet makes it the natural network of choice for grid computing. However, for some applications, rate- and delay-guaranteed communication services are needed. These needs are driving the exploration of connection-oriented (CO) optical networks as a candidate for grid computing. In this article, we consider the suitability of CO networks equipped with generalized multiprotocol label switching (GMPLS) control-plane protocols for grid computing. We identify two areas in which current GMPLS implementations need enhancements to better support the needs of grid computing. First, we note a need to improve call setup delays by several orders of magnitude. We describe our proof-of-concept prototype implementation of a hardware-accelerated RSVP-TE engine that cuts setup delays from hundreds of milliseconds (typical in current equipment) to the order of microseconds. Second, noting the availability of different types of CO networks, we present a case for enhancements to control "heterogeneous connections," that is, connections that traverse multiple types of CO networks. We describe a distributed signaling procedure for the setup of such connections.