共查询到20条相似文献,搜索用时 31 毫秒
1.
A control strategy for firing instances in pulse-width-modulated (PWM) AC voltage regulators is presented. In this type of regulator, output voltage is controlled by varying the on/off time ratios of a series-controlled switch. Using a microprocessor as a controller makes it possible to vary firing instances at will according to a predetermined timing regime. One of these regimes, proposed here, involves adjusting firing instances so that selected dominant lower-order harmonics can be eliminated. This in turn leads to improved system power factor and efficiency. The theoretical principles used in evaluating firing instances are described, and experimental results verifying the analysis are presented 相似文献
2.
An attempt is made to develop a microprocessor-based system for online monitoring of the power factor of a synchronous motor. The method is based purely on software design with the use of two resistors (of small ohmic values and high current carrying capacity) connected in series with the field circuit and load circuit, which generate the reference signals for the microprocessor. However, for mechanical loading, the resistance in the load circuit may be replaced by a torque transducer. The interesting feature of the system is its capability to characterize the status (i.e. leading, lagging, or unity) of the power factor. The system is helpful in providing necessary information for power factor corrections leading to the best utilization of the synchronous motor 相似文献
3.
Seungbae Lee Gi-Joon Nam Junseok Chae Kim H. Drake A.J. 《Very Large Scale Integration (VLSI) Systems, IEEE Transactions on》2005,13(10):1167-1178
A hybrid two-dimensional position sensing system is designed with microelectromechanical systems (MEMS) for padless mouse applications. The X/Y-axis acceleration of the user's hand movements is measured by two MEMS accelerometer devices. These acceleration values are pulsewidth modulated and converted into (X, Y) coordinates on the screen by integral operations on a microprocessor. The overall system consists of four major components: 1) MEMS accelerometers; 2) CMOS analog readout circuitry; 3) an acceleration magnitude extraction module; and 4) a 16-b RISC microprocessor. Mechanical and analog simulation shows that the designed mouse system can detect acceleration as small as 5.3 mg (g=9.8 m/s/sup 2/) with 100-kHz sampling frequency for low power consumption. 相似文献
4.
A microprocessor-based method is introduced to eliminate the DC current offset component in integral cycle-controlled resistive and inductive (RL ) loads. After choosing a suitable initial value of the triac (or thyristor) firing angle α (90° for best results), the microprocessor adjusts α, bringing it closer to the load power factor angle φ at every burst of conduction. A firing angle that is almost equal to φ is reached after few bursts. This eliminates the undesired DC current offset component. The use of the microprocessor allows a simpler and more flexible solution to the problem than conventional techniques 相似文献
5.
Penalver C. M. Peire Juan Martinez Pedro M. 《Industrial Electronics, IEEE Transactions on》1985,(3):186-191
Microprocessor control of power electronic systems offers the possibility of improvements in reliability, maintenance and servicing, and increased control flexibility. This paper describes several pulsewidth modulation (PWM) waveforms where a predetermined number of unwanted harmonics can be canceled. The advantages and disadvantages of the different methods of delaying the signals in small microprocessor controlled PWM inverter drive systems are considered. Several examples of single-phase and three-phase PWM inverters, with the laws which govern the commutation angles, output waveforms, and their respective frequency spectra are presented. 相似文献
6.
针对目前pH值监测采用传统的通信方式局限性,提出利用电力线载波技术传输pH值数据。本监测系统采用LPC2103微处理器和电力线载波通信模块作为pH值采集终端,将pH值数据通过电力线网络传输到上位机显示,实现对pH值的实时监测。 相似文献
7.
Hamann H. F. Weger A. Lacey J. A. Hu Z. Bose P. Cohen E. Wakil J. 《Solid-State Circuits, IEEE Journal of》2007,42(1):56-65
An experimental technique is presented, which allows for spatially-resolved imaging of microprocessor power (SIMP). In a first step this method utilizes infrared (IR) thermal imaging, while the processor is effectively cooled using an IR-transparent heat sink. In the second step the underlying power distribution is derived by determining the temperature fields for each individual power source on the chip. The measured chip temperature distribution is represented as a superposition of these temperature fields. The SIMP data reveals significant temporal and spatial variations of the microprocessor power/temperature distribution, which can be attributed to the circuit layout as well as to the varying utilization levels across the processor while running full workloads. In this paper we have applied the SIMP method to the dual core PowerPCtrade970MP microprocessor to measure detailed temperature and power distributions under full operating conditions. In the first part of the paper the impact of power and temperature limitations of high performance CMOS chips is discussed in detail, where we distinguish between hotspot-limited (or temperature-limited) and power-limited chips. The discussion shows the importance of temperature and power distributions for chip floor planning, layout, design and architecture. Second, we present the experimental details of the SIMP method, which is applied to the dual core PowerPC970MP to directly measure the temperature and power fields as a function of workload and frequency. A pronounced movement of the hotspot location is observed. Finally, the hotspot of a competitive microprocessor is compared by measuring temperature efficiencies (temperature increase/performance) for the same workloads and cooling conditions 相似文献
8.
9.
Jooho Song Joong-Ho Song Choy I. Ju-Yeop Choi 《Industrial Electronics, IEEE Transactions on》2001,48(5):1015-1024
In case where electronic ballast employing a valley-fill passive power-factor correction (PFC) circuit is used for feeding fluorescent tamps, a new method to reduce crest factor of the lamp current is studied in this paper. It is known that a 50% valley-fill passive PFC provided for high input power factor results in undesirable value of crest factor of the fluorescent lamp current, In order to reduce crest factor to a lower value, a pulse frequency modulation technique based on the waveform of the DC-link voltage which is predetermined by the passive PFC circuit is taken into the switching control action of the electronic ballast. An equation-based analysis between the crest factor of lamp current and the effect of varying the inverter switching frequency is comprehensively performed. Several simulation and experiment results illustrate the Effectiveness of the proposed control scheme 相似文献
10.
In this paper, a novel integrated system for a battery charger with a state-of-charge estimator is proposed. First, by using a 16-bit MC80196 microprocessor, two different methods for estimating a battery's state-of-charge are presented. Then, the current of the charger is adjusted according to the estimated result. The charger, which has a zero current switching topology, performs with both a high input power factor and a high efficiency. In addition, the microprocessor effectively integrates the charger and the state-of-charge estimator. Several experimental results validate the theoretical analysis. 相似文献
11.
This paper describes the incorporation of a microprocessor based power controller into a transistorized induction heating power supply. The use of the system is illustrated by the implementation of circuit protection and power control procedures. In the design, emphasis has been placed on the efficient use of the microprocessor, a high level of interference immunity within the system, and the provision of a fault monitoring system so that the performance of the unit can be assessed continuously. 相似文献
12.
von Kaenel V. Aebischer D. Piguet C. Dijkstra E. 《Solid-State Circuits, IEEE Journal of》1996,31(11):1715-1722
This paper describes a low-power microprocessor clock generator based upon a phase-locked loop (PLL). This PLL is fully integrated onto a 2.2-million transistors microprocessor in a 0.35-μm triple-metal CMOS process without the need for external components. It operates from a supply voltage down to 1 V at a VCO frequency of 320 MHz. The PLL power consumption is lower than 1.2 mW at 1.35 V for the same frequency. The maximum measured cycle-to-cycle jitter is ±150 ps with a square wave superposed to the supply voltage with a peak-to-peak amplitude of 200 mV and rise/fall time of about 30 ps. The input frequency is 3.68 MHz and the PLL internal frequency ranges from 176 MHz up to 574 MHz, which correspond to a multiplication factor of about 100 相似文献
13.
《Power Electronics, IEEE Transactions on》2008,23(5):2319-2327
14.
Webb C.F. Anderson C.J. Sigal L. Shepard K.L. Liptay J.S. Warnock J.D. Curran B. Krumm B.W. Mayo M.D. Camporese P.J. Schwarz E.M. Farrell M.S. Restle P.J. Averill R.M. III Slegel T.J. Houtt W.V. Chan Y.H. Wile B. Nguyen T.N. Emma P.G. Beece D.K. Ching-Te Chuang Price C. 《Solid-State Circuits, IEEE Journal of》1997,32(11):1665-1675
A microprocessor implementing IBM S/390 architecture operates in a 10+2 way system at frequencies up to 411 MHz (2.43 ns). The chip is fabricated in a 0.2-μm Leff CMOS technology with five layers of metal and tungsten local interconnect. The chip size is 17.35 mm×17.30 mm with about 7.8 million transistors. The power supply is 2.5 V and measured power dissipation at 300 MHz is 37 W. The microprocessor features two instruction units (IUs), two fixed point units (FXUs), two floating point units (FPUs), a buffer control element (BCE) with a unified 64-KB L1 cache, and a register unit (RU). The microprocessor dispatches one instruction per cycle. The dual-instruction, fixed, and floating point units are used to check each other to increase reliability and not for improved performance. A phase-locked-loop (PLL) provides a processor clock that runs at 2× the system bus frequency. High-frequency operation was achieved through careful static circuit design and timing optimization, along with limited use of dynamic circuits for highly critical functions, and several different clocking/latching strategies for cycle time reduction. Timing-driven synthesis and placement of the control logic provided the maximum flexibility with minimum turnaround time. Extensive use of self-resetting CMOS (SRCMOS) circuits in the on-chip L1 cache provides a 2.0-ns access time and up to 500 MHz operation 相似文献
15.
The measurement of the accumulated phase error of phase-locked loops (PLLs) in microprocessor systems is discussed. A system which creates controlled power supply noise and measures the PLL response is described. Examples of the use of this technique are shown for a PLL used in a 400 MHz microprocessor 相似文献
16.
Hong Chen Xu Zhang Ming Liu Wenhan Hao Chen Jia Hanjun Jiang Chun Zhang Zhihua Wang 《Analog Integrated Circuits and Signal Processing》2012,72(2):293-302
A low power system for the ligament balance measuring in Total Knee Arthroplasty is presented in this paper. The system consists two parts: a front-end Ligament Balance Measuring System (LBMS) which is inserted into the knee joint during the operation, and the display part. LBMS is comprised of a sensors array including eight precise force sensors, signal conditioning circuits that support up to 15 force sensors, a sub-threshold microprocessor, power circuits and a 433?MHz RF transceiver for data transmission. The force corresponding to its distribution is transmitted wirelessly and displayed in 3-D in real time with an accuracy of 0.049?N. The signal conditioning circuits, the sub-threshold 8?bit microprocessor and the application specific integrated circuits chip have been designed and fabricated in 0.18???m CMOS process. The tested resolution is 60.1???Vpp (1.35?g) with ±100?mVpp input. The chip can operate under 1.2 to 3.6?V voltage supply for single battery application with 116?C160???A power consumption. The testing results of the microprocessor show that the leakage power is 46?nW and the dynamic power is 385?nW @ 165?kHz with operating voltage of 350?mV. The simulation results show that the power circuits can provide the supply voltage ranging from 0.3?V to 0.6?V for the sub-threshold microprocessor. Experimental results verified the system. Some clinical experiments will be carried out in the future. 相似文献
17.
18.
19.
20.
《Advanced Packaging, IEEE Transactions on》2009,32(4):831-840