基于ADSP-TS201的多DSP并行系统

介绍了一种基于ADSP TS201的多DSP并行系统设计与实现,以及其作为软件无线电平台的实际应用。重点分析了多DSP并行系统实现中的主要关键技术,即多DSP并行网络结构的设计、并行系统的控制管理软件的实现以及并行解调处理模块的任务分配。通过具体应用说明,该多DSP并行处理系统充分地体现了软件无线电的基本思想———模块化、扩展性和软件加载能力,作为软件无线电的通用硬件处理平台具备易修改、易维护的特点。     

安捷伦公司发布大容量并行光链路

安捷伦科技公司近日宣布，推出第一种支持太比特级网络设备的表面封装并行光模块样品。这种新型并行光模块专为业内主要网络和电信设备制造商设计，用于他们所开发的超大容量、具伸缩性的太比特级交换路由器，以满足市场对网络容量不断增加的巨大需求。 此并行光模块所支持的传输距离长达600米，适用于从专用系统互连领域到外部OC-192或InfiniBand的连接，而且满足国际电工委员会视力保护修订版的要求。该模块还集成有一个散热区，有助于通过该模块周围的空气进行散热而不把热量传入电路板。 新模块也是业内第一种能与标准接插件设备兼容的球形网格阵列模块。该模块的并行光接口采用标准的MTP/MPO连接器，适合连接标准的带状光缆及易剥光缆。     

掌上电脑集成GPRS功能和RFIC模块的设计

介绍了在掌上电脑中集成ITM100双频GPRS模块和MF-500 RFIC读写模块的设计方案，将两个模块集成在一个小小的插卡中，通过掌上电脑自带的PCMCIA插槽与掌上电脑实现数据通信。由于PCMCIA接口出来的是8位并行数据，而两个模块都是用串行口发送和接收的，因此用ST16C550串并转换芯片实现他们的接口，这样也可以防止板间干扰。详细介绍了系统的硬件电路实现、掌上电脑与两个模块之间的接口方式，以及两个模块的数据格式和软件操作方法。最后给出了电磁兼容性设计的要点。     

基于FPGA超高频RFID系统并行CRC模块设计

根据CRC(循环冗余校验码)算法的原理,和ISO/IEC18000-6标准中超高频射频识别系统对校验电路的要求,分析串行CRC算法,提出了一种并行CRC算法。经Verilog-HDL语言编写该算法程序,在QuartusⅡ9.0软件上仿真。最终给出仿真结果以及并行CRC生成模块和校验模块,仿真结果证明并行CRC算法有效提高了系统中数据的处理速度。     

用CPLD提高解码系统的运行速度

介绍了一种用并行方法提高系统运行速度的方法——复杂可编程逻辑器件CPLD在解码系统中的应用，本系统利用了CPLD易于实现控制逻辑的特点，产生并行逻辑实现并行工作，达到了提高了解码系统的运行速度、可靠性及系统的稳定性的目的。     

简讯

安捷伦与康宁合作提供最新的并行光纤解决方案近日 ,安捷伦科技公司与康宁光缆系统宣布 ,双方已经达成一项协议 ,将为通信市场大批量提供最新的并行光纤解决方案。根据协议条款 ,安捷伦和康宁光缆系统将密切合作 ,促进并行光纤技术在通信市场上被更多地接受和采用。两家公司将共同努力 ,为双方的客户战略性地提供康宁光缆系统的无源光纤技术和安捷伦科技的有源并行光纤模块。除协助部署ＣｏｒｎｉｎｇＩｎｆｉｎｉＣｏｒ多模光纤和３０Ｇｂｉｔ／ｓ光纤模块外 ,康宁光缆系统和安捷伦还将联手推广和支持并行光纤解决方案。并行光纤器件主要用…     

单片机系统与标准PC键盘的接口模块设计

本文介绍了一种单片机系统与标准PC键盘接口模块，并详细介绍了该模块的工作原理与软件编程思想。     

嵌入式软件系统的一种层次设计方法

嵌入式软件系统一般由实时操作系统、应用层软件及硬件驱动软件等部分构成。本文提出了一种应用在嵌入式软件系统开发中的层次设计方法，采用模块化的软件设计思想，将嵌入式软件系统分为不同的功能模块，不同的软件模块负责不同的功能。设计的总体原则是使嵌入式软件系统具有易移植、可复用、与平台无关等特点。这样可以满足现代大规模软件开发的需求，缩短软件的开发时间，便于软件的管理和控制，从而大大提高软件的质量。     

JPEG2000算术编码的VHDL描述与验证

使用VHDL语言描述了下一代静止图像压缩标准JPEG2000编码系统中的关键模块——算术编码模块。在Model-Sim软件中进行了功能仿真，在QuartusⅡ软件中综合通过。对相同的文件进行编码，该VHDL程序执行时间仅为Jasper软件执行时间的40％，因而，大大提高了算术编码的效率。     

一种用于测控系统的实时集群计算机的构建

可扩展的并行计算机正广泛地应用于需要高性能，高可靠性的应用领域，集群并行计算机的诞生被誉为并行计算机工业的一次革命，针对测控系统应用，文章采用设备构建了实时集群计算机系统，分别从硬件和软件两个角度出发介绍了实时集群计算机的体系结构，并着重讨论了实时集群计算机的实时性和可靠性。     

数据采集及传输处理系统

为了方便地在现场监控电压或电流信号，显示出相应数值并预警出现问题的信号，很有必要设计一个低成本、观察方便、操作简易的处理系统。提出了基于数字采集及传输处理系统的基本设计思想，包括A／D转换器与单片机的接口实现，MAX485的串口传输原理及并口驱动LED等，设计出了完整的电路结构与实现软件。为了编程方便及易于调试，采用C语言作为软件编程语言，开发环境是Keil软件。     

一种实时系统中的信号处理实现

近年来,对实时信号处理系统的要求越来越高,所用系统要具有处理大量数据的能力。这就要求系统硬件运算速度快,软件处理程序尽可能优化,以保证系统的实时性。基于某重点工程项目,采用FPGA（现场可编程门阵列）和ADSP—TS101S系统,对高速实时并行处理进行研究,介绍了一种高速数据并行处理系统,说明了DSP（数字信号处理器）中信号处理程序的操作流程。该系统能对输入信号的频谱进行分析,实时输出连续波频谱或脉冲波的时域频域信息．并已测试成功。     

The use of minicomputers in racetrack totalisator systems

A racetrack totslisator is described which is capable of processing 300 bets/s from up to 1000 ticket-issuing machines. The system contains minicomputers which provide high-reliability low-cost computing power, capable of supporting the requirements of any racetrack in the United States or Canada. The computers are duplexed. Both computers process every bet and operator action. Either computer can continue processing if the other fails. The software provides extensive error checking of all hardware components. All bets are logged to magnetic tape, which can be used to restart the system in case of a system "blow." The real-time program was written in machine language and a specially developed higher level language. The master file contains 35 000 instructions. A typical program may contain 20 000 words of program and data tables. An off-Hne program is used to generate individual systems, tailored to the requirements of specific racetracks.     

A CAD environment for Real-time DSP implementations on multiprocessors

A software environment designed to support the real-time implementation of Digital Signal Processing (DSP) applications onto multiple programmable processors is described. The system, called McDAS, allows a designer to program his application as he would on a single processor, using a high level signal-flow DSP language. The program is then automatically scheduled and compiled onto a target multiprocessor. The environment allows the scheduler to be invoked with different numbers of processors and multiprocessor topology to explore various implementations. McDAS maximizes the computational throughput by exploiting pipelining, retiming, and parallel execution under the architectural constraints. The code generator is retargetable to different multiprocessor architectures as well as core processors. Data buffers and synchronizations are automatically inserted to ensure correct execution. The final implementation can be used for simulation speedup or real-time processing.     

实时图像处理并行操作系统的微内核设计和实现

本文主要设计和实现了运行在数字信号处理阵列上支持中高层图像处理的实时图像处理并行操作系统（ＲＴＩＰＰＯＳ）微内核，该内核提供了任务分解模型，并发进程管理，支持局部消息传递，同步，设计了快速共享消息传递方式和它辅助性能，内核原语支持ＰＯＳＩＸ系统调用的Ｃ语言接口和抽象级的用户封装，有行为的高效性和预测性，本文是对ＲＴＩＰＰＯＳ微内核设计的综述。     

Software Structure of No. 5 ESS--A Distributed Telephone Switching System

Most stored program controlled telephone switching systems are designed with centralized control architectures. Evolving processor technology and requirements of smooth growth over a wide size range have led system designers to take advantage of distributed processing architectures. This paper provides a conceptual framework for software partitioning on a distributed stored-program controlled switching system and discusses the resulting software structure as present in No. 5 ESS. To facilitate the software development process, a methodology based on current software engineering principles is employed. Sufficiently decoupled software components have expedited parallel development of software and provided reliability by reducing interaction and limiting propagation of errors among software components. The structuring strategy described for telephone switching is equally applicable to other distributed real-time control systems.     

基于DSP的4/πQPSK调制解调器的设计

QPSK调制解调器与具有强大数字信号处理功能的DSP芯片相结合,实现了调制解调的高效实时处理。系统采用TI公司的TMS320C5409为核心处理器,设计了硬件电路系统的3个主要模块,包括A/D转换模块,程序存储器模块和数据存储器模块。将一种简单高效的定时同步算法——最大平均功率定时同步算法引入到系统的解调设计中,以提高定时同步的运算速度和准确性。系统软件采用汇编语言编写,并通过CCS软件仿真,结果证明该算法能够完成4/πQPSK调制解调的全部功能,且具有体积小、功耗低、集成度高、软件可移植性强等优点。     

并行算法在软件无线电多DSP平台的应用

近年来，随着软件无线电的发展，用于软件无线电平台中的多DSP并行结构受到越来越多的关注，因为这种结构能提高数字信号处理的速度。提出了一种适合在该平台上并行运算的算法，以多阶FIR滤波器为例，验证了算法，并探讨算法的性能，给出了该算法在多处理器条件下，与单处理器处理结果的比较。对选取合适的软件无线电中频处理多处理器平台具有一定的参考价值，并对舰载软件无线电的实现提供了科学参考。     

Implementation of an SDR platform using GPU and its application to a 2?��?2 MIMO WiMAX system

Conventional communication systems have been implemented using digital signal processors (DSPs) and/or field programmable gate arrays (FPGAs), especially for software defined radio (SDR) functionality. We propose a scheme that uses a graphics processing unit (GPU) in place of the conventional DSPs or FPGAs for the implementation of an SDR-based communication system. The GPU, a high-speed parallel processor with multiple arithmetic logic units, is adopted for the signal processing of the physical layer required for the parallel processing in an SDR system. The compute unified device architecture (CUDA) based on the C language provides a software development kit (SDK) for the modem application of the GPU. Therefore we utilize the CUDA SDK to implement the real-time modem function. This paper presents an implementation of a 2 × 2 multiple-input multiple-output (MIMO) WiMAX system employing a GPU as the real-time modem. By installing a radio frequency module on top of the GPU modem, we implement a real-time transmission system for video data. The performance of the proposed GPU-based system is demonstrated by comparing its operation time against that of the conventional DSP-based system.     

The Software Architecture for a Large Telephone Switch

This paper describes the software and the software structure used in a family of high-capacity digital telephone switches. The call processing task is complex, and has great diversity. It must support existing and future features, including some not yet envisioned. The software must also provide man-machine interfaces, maintain the office database, and offer automatic recovery from hardware and software errors. It must also meet critical real-time performance specifications. The techniques adopted to meet these requirements include the use of a strongly typed high-level language, independent design and compilation of software modules, and the provision of an automated program library system and problem reporting system. Considerable experience in the development and support of large software systems has been accumulated, and is described in the paper.