Large-Signal Microwave Performance Prediction of Dual-Gate GaAs MESFET Using an Efficient and Accurate Model (Short Paper)

This paper presents a microwave large-signal model for the dual-gate MESFET. The model enables prediction of device performance in small-signal and large-signal circuits. The model is an extension of a previously developed model for the ordinary MESFET. It relies on basic principles, thus correlating the device geometry and physical parameters to its performance. The speed and accuracy of the model are demonstrated by calculating three types of device performance: dc curves smell-signal scattering parameters, and huge-signal simulation of an amplifier. Good agreement was achieved between calculated and measured perfomance. The computed results are presented for comparison only, and no attempt was made to present a comprehensive analysis of the device performance.     

Impact of device geometry and doping strategy on linearity and RF performance in Si/SiGe MODFETs

Based on careful calibration in respect of 70 nm n-type strained Si channel Si/SiGe modulation doped FETs (MODFETs) fabricated by Daimler Chrysler, numerical simulations have been used to study the impact of the device geometry and various doping strategies on device performance and linearity. Both the lateral and vertical layer structures are crucial to achieve high RF performance or high linearity. The simulations suggest that gate length scaling helps to achieve higher RF performance, but degrades the linearity. Doped channel devices are found to be promising for high linearity applications. Trade-off design strategies are required for reconciling the demands of high device performance and high linearity simultaneously.     

A new transmission-line device with double-polarization capabilityfor use in radiated EMC tests

The subject of this paper is the design and performance analysis of a double-polarization transmission line (TL) device for radiated EMC tests, the CrossTEM (X-TEM) cell. The X-TEM cell is a multiwire TL device which has been specifically designed in order to optimize the test-region dimensions while ensuring double-polarization performance and suitable cross-polarization level. Cross-polarization performance is requested by the last modifications of emerging standards. Theoretical and experimental results are shown illustrating the performance of the new device. The selective-absorbing material positioning (SAMP) procedure to suppress resonances is described. The improvements experimentally achieved for both field uniformity and cross polarization are shown     

Trade-off relations for high-voltage switching transistors

This paper presents trade-off relations between device performance and parameters for high-voltage switching transistors. These curves are found to be in good agreement with experimental results and are not only useful for improving device performance but also may lead to higher yield.     

High-frequency heterojunction bipolar transistor device design andtechnology

This paper identifies and reviews those aspects of new materials and device technological advances that have pushed HBT circuits towards a 100 GHz operating frequency. The operating principles of the HBT are initially discussed in relation to their differences from homojunction bipolar transistors. The advantages and disadvantages of the various materials systems available to HBTs, how the particular material properties relate to the device performance and a brief outline of growth technologies are then presented. Those device parameters contributing to the frequency performance figures-of-merit are identified and the resulting design approaches discussed. Current device fabrication technology is then reviewed, with the latest results and the most important design aspects for high-frequency operation identified. This is then followed by examples of achievements in both digital and analogue circuit applications. Finally, an attempt is made to identify those device and materials aspects that are likely to contribute to a further improvement in the frequency performance of HBTs     

Electrothermal simulations in punchthrough and nonpunchthroughIGBT's

The performance of 1200 V punchthrough (PT) and nonpunchthrough (NPT) insulated gate bipolar transistors (IGBT's) is studied in detail under unclamped inductive switching (UIS) and short circuit (SC) conditions. The need for a good physics based simulator to carry out a reliability study is pointed out in the paper. Using such a finite element-based device and circuit simulator it is shown that NPT-IGBT's show a much better performance than PT-IGBTs under UIS condition. It is also shown that an NPT device has a better short circuit withstanding capability than a PT device due to the structural differences between the two devices. As there is a huge power loss within the device during these operating conditions, device self-heating is expected to have a significant impact on device characteristics. Electrothermal simulations are used to study device self-heating and it is shown that it significantly influences device performance under SC operation whereas self-heating influences the UIS performance of only the PT device with little effect on the NPT device. The study is validated by an experimental study of short circuit failure of PT IGBTs     

High performance ion-implanted low noise GaAs MESFET's

Low noise GaAs MESFET's fabricated by ion-implanting into AsCl3VPE buffer layers have demonstrated not only excellent dc and RF performance, but also a highly reproducible process. The average noise figure and associated gain of four device lots at 12 GHz are 1.6 dB and 10.0 dB, respectively. The standard deviation of noise figure and associated gain from device lot to lot are 0.03 dB and 0.19 dB, respectively. And the standard deviation of noise figure and associated gain from device to device for 35 devices over four lots are 0.13 dB and 0.47dB, respectively. The best device performance includes a 1.25 dB noise figure with 10.46 dB associated gain at 12 GHz for a 0.5 µm × 300 µm FET structure. These results demonstrate the excellent performance and process consistency of ion implanted MESFET's.     

Reliability issues of GaN based high voltage power devices

GaN based power devices for high efficiency switching applications in modern power electronics are rapidly moving into the focus of world wide research and development activities. Due to their unique material properties GaN power devices are distinguished by featuring high breakdown voltages, low on-state resistances and fast switching properties at the same time. Finally, these properties are the consequences of extremely high field and current densities that are possible per unit device volume or area. Therefore, in order to obtain very high performance, the material itself is stressed significantly during standard device operation and any imperfection may lead to wear out and reliability problems. Thus material quality, the specific epitaxial design as well as the device topology will directly influence device performance, reliability and mode of degradation. The paper will mainly discuss those degradation mechanisms that are especially due to the specific material combinations used in GaN based high voltage device technology such as epitaxial layer design, chip metallization, passivation schemes and general device topology and layout. It will then discuss technological ways towards engineering reliability into these devices. Generally, device designs are required that effectively minimize high field regions in the internal device or shift them towards less critical locations. Furthermore, an optimized thermal design in combination with suitable chip mounting technologies is required to enable maximum device performance.     

Magnetotransport characterization of surface-treated InP/InGaAs heterojunction bipolar transistors

The results of surface modification induced effects on InP/InGaAs single heterojunction bipolar transistors, as revealed by magnetotransport experiments, are described here. The surface treatments included both sulphur-based surface passivation and ion bombardment-induced surface damage. The former is known to improve device characteristics and the latter to degrade device operation. In this work the aim was to assess these techniques for tailoring device performance for surface sensing applications. Device characteristics were found to be sensitive to surface preparation prior to measurements. Measurements revealed that surface treatments that improve device performance also reduce sensitivity to external magnetic fields while treatments that degrade performance make devices more sensitive to externally applied magnetic fields.     

有机场效应晶体管最新实验研究进展

介绍了近两年新报道的有机半导体材料,列举了其场效应性能参数;综述了有机场效应晶体管(OFET)在器件结构上的改进,重点阐述了基于常见有机功能层材料富勒烯及其衍生物、并五苯、聚3-己基噻吩的OFET对栅介质层及有机功能层与电极的界面的改进,讨论了器件结构改进对OFET阈值电压、开关比、载流子迁移率的影响;介绍了衬底温度、退火处理对OF-ET性能的影响。最后,针对有机场效应晶体管研究现状,指出未来研究中应注重开发高迁移率、高薄膜稳定性的有机功能材料和高介电常数、高成膜质量的有机栅介质材料,继续优化器件结构,改进制备工艺以提高器件性能。     

Experimental study of AlGaAs/GaAs HBT device design for powerapplications

An experimental study of AlGaAs/GaAs heterojunction bipolar transistor (HBT) device design for optimizing key DC and RF performance parameters relevant to power device applications is reported. The design of the collector, base, and base-emitter junction is investigated for improved power device performance, and novel device structures are presented. Device scaling effects and the extent to which air-bridged interconnect can reduce parasitics in large power devices are also explored. Power HBTs employing some of the optimized design features have achieved a power output of 1.2 W (4 W/mm) with 43% power-added efficiency at 10 GHz     

Transistor design for low distortion at high frequencies

The design of high-frequency bipolar transistors with very low distortion is described. Simple expressions for distortion are used to select device parameters for the optimization of distortion performance. The effect of epitaxial-layer characteristics on device performance is considered in detail, and the importance of collector depletion in achieving low distortion is shown. The influence of device geometry on distortion is considered, and the degradation caused by MOS capacitance is illustrated.     

nBn型InSb红外器件性能仿真

从能带结构方面分析了InSb nBn结构的势垒层,并使用Sentaurus TCAD软件计算并模拟了改进前后的器件IV性能,仿真结果表明,在势垒层靠近吸收层一侧加入渐变层可以有效改进器件性能。之后模拟仿真了势垒层Al组分、厚度对器件性能的影响。最后根据仿真结果选定结构参数进行实际分子束外延生长,并给出初步的器件结果。     

Numerical simulation of HgCdTe detector characteristics

We discuss analytic and numerical models for HgCdTe photodiodes and present examples of their application. Analytic models can account for the performance obtained by many device architectures. Numerical and analytic models agree in predicting several aspects of device performance, such as diffusion limited dark current, confirming the approximations used in deriving the analytic models. Areas are noted where improvement in the numerical models would allow application to a wider range of device simulations. Useful results are obtained from the numerical simulators that cannot be obtained from our analytic model. Flux dependent R₀A products are shown to be a direct result of bias dependent quantum efficiency, a mechanism that is much more evident in heterojunction device architectures. Material compositional grading is demonstrated to lead to lower signal to noise ratio in devices designed to detect a particular infrared wavelength. We also show, particularly for high temperature operation, that heterojunction detectors can at best equal the performance of well-designed homojunction detectors; so, for photodetector design, heterojunctions do not offer any inherent performance advantages over homojunctions. Nevertheless, heterostructures, though ideally not required, may be helpful in achieving high performance in practice.     

自动喷水灭火装置中易熔合金型感温器件的研究

剖析了自动喷水灭火装置中感温元件的性能.实验研究了几种易熔合金的熔点温度,提出了用一种新的易熔合金型感温元件替代玻璃泡型感温元件,阐述了这种易熔合金型感温元件的结构设计和性能试验.     

有机电致发光显示板

本文介绍高性能多层有机电致发光显示器件。该器件可分为三类。多层器件的发光亮度超过１００ｃｄ／ｍ’，驱动电压低于２０Ｖ。文章也介绍了高亮度器件的发光机理和器件的稳定性。     

无线局域网设备天线性能测试

由于无线局域网设备为同频时分设备,其上下行链路共用同一频率,因此传统的异频双工设备天线性能测试方法对其不适用。本文介绍了无线局域网设备天线性能的测试标准,给出了被测终端的设置要求,介绍了适用于无线局域网设备的天线性能测试方法。该方法符合标准要求,且测试精度高,不确定度低。     

高精度测速设备动态目标模拟研究

针对基于动态目标模拟方法,检验和考核高精度测速设备性能,训练操作手的实战水平,提出了一种基于高精度测速设备理论弹道的动态模拟方案,通过对预先提供的理论弹道文件,进行插值、坐标转换和中频模拟等步骤,解算出理论弹道文件中包含的信号电平、多普勒频率和目标位置等信息,并据此产生中频模拟信号[1,2]。模拟信号作为动态模拟信号送给高精度测速设备,用于检验和考核设备性能,训练操作手的实战水平。利用理论弹道数据产生高精度测速设备的动态模拟数据,具有精度高、贴近实战的特点。     

Negative capacitance independent multi-gate FinFETs and their optimisations

In order to reduce the operating voltage of FinFET and increase the flexibility of integrated circuit design, we have proposed a Negative Capacitance Independent Multi-Gate FinFET (NC-IMG-FinFET) with Ferroelectric-Metal-Insulator-Semiconductor-Insulator (FMISI) structure. Both the device and circuit analysis model of NC-IMG-FinFET are addressed, which are used to analyse the performance parameters of the device (the surface potential, internal gate voltage amplification, Sub-threshold Swing (SS), on-current and leakage) and the performance of a circuit (delay, power consumption, power delay product (PDP)). The simulation model of the NC-IMG-FinFET has been constructed by combining BSIM-IMG model with ferroelectric Landau-Khalatnikov model. The optimisations for ferroelectric film thickness of the NC-IMG-FinFETs are carried out in terms of device characteristics and circuit performances. The simulation results are consistent with the analysis results, indicating that the NC-IMG-FinFET has superior performance compared with the baseline device, in terms of smaller leakage, larger on/off current ratio and smaller SS (38.3 mV/dec at room temperature). Compared with the baseline IMG-FinFET circuits, there is large performance improvement for the NC-IMG-FinFET circuits, in terms of the power consumption and PDP.     

Improved modulation performance of a silicon p-i-n device by trenchisolation

This paper reports on the simulation of the dc and transient performance of a p⁺-i-n⁺ single-mode optical phase modulator suitable for silicon-on-insulator material. An analysis of the variation in the dc and transient performance due to trench isolation has been carried out. The device has been modeled using the two-dimensional device simulation package SILVACO. SILVACO has been employed to investigate the overlap between the injected free carriers in the intrinsic region and the propagating optical mode. On forward bias of the device, free carriers are injected into the intrinsic guiding region of the device, resulting in a change in the refractive index of this region. The device studied is designed to support a single optical mode and is of multimicrometer dimensions, thus simplifying fabrication and allowing efficient coupling to/from single-mode fibers or other single-mode devices. The modeling indicates that increased dc device performance of up to 74% results from a vertical trench defined adjacent to the outer edge of the contact region, as compared to a device without trench isolation. For the same conditions an increase in the transient performance of ~18% is also observed