Metal base transistor ofIn/Bi(Ba,Rb)O3/SrTiO3 (Nb)

A metal-base transistor of the MOMOM type with large current gain is reported. It uses Bi(Ba,Rb)O₃ and oxide semiconductors. I-V curves for a Bi(Ba,Rb)O₃ base transistor in the common-base configuration were studied from room temperature to 30 K. Current gain α~1 was obtained at 50 K. Transport behavior is determined by analysis of threshold voltages and derivatives dI_c/dV_cb     

Transistor characteristics with Ta2O5 gatedielectric

As the gate oxide thickness decreases below 2 nm, the gate leakage current increases dramatically due to direct tunneling current. This large gate leakage current will be an obstacle to reducing gate oxide thickness for the high speed operation of future devices. A MOS transistor with Ta₂O₅ gate dielectric is fabricated and characterized as a possible replacement for MOS transistors with ultra-thin gate silicon dioxide. Mobility, I_d-V_d, I_d-V_g, gate leakage current, and capacitance-voltage (C-V) characteristics of Ta₂O₅ transistors are evaluated and compared with SiO₂ transistors. The gate leakage current is three to five orders smaller for Ta₂O₅ transistors than SiO₂ transistors     

Critical current characteristics of YBa2Cu3O7 thin films on (110) SrTiO3

The material and electrical characteristics of YBa₂Cu ₃O₇ (YBCO) thin films deposited by inverted cylindrical magnetron sputtering on (110) SrTiO₃ (STO) were investigated. X-ray diffractometry shows the grain orientations to be predominantly the YBCO (110) and (103) with no evidence of c-axis grains, Electron micrographs show the film surface to consist of coupled elongated grains parallel to the (110) STO edge. The films were patterned into small 2.5 mm squares parallel to the substrate edges for electrical characterization. Transport currents parallel and perpendicular to the (110) substrate edge showed a 945:1 anisotropy in film resistance and a factor of two in critical current density for temperatures below 60% of the transition temperature (T_c). The temperature dependence of the critical current near T_c was quadratic-like and strongly dependent on the value of T_c used in the analysis. For the two orientations, there was nearly a 6 K difference in T_c as determined by the point at which the critical current became zero. The response of the critical current to small magnetic fields was greater for transport current along the c-axis direction and was observable over a temperature interval nearly four times greater than for current along the basal plain. These YBCO thin films have good response to small magnetic fields and are suitable for vortex flow device development     

Germanium MOSFETs With CeO2/HfO2/ TiN Gate Stacks

Long-channel Ge pMOSFETs and nMOSFETs were fabricated with high-kappa CeO₂/HfO₂/TiN gate stacks. CeO₂ was found to provide effective passivation of the Ge surface, with low diode surface leakage currents. The pMOSFETs showed a large I _ON/I_OFF ratio of 10⁶, a subthreshold slope of 107 mV/dec, and a peak mobility of approximately 90 cm² /Vmiddots at 0.25 MV/cm. The nMOSFET performance was compromised by poor junction formation and demonstrated a peak mobility of only ~3 cm²/Vmiddots but did show an encouraging I_ON/I _OFF ratio of 10⁵ and a subthreshold slope of 85 mV/dec     

Photon generation in forward-biased silicon p-n junctions

Photons are generated by forward biasing a silicon p-n junction at 10^-5∼ 10^-4quantum efficiency through radiative recombination. At large distances from the forward-biased junction, leakage currents of magnitudes significant for some VLSI circuits can appear due to the substrate minority carriers generated by the photons. The effective decay length of the measured leakage current is about several hundred to one thousand micrometers. The effects of forward biasing an input node or a parasitic lateral bipolar transistor are, therefore, longer ranged than commonly assumed.     

DC characteristics of patternedYBa2Cu3O7-x superconducting thin-filmbolometers: artifacts related to Joule heating, ambient pressure, andmicrostructure

Joule heating due to the bias current and resistance of the material in patterned YBa₂Cu₃O_7-x, superconducting films on 250-500-μm-thick MgO, LaAlO₃, and SrTiO₃ crystalline substrates, results in a number of effects: (1) a temperature rise in the film with respect to the measured temperature at the bottom of the substrate; (2) a possible thermal runaway, which may be local or uniformly distributed in the film, depending upon the dimensions of the superconducting pattern relative to that of the substrate; (3) an apparently sharper normal-to-superconducting transition in the measure R versus T curve; and (4) decrease of T_c to 60 K (ΔT_x>20 K) after being subjected to high-bias currents j~10⁵ A/cm² under vacuum, with recovery of T_c after exposure to room atmosphere. The magnitude of R at T_c*onset is found to be dependent on bias current in granular samples, with a lower R at currents higher than some on-set value. The slope of R versus T in the transition region in our granular samples is found to be lower at higher bias currents, since the widening of the transition overcomes the shift caused by the Joule heating. These various phenomena impact the responsivity of bolometers made from these films, as well as the predictions of possible attainable responsivity and speculations of mechanisms occurring in the films. In particular, misinterpretation of the Joule heating sharpening of the R versus T curve has led to predictions of responsivities over one order of magnitude higher than are justified, and shifts in properties of the films due to heating have been misinterpreted as nonequilibrium responses of the films     

High-density MIM capacitors using Al2O3 andAlTiOx dielectrics

We have investigated the electrical characteristics of Al₂ O₃ and AlTiO_x MIM capacitors from the IF (100 KHz) to RF (20 GHz) frequency range. Record high capacitance density of 0.5 and 1.0 μF/cm² are obtained for Al₂ O₃ and AlTiO_x MIM capacitors, respectively, and the fabrication process is compatible to existing VLSI backend integration. However, the AlTiO_x MIM capacitor has very large capacitance reduction at increasing frequencies. In contrast, good device integrity has been obtained for the Al₂O₃ MIM capacitor as evidenced from the small frequency dependence, low leakage current, good reliability, small temperature coefficient, and low loss tangent     

Adaptive-learning neuron integrated circuits usingmetal-ferroelectric(SrBi2Ta2O9)-semiconductor (MFS) FET's

An adaptive-learning neuron circuit was fabricated for the first time by integrating a metal-ferroelectric-semiconductor (MFS) FET and a complementary unijunction transistor (CUJT) on a silicon-on-insulator (SOI) structure. SrBi₂Ta₂O₉ (SBT) was selected as a ferroelectric gate material and it was deposited by liquid source misted chemical deposition (LSMCD) method. In fabrication of the circuit, a new selective etchant, NH₄F:HCl, was used to remove the unnecessary SBT film, since it was found from preliminary experiments that the parasitic ferroelectric capacitors prevented normal operation of the circuit. It was found that the drain current of the MFSFET was changed gradually by applying a number of input pulses with a sufficiently short duration time of 20 ns. The gradual change in the output pulse frequency of the neuron circuit was also demonstrated as the number of input pulses was increased     

A Comparative Study of HfTaON/SiO2 and HfON/SiO2 Gate Stacks With TaN Metal Gate for Advanced CMOS Applications

The electrical characteristics of a novel HfTaON/SiO₂ gate stack, which consists of a HfTaON film with a dielectric constant of 23 and a 10-Aring SiO₂ interfacial layer, have been investigated for advanced CMOS applications. The HfTaON/SiO₂ gate stack provided much lower gate leakage current against SiO₂ , good interface properties, excellent transistor characteristics, and superior carrier mobility. Compared to HfON/SiO₂, improved thermal stability was also observed in the HfTaON/SiO₂ gate stack. Moreover, charge-trapping-induced threshold voltage V _th instability was examined for the HfTaON/SiO₂ and HfON/SiO₂ gate stacks. The HfTaON/SiO₂ gate stack exhibited significant suppression of the V_th instability compared to the HfON/SiO₂, in particular, for nMOSFETs. The excellent performances observed in the HfTaON/SiO₂ gate stack indicate that it has the potential to replace conventional SiO₂ or SiON as gate dielectric for advanced CMOS applications     

Process and device characterization for a 30-GHz fT submicrometer double poly-Si bipolar technology using BF2-implanted base with rapid thermal process

Process and device parameters are characterized in detail for a 30-GHz f_T submicrometer double poly-Si bipolar technology using a BF₂-implanted base with a rapid thermal annealing (RTA) process. Temperature ramping during the emitter poly-Si film deposition process minimizes interfacial oxide film growth. An emitter RTA process at 1050°C for 30 s is required to achieve an acceptable emitter-base junction leakage current with an emitter resistance of 6.7×10^-7 Ω-cm², while achieving an emitter junction depth of 50 nm with a base width of 82 nm. The primary transistor parameters and the tradeoffs between cutoff frequency and collector-to-emitter breakdown voltage are characterized as functions of base implant dose, pedestal collector implant dose, link-base implant dose, and epitaxial-layer thickness. Transistor geometry dependences of device characteristics are also studied. Based on the characterization results for poly-Si resistors, boron-doped p-type poly-Si resistors show significantly better performance in temperature coefficient and linearity than arsenic-doped n-type poly-Si resistors     

Ga2O3(Gd2O3)/InGaAsenhancement-mode n-channel MOSFETs

We have demonstrated the first Ga₂O₃(Gd₂O₃) insulated gate n-channel enhancement-mode In_0.53Ga_0.47As MOSFET's on InP semi-insulating substrate. Ga₂O₃(Gd₂ O₃) was electron beam deposited from a high purity single crystal Ga₅Gd₃O₁₂ source. The source and drain regions of the device were selectively implanted with Si to produce low resistance ohmic contacts. A 0.75-μm gate length device exhibits an extrinsic transconductance of 190 mS/mm, which is an order of magnitude improvement over previously reported enhancement-mode InGaAs MISFETs. The current gain cutoff frequency, f_t, and the maximum frequency of oscillation, f_max, of 7 and 10 GHz were obtained, respectively, for a 0.75×100 μm² gate dimension device at a gate voltage of 3 V and drain voltage of 2 V     

RuO2/GaN Schottky contact formation with superiorforward and reverse characteristics

This is a first time report of a ruthenium oxide (RuO₂) Schottky contact on GaN. RuO₂ and Pt Schottky diodes were fabricated and their characteristics compared. When the RuO₂ Schottky contact was annealed at 500°C for 30 min, the current-voltage (I-V) and capacitance-voltage (C-V) characteristics of the RuO₂ were dramatically improved. The annealed RuO₂ /GaN Schottky contact exhibited a reverse leakage current that was at least two or three orders lower in magnitude than that of the Pt/GaN contact along with a very large barrier height of 1.46 eV, which is the highest value ever reported for a GaN Schottky system     

The relevance of fT and fmax for the speed ofa bipolar CE amplifier stage

Expressions relating the bandwidth of a common-emitter (CE) amplifier stage and the small-signal CML gate delay time to directly measurable transistor parameters, such as f_T, f_max, and input bandwidth f_υ, are presented. They are valid for an arbitrary division of the base resistance and base-collector depletion capacitance into internal and external components. No resistance measurements are needed. It is shown that the transistor input bandwidth f_υ is an important figure of merit for the speed of a CE stage. Under a given bias condition, f_υ is determined by the base resistance and the cut-off frequency. In most cases the value of the maximum oscillation frequency f_max is only of minor importance. It would therefore be more meaningful to present besides f_T also f_υ instead of f_max as a figure of merit for transistors for high-speed, low-power analog and digital circuits     

One transistor ferroelectric memory with Pt/Pb5Ge3O11/Ir/poly-Si/SiO2/Si gate-stack

One transistor ferroelectric nonvolatile memory with gate stack of Pt/Pb₅Ge₃O₁₁/lr/poly-Si/SiO₂ /Si was successfully fabricated. This device features a saturated memory window of 3 V at a programming voltage of higher than 3 V from C-V and I-V measurements. The memory window decays rapidly within 10 seconds after programming, but remains stable at 1 V for up to 100 h. The "on" and "off" state currents are greater than 10 μA/μm and less 0.01 pA/μm, respectively, at a drain voltage of 0.1 V     

Avalanche breakdown in (AlxGa1x)0.52In0.48P pin junctions

The avalanche breakdown behaviour of (Al_xGa_1-x )_0.52In_0.48P has been investigated by growing a series of pin diode structures and by measuring the reverse leakage currents until the onset of avalanche breakdown. Comparing the breakdown voltage (V_bd) with that of GaAs, significant increases are obtained, with AlInP having in excess of twice the V_bd of GaAs     

Organic thin-film field-effect transistors with MoO3/Al electrode and OTS/SiO2 bilayer gate insulator

An organic thin-film transistor (OTFTs) having OTS/SiO₂ bilayer gate insulator and MoO₃/Al electrode configuration between gate insulator and source–drain (S–D) electrodes has been investigated. Thermally grown SiO₂ layer is used as the OTFT gate dielectric and copper phthalocyanine (CuPc) for an active layer. We have found that using silane coupling agents, octadecyltrichlorosilane (OTS) on SiO₂, surface energy of SiO₂ gate dielectric is reduced; consequently, the device performance has been improved significantly. This OTS/SiO₂ bilayer gate insulator configuration increases the field-effect mobility, reduces the threshold voltage and improves the on/off ratios simultaneously. The device with MoO₃/Al electrode has similar source–drain current (I_DS) compared to the device with Au electrode at same gate voltage. Our results indicate that using double-layer of insulator and modified electrode is an effective way to improve OTFT performance.     

Thin tunnel oxide grown on silicon substrate pretreated by CF4 plasma

High tunneling current and large resistance against stress were the main issue of tunnel oxide for scaling down the operation voltage of EEPROMs. In this letter, thin-tunnel oxides grown on a CF₄ pretreated silicon substrate were prepared and investigated for the first time. The fabricated oxide has about three orders of tunneling current higher than that of control one; furthermore, the stress induced anomalous and low electric field leakage currents were greatly suppressed. The improvement could be contributed to F-incorporation in oxide. This type of oxide is suitable for fabricating low-voltage EEPROMs and less process complexity was added     

Excess currents induced by hot hole injection and FN electroninjection in thin SiO2 films

The behavior of excess currents induced by Fowler-Nordheim electron injection stress (FN electron injection) has been investigated for 6.0-nm oxides. Excess currents are induced by FN electron injection in 6.0-nm oxides together with positive charges being induced in it. To clarify the role of hole injection in FN electron injection, the behavior of excess currents induced by substrate hot hole injection has also been investigated in 6.0-nm oxides. The leakage behavior after hot hole injection is the same as FN electron injection. The excess currents induced both by the FN electron injection and by the substrate hot hole injection are due to trap-assisted tunneling and field enhancement at the cathode due to the positive trapped charge. The charge centroid of the positive charges induced by both stresses are located 3.0 nm from the Si/SiO₂ interface which is at the center of 6.0-nm oxide. The excess currents induced by hot hole injection and FN electron injection are caused by traps in SiO₂ films produced by injected holes from the anode     

YBa2Cu3O7 superconductors forhigh-speed interconnects

The surface resistance of high-quality YBa₂Cu₃ O₇ superconducting films measured over a frequency range from 10 to 500 GHz using high-speed optoelectronic techniques is discussed. A direct comparison is made with the surface resistance of gold and superconducting niobium conductors. Using the measured surface resistance, the propagation characteristic of interconnects based on YBa ₂Cu₃O₇ superconductors at 77 K is simulated and compared to that of gold transmission lines at 77 K and superconducting niobium lines at 7.7 K     

Stack gate PZT/Al2O3 one transistorferroelectric memory

We have developed a single transistor ferroelectric memory using stack gate PZT/Al₂O₃ structure. For the same ~40 Å dielectric thickness, the PZT/Al₂O₃/Si gate dielectric has much better C-V characteristics and larger threshold voltage shift than those of PZT/SiO₂/Si. Besides, the ferroelectric MOSFET also shows a large output current difference between programmed on state and erased off state. The <100 us erase time is much faster than that of flash memory where the switching time is limited by erase time