光子晶体电光调制和粗波分复用集成器件研究

提出了一种用于电光调制和粗波分复用的片上集成器件。该集成器件的电光调制器模块和粗波分复用器模块都是由硅基光子晶体波导和L3型谐振腔组成,两个模块间采用硅基光子晶体波导连接。该器件根据等离子体色散效应,采用L3型谐振腔和PN结实现了对波长的调制;根据微腔与波导的直接耦合理论,采用L3型谐振腔结构实现了滤波。利用基于三维时域有限差分法(3D-FDTD)的Lumerical软件对其进行仿真分析,结果表明该集成器件在工作波长1530 nm和1550 nm下均可以先完成各自的电光调制再进行双通道波长的复用。该器件在工作波长1530 nm和1550 nm下的插入损耗分别为0.70 dB和0.95 dB,消光比分别为20.97 dB和22.05 dB,调制深度均为0.99,信道串扰分别为-29.05 dB和-27.59 dB,器件尺寸仅为17.83μm×17.3μm×0.22μm。该集成器件结构紧凑,易于集成,可应用于高速大容量波分复用光通信系统。     

Integrated tapped MOS analogue delay line using switched capacitor technique

A tapped MOS analogue delay line based on the switched capacitor technique for realisation of low-power analogue LSIs is fabricated using a VLSI process. Excellent characteristics such as large signal handling capability, low total harmonic distortion of ?85 dB for 3V(p-p) input and fast operation speed of more than 1 MHz clock rate with negligible charge transfer loss are obtained.     

An adaptive ferroelectric transformer—A solid-state analog memory device

A new solid-state adaptive (analog memory) device is described and demonstrated. The device is a flat-band electronic transformer with adaptable voltage gain; that is, the voltage gain-frequency transfer characteristic can be "set" to different values of attenuation by the application of an adapt signal and will retain that setting after the adapt signal has been removed. Ferroelectric materials are used as the dielectric in the transformer structure composed of two capacitors bonded together so that mechanical vibrations established in one (the input capacitor) are coupled to the other (the output capacitor). Converse and direct piezoelectric effects generate the mechanical vibrations and the output voltages, respectively. Ferroelectric effects in either capacitor provide the analog memory capabilities. Experimental adaptive transformers demonstrated are suitable for audio frequency operation. The voltage and current gain-frequency transfer characteristics are flat over the entire audio frequency range. Maximum gain is typically about -20 dB. Application of a voltage pulse (100 to 300 volts) of low energy (mJ) to either side of the transformer can adapt the gains to specific lower settings (between-20 and -60 dB) within an arbitrary switching time (roughly 10⁺³to 10^-4seconds) as determined by the pulse amplitude. Gain settings are electrically stable to within a few percent of the maximum gain for periods of at least one year, and possibly indefinitely, and can be reproduced by the same or an equivalent sequence of adapting pulses.     

Simultaneous Dual-Wavelength Conversion With Multiresonant Saturable Absorption Vertical-Cavity Semiconductor Gate

We experimentally demonstrate the use of a multiresonant, all-optical vertical-cavity semiconductor gate for simultaneously converting the wavelength of an optical data signal into two signals with different wavelengths. The operation of the gate is based on saturable absorption effect in multiple quantum-well structures. The repetition rate of the converted signal is limited by the recovery time of the saturable absorber. The device is compact, passive, polarization-independent, and enables wavelength conversion with a high extinction ratio of more than 10 dB and maximum optical signal-to-noise ratio penalty lower than 3 dB.     

A Method to Reduce Sampling Rate of the ADC in Feedback Channel for Wideband Digital Predistortion

This paper presents a new digital predistortion (DPD) solution for wideband signals with low feedback sampling rate. To reduce the minimum sampling rate of the analog-to-digital converter (ADC) for wideband digital predistortion, the proposed method uses a bandpass filter to form a narrowband signal before the ADC. Then, a deconvolution operation is performed to recover the original wideband signal from the ADC samples. The proposed method is evaluated with an international mobile telecommunication-advanced signal with 100 MHz bandwidth. The simulation results show that the recovered signal of the proposed method closely approximates to the original signal in the passband of the filter, and the mean square error of the deconvolution decreases as the signal-to-noise ratio increases. The proposed algorithm can reduce the sampling rate of the ADC from 1105.92 million samples per second (MSPS) to 368.64 MSPS, and improve the adjacent channel power ratio more than 20 dB, which is merely 5.6 dB less than the conventional DPD with 1105.92 MSPS sampling rate.     

A 15 MHz 20 mW BiCMOS switched-capacitor biquad operating with 150Ms/s sampling frequency

In order to increase the sampling frequency of SC filters the Precise Opamp Gain (POG) design approach is presented. It is based on the use of large bandwidth opamps with low but precise DC gain. The finite gain value is taken into account in the design phase. This produces capacitor values slightly different from those obtained with the standard design. A BiCMOS opamp with a nominal gain of 96 and unity-gain frequency of 650 MHz is used in a biquadratic lowpass filter with Q=2.8 designed with the POG approach. In a 1.2 μm BiCMOS technology, the prototype lowpass biquad operates with sampling frequency up to 150 Ms/s with 0.2 dB accuracy in the transfer function. For a sampling frequency of 150 Ms/s, the cut off frequency is 15 MHz. The dynamic range (for 1% THD) is 67 dB, and THD is less than -60 dB for a 1.5 Vpp 5 MHz input signal. The chip area is 1 mm², and the power consumption is 20 mW     

基于OMP算法的宽带频谱感知

频谱感知是认知无线电的一项关键技术,其能够检测出未被主用户占用的频谱空穴供次用户接入使用,提高频谱利用率.宽带频谱感知要求对数GHz 的带宽进行检测,过高的采样速率、大的数据量对现有的硬件设备提出了巨大的挑战.本文利用宽带频谱的稀疏性提出一种基于OMP算法的宽带频谱感知方法.该方法利用MWC采样实现对宽带模拟信号直接压缩采样;利用自相关矩阵对称分解特性和主用户信号独立性,得到有限维压缩采样信号模型,利用AIC/MDL准则估计稀疏度作为OMP算法迭代停止的条件,大大减少了算法复杂度;该方法不需要重构接收信号的PSD,直接在时域根据低速率采样信号,检测被占用信道.仿真结果表明,当带内信噪比大于9dB时,频谱检测概率高于90％.     

A low-noise line-amplified MOS imaging devices

A new MOS imaging device is proposed. It has an amplifier and a correlated double sampling (CDS) circuit at each vertical signal line and an off-chip smear differential gear. The 1/2-in image format, 500×485 pixels, is designed on 1.5-μm CMOS technology, and its fundamental characteristics are analyzed. Random noise is 120 pA, and the aperture ratio is greater than 70%. The smear level is 100 dB. The fixed pattern noise is 2000 pA in the dark, 0.62% in light. Some advantages of this device include a 5-V power supply requirement, a high saturation current, a high signal-to-random-noise ratio, and a low smear level. However, the fixed pattern noise in the dark needs to be lowered for improved performance     

A high-packing density pixel with punchthrough read-out method foran HDTV interline CCD

A new pixel structure for a high-packing-density interline CCD is proposed, in which signal charges are read out from the photodiodes to the vertical CCD by a punchthrough mechanism. This read-out method makes it possible to reduce the depth of the VCCD channel and the second p-well by implanting these two layers after diffusion of the photodiode n layer. Spreading resistance measurements on dummy wafers show that the depths of these layers are 0.28 μm and 0.6 μm, respectively. Moreover, the photodiode n-layer is covered with a surface p⁺-layer, even at the transfer region. We describe the results of simulations and experiments on a test image sensor with pixel dimensions of 7.3 μm (H)×7.6 μm (V). From the experimental data, we estimate the characteristics of an image sensor with pixel dimension 5.0 μm (H)×5.2 μm (V). Such a device should have a maximum charge handling capability of 1.4×10⁵ electrons, a smear level of -88 dB, a sensitivity of 1.5×10³ electrons/Ix with a 30% fill factor, no image lag, and a low photodiode dark signal of less than 14 electrons at 60°C. These results indicate that an IL-CCD with a punchthrough readout structure is suitable for image sensors with a high pixel density such as 2/3 inch 2 million pixel image sensors for high-definition TV applications     

A wavelength division multiplexer based on plastic surfacerelief grating applied to local area communication network

A plastic surface-relief grating as a wavelength division multiplexer is designed and fabricated with the conventional mould pressing technique using the transmission-type fused quartz phase grating as mask pattern and polycarbonate as basal material.The experiment results show that in an optimizing process,the plastic surface-relief grating has the highest firstorder diffraction efficiency under adequate groove depth and incident angle,and can be used as the best optical path for wavelength division multiplexing(WDM).We also establish the experiment setup for testing the WDM performance of the plastic surface-relief grating based wavelength division multiplexer.The results show that the proposed wavelength division multiplexer has the high-stability temperature characteristics,the low insertion loss of less than 5 dB,the large isolation of greater than 20 dB,the low polarization-dependent loss(PDL) of less than 0.4 dB and the relatively steep pass-band characteristics.It is a WDM device with good performance,which can be applied in short distance communication.     

A CCD programmable signal processor

A generic large-coupled device (CCD) signal processor that performs 2.8-billion computations per second with a 10-MHz clock rate is described. The device's concept, design, operation, performance, and applications are reviewed. A dynamic range greater than 42 dB has been demonstrated by the device. This processor can be used as a one-dimensional correlator, a two-dimensional matched filter or a two-layer neural net device. The device demonstrates the flexibility and computational power that is possible using CCD technology     

An adaptive resonant filter

A solid-state adaptive (analog storage) device with stable electrical characteristics is described and demonstrated. The device is a resonant bandpass electronic filter with adaptable voltage gain; that is, the voltage gain-frequency transfer characteristic can be "set" to different values of attenuation by the application of an adapt signal and will retain that "setting" after the adapt signal has been removed. Ferroelectric materials are used as the dielectric in a filter structure composed of two capacitors bonded together so that resonant mechanical vibrations established in one (the input resonator) are coupled to the other (the output resonator). Converse and direct piezoelectric effects generate the mechanical vibrations and the output voltages, respectively. Ferroelectric effects in either capacitor provide the analog storage capabilities. The acoustical coupling mechanism employed in the device design results in electrically stable device characteristics. Previous ferroelectric adaptive devices used unstable field effect coupling mechanisms which led to unacceptable device performance. Experimental adaptive resonant filters fabricated with ceramic lead zirconate-lead titanate material compositions are discussed. These filters have electronic Q values near 100 at resonant frequencies in the range 10²to 10⁷Hz. The voltage gain-frequency characteristic has a maximum value at resonance of about 0 to +10 dB. Application of a voltage adapt pulse (100 to 300 volts) of low energy (mJ) to either side of the filter can adapt the entire gain characteristic by any value between 0 and about -60 dB within an arbitrary switching time (limited to a practical range of roughly 10⁺³to 10^-4seconds) as determined by the pulse amplitude. Voltage gain settings are electrically stable and can be reproduced by the same or an equivalent sequence of adapting pulses.     

基于分段压缩和原子范数的跳频信号参数估计

针对压缩域跳频信号参数估计方法需借助测量矩阵寻找压缩采样数据的数字特征,造成运算复杂度高,且存在基不匹配的问题,提出一种压缩域数字特征和原子范数的跳频信号参数估计方法。建立块对角化的测量矩阵,实现信号分段压缩,分析压缩采样数据的数字特征,实现跳变时刻粗估计;分离出未发生频率跳变的信号段,利用原子范数最小化方法实现跳变频率的精确估计;最后依据精确估计的跳变频率,设计原子字典,并在压缩域实现跳变时刻的精确估计。基于该算法的跳变频率估计性能高于基于压缩感知的跳变频率估计,亦能精确估计跳频信号的跳变时刻。仿真结果显示,在信噪比高于-2 dB,压缩比高于0.5时,基于该算法的归一化跳变频率估计误差低于10-4,归一化跳变时刻估计误差低于10-2。     

SAW-based 100 MHz-bandwidth adaptive filter

We report the design and operation of a wideband adaptive filter which uses a 350-tap SAW/FET programmable transversal filter. The SAW/FET device incorporates surface-acoustic-wave (SAW) signal propagation in conjunction with a field-effect-transistor (FET)-controlled sampling array. The adaptive processor uses a digital computer to calculate the tap-weight updates and achieves up to 25 dB of adaptive CW cancellation.     

A 100 MS/s 4 MHz Bandwidth 70 dB SNR $Delta Sigma$ ADC in 90 nm CMOS

This paper describes the results of an implementation of a high speed $Delta Sigma$ ADC in 90 nm CMOS process, which is developed for a direct-conversion digital TV receiver. The $Delta Sigma$ ADC is based on a switched-capacitor fourth-order single-loop $Delta Sigma$ modulator with a 4-bit quantizer. The ADC uses a triple sampling technique and a two-step summation scheme for low power and high speed operation. Also, a digital signal processing block, including a decimation filter, a channel selection filter and a digital programmable gain amplifier (PGA), is implemented in the same process. The decimation filter is based on a polyphase IIR filter with a decimation ratio of 5, while the channel selection filter is based on two path lattice wave digital IIR filter. The ADC achieves 69.95 dB SNR and 66.85 dB SNDR over a 4 MHz bandwidth with a sampling frequency of 100 MHz. The fabricated $Delta Sigma$ ADC and the digital signal processing block occupy 0.53$~$mm$^2$ and 0.09 mm$^{2}$, and consume 11.76 mW per channel.      

太赫兹−16 dB本振信号耦合器设计与实现

针对太赫兹频段边带分离接收机的应用需求,综合考虑本振信号弱耦合度、射频信号高方向性及现阶段铣削工艺精确度等要求,研制了一款400~500 GHz频段-16 dB 本振信号波导耦合器。主要包括分支型定向耦合器的耦合度特性分析、-16 dB弱耦合度波导耦合器设计、基于数控机械加工(CNC)技术的器件制备与结果讨论。2件样品实测结果均表明：该耦合器在400~500 GHz频段(相对带宽为22.5%)获得本振信号耦合度在-16~-17 dB,射频信号方向性为-1.2 dB,隔离度优于-20 dB,所有端口回波损耗优于-15 dB。上述性能均与仿真结果保持高度一致,表明当前CNC技术能够满足该高频段波导耦合器制备的高精确度需求。     

Superposition of DQPSK over inverse-RZ for 3-bit/symbol modulation-demodulation

We successfully demonstrated overwriting of differential quadrature phase-shift keying (DQPSK) on inverse return-to-zero (RZ) pulses for simple 3-bit/symbol operation at a 10-Gb/s symbol rate (30-Gb/s bit rate). We adopted cross-gain modulation (XGM) in a semiconductor optical amplifier (SOA) for inverse-RZ generation, which allows both low and high levels of RZ optical signal to have a finite pulse energy in a bit time slot. We verified a wide tolerance of 20% of the bit-slot for time slot alignment between amplitude-shift keying and differential phase-shift keying modulation in the proposed scheme. We also demonstrated wide dynamic range characteristics at the extinction ratio for both 2- and 3-bit/symbol operation, compared to the conventional scheme. The proposed scheme allows a cross-modulation penalty, due to the intensity to phase modulation, of less than 1.5 dB in 2-bit/symbol and less than 5 dB in 3-bit/symbol operation.     

High-speed analogue multiplexer using s.a.w. technology

A new type of high-speed analogue multiplexer is described that utilises surface-acoustic-wave (s.a.w.) technology. The device operation is based upon the conversion of P parallel analogue control inputs into a serial-output amplitude-modulated pulse train superimposed on a v.h.f. carrier. Experimental results are presented for a 10-channel prototype device with a sampling rate near 1 MHz and a modulation dynamic range exceeding 50 dB. The feasibility of achieving 100-channel operation at sampling rates up to 100 MHz is discussed.     

Tunable dispersion compensation at 40-Gb/s using a multicavity etalon all-pass filter with NRZ, RZ, and CS-RZ modulation

We present a multichannel tunable dispersion compensator (TDC) based on multicavity all-pass etalons that is capable of operation at 40 Gb/s. The device has a tuning range of +200/-220 ps/nm with a group delay ripple < /spl plusmn/5 ps over a channel bandwidth of 80 GHz, an overall loss of < 5.2 dB, very low insertion loss ripple, and can operate on any channel on a 200-GHz grid over the C-band. In addition, we present system performance results at 40 Gb/s using NRZ, RZ, and CS-RZ modulation, compensating up to 45 km of nonzero dispersion shifted fiber (NZDSF). Our results show that this device introduces very little excess system penalty with signal frequency drifts of up to 20 GHz when operated near the center of its tuning range. For single channel experiments with fiber, the system penalty increase versus signal detuning is more significant, but can be reduced by dynamically optimizing the device dispersion during detuning. Finally, we demonstrate simultaneous compensation of 4 channels across the C-band over 25 km of NZDSF.     

高动态信标信号的数字FLL技术研究

针对低载噪比条件下高动态信标信号的频率跟踪,分析了传统锁频环的性能及其在低载噪比下的应用局限,进一步给出了基于快速傅里叶变换（FFT,Fast Fourier Transform）鉴频的二阶锁频环设计方法,实现了低载噪比下的载频快速捕获与跟踪。计算机仿真结果表明,输入载噪比为35 dB/Hz、采样率为4 MHz的条件下,基于FFT鉴频的锁频环对高动态信标信号的捕获时间小于0.2秒。